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authorAkshay <[email protected]>2022-04-10 12:13:40 +0100
committerAkshay <[email protected]>2022-04-10 12:13:40 +0100
commitdc90387ce7d8ba7b607d9c48540bf6d8b560f14d (patch)
tree4ccb8fa5886b66fa9d480edef74236c27f035e16 /lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/gcc/MIMXRT633Sxxxx_flash.ld
Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/gcc/MIMXRT633Sxxxx_flash.ld')
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diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/gcc/MIMXRT633Sxxxx_flash.ld b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/gcc/MIMXRT633Sxxxx_flash.ld
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index 000000000..65ac7b6ac
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+++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/gcc/MIMXRT633Sxxxx_flash.ld
@@ -0,0 +1,243 @@
1/*
2** ###################################################################
3** Processors: MIMXRT633SFAWBR_cm33
4** MIMXRT633SFFOB_cm33
5** MIMXRT633SFVKB_cm33
6**
7** Compiler: GNU C Compiler
8** Reference manual: MIMXRT685 User manual Rev. 0.95 11 November 2019
9** Version: rev. 1.0, 2018-06-19
10** Build: b201029
11**
12** Abstract:
13** Linker file for the GNU C Compiler
14**
15** Copyright 2016 Freescale Semiconductor, Inc.
16** Copyright 2016-2020 NXP
17** All rights reserved.
18**
19** SPDX-License-Identifier: BSD-3-Clause
20**
21** http: www.nxp.com
22** mail: [email protected]
23**
24** ###################################################################
25*/
26
27
28
29/* Entry Point */
30ENTRY(Reset_Handler)
31
32HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
33STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
34M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000130 : 0;
35
36/* Specify the memory areas */
37/* The SRAM region [0x10000-0x1BFFF] is reserved for ROM code. */
38/* The SRAM region [0x0-0xFFFF], [0x1C000-0x7FFFF] is reserved for app-specific use cases. */
39MEMORY
40{
41 m_flash_config (RX) : ORIGIN = 0x08000400, LENGTH = 0x00000200
42 m_interrupts (RX) : ORIGIN = 0x08001000, LENGTH = 0x00000130
43 m_text (RX) : ORIGIN = 0x08001130, LENGTH = 0x001FEED0
44 m_data (RW) : ORIGIN = 0x20080000, LENGTH = 0x00180000
45 m_usb_sram (RW) : ORIGIN = 0x40140000, LENGTH = 0x00004000
46}
47
48/* Define output sections */
49SECTIONS
50{
51 .flash_config :
52 {
53 . = ALIGN(4);
54 __FLASH_BASE = .;
55 KEEP(* (.flash_conf)) /* flash config section */
56 . = ALIGN(4);
57 } > m_flash_config
58
59 /* The startup code goes first into internal ram */
60 .interrupts :
61 {
62 . = ALIGN(4);
63 __VECTOR_TABLE = .;
64 __Vectors = .;
65 KEEP(*(.isr_vector)) /* Startup code */
66 . = ALIGN(4);
67 } > m_interrupts
68
69 /* The program code and other data goes into internal ram */
70 .text :
71 {
72 . = ALIGN(4);
73 *(.text) /* .text sections (code) */
74 *(.text*) /* .text* sections (code) */
75 *(.rodata) /* .rodata sections (constants, strings, etc.) */
76 *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
77 *(.glue_7) /* glue arm to thumb code */
78 *(.glue_7t) /* glue thumb to arm code */
79 *(.eh_frame)
80 KEEP (*(.init))
81 KEEP (*(.fini))
82 . = ALIGN(4);
83 } > m_text
84
85 .ARM.extab :
86 {
87 *(.ARM.extab* .gnu.linkonce.armextab.*)
88 } > m_text
89
90 .ARM :
91 {
92 __exidx_start = .;
93 *(.ARM.exidx*)
94 __exidx_end = .;
95 } > m_text
96
97 .ctors :
98 {
99 __CTOR_LIST__ = .;
100 /* gcc uses crtbegin.o to find the start of
101 the constructors, so we make sure it is
102 first. Because this is a wildcard, it
103 doesn't matter if the user does not
104 actually link against crtbegin.o; the
105 linker won't look for a file to match a
106 wildcard. The wildcard also means that it
107 doesn't matter which directory crtbegin.o
108 is in. */
109 KEEP (*crtbegin.o(.ctors))
110 KEEP (*crtbegin?.o(.ctors))
111 /* We don't want to include the .ctor section from
112 from the crtend.o file until after the sorted ctors.
113 The .ctor section from the crtend file contains the
114 end of ctors marker and it must be last */
115 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
116 KEEP (*(SORT(.ctors.*)))
117 KEEP (*(.ctors))
118 __CTOR_END__ = .;
119 } > m_text
120
121 .dtors :
122 {
123 __DTOR_LIST__ = .;
124 KEEP (*crtbegin.o(.dtors))
125 KEEP (*crtbegin?.o(.dtors))
126 KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
127 KEEP (*(SORT(.dtors.*)))
128 KEEP (*(.dtors))
129 __DTOR_END__ = .;
130 } > m_text
131
132 .preinit_array :
133 {
134 PROVIDE_HIDDEN (__preinit_array_start = .);
135 KEEP (*(.preinit_array*))
136 PROVIDE_HIDDEN (__preinit_array_end = .);
137 } > m_text
138
139 .init_array :
140 {
141 PROVIDE_HIDDEN (__init_array_start = .);
142 KEEP (*(SORT(.init_array.*)))
143 KEEP (*(.init_array*))
144 PROVIDE_HIDDEN (__init_array_end = .);
145 } > m_text
146
147 .fini_array :
148 {
149 PROVIDE_HIDDEN (__fini_array_start = .);
150 KEEP (*(SORT(.fini_array.*)))
151 KEEP (*(.fini_array*))
152 PROVIDE_HIDDEN (__fini_array_end = .);
153 } > m_text
154
155 __etext = .; /* define a global symbol at end of code */
156 __DATA_ROM = .; /* Symbol is used by startup for data initialization */
157
158 .interrupts_ram :
159 {
160 . = ALIGN(4);
161 __VECTOR_RAM__ = .;
162 __interrupts_ram_start__ = .; /* Create a global symbol at data start */
163 *(.m_interrupts_ram) /* This is a user defined section */
164 . += M_VECTOR_RAM_SIZE;
165 . = ALIGN(4);
166 __interrupts_ram_end__ = .; /* Define a global symbol at data end */
167 } > m_data
168
169 __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
170 __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
171
172 .data : AT(__DATA_ROM)
173 {
174 . = ALIGN(4);
175 __DATA_RAM = .;
176 __data_start__ = .; /* create a global symbol at data start */
177 *(CodeQuickAccess) /* CodeQuickAccess sections */
178 *(DataQuickAccess) /* DataQuickAccess sections */
179 *(.data) /* .data sections */
180 *(.data*) /* .data* sections */
181 KEEP(*(.jcr*))
182 . = ALIGN(4);
183 __data_end__ = .; /* define a global symbol at data end */
184 } > m_data
185
186 __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
187 text_end = ORIGIN(m_text) + LENGTH(m_text);
188 ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
189 _image_size = __DATA_END - __VECTOR_TABLE;
190
191 /* Uninitialized data section */
192 .bss :
193 {
194 /* This is used by the startup in order to initialize the .bss section */
195 . = ALIGN(4);
196 __START_BSS = .;
197 __bss_start__ = .;
198 *(.bss)
199 *(.bss*)
200 *(COMMON)
201 . = ALIGN(4);
202 __bss_end__ = .;
203 __END_BSS = .;
204 } > m_data
205
206 .heap :
207 {
208 . = ALIGN(8);
209 __end__ = .;
210 PROVIDE(end = .);
211 __HeapBase = .;
212 . += HEAP_SIZE;
213 __HeapLimit = .;
214 __heap_limit = .; /* Add for _sbrk */
215 } > m_data
216
217 .stack :
218 {
219 . = ALIGN(8);
220 . += STACK_SIZE;
221 } > m_data
222
223 m_usb_bdt (NOLOAD) :
224 {
225 . = ALIGN(512);
226 *(m_usb_bdt)
227 } > m_usb_sram
228
229 m_usb_global (NOLOAD) :
230 {
231 *(m_usb_global)
232 } > m_usb_sram
233
234 /* Initializes stack on the end of block */
235 __StackTop = ORIGIN(m_data) + LENGTH(m_data);
236 __StackLimit = __StackTop - STACK_SIZE;
237 PROVIDE(__stack = __StackTop);
238
239 .ARM.attributes 0 : { *(.ARM.attributes) }
240
241 ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
242}
243