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-rw-r--r--lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/chconf.h756
-rw-r--r--lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/halconf.h531
-rw-r--r--lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h363
3 files changed, 1650 insertions, 0 deletions
diff --git a/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/chconf.h b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/chconf.h
new file mode 100644
index 000000000..68759e0dd
--- /dev/null
+++ b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/chconf.h
@@ -0,0 +1,756 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_1_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16, 32 or 64 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Idle thread automatic spawn suppression.
113 * @details When this option is activated the function @p chSysInit()
114 * does not spawn the idle thread. The application @p main()
115 * function becomes the idle thread and must implement an
116 * infinite loop.
117 */
118#if !defined(CH_CFG_NO_IDLE_THREAD)
119#define CH_CFG_NO_IDLE_THREAD FALSE
120#endif
121
122/** @} */
123
124/*===========================================================================*/
125/**
126 * @name Performance options
127 * @{
128 */
129/*===========================================================================*/
130
131/**
132 * @brief OS optimization.
133 * @details If enabled then time efficient rather than space efficient code
134 * is used when two possible implementations exist.
135 *
136 * @note This is not related to the compiler optimization options.
137 * @note The default is @p TRUE.
138 */
139#if !defined(CH_CFG_OPTIMIZE_SPEED)
140#define CH_CFG_OPTIMIZE_SPEED TRUE
141#endif
142
143/** @} */
144
145/*===========================================================================*/
146/**
147 * @name Subsystem options
148 * @{
149 */
150/*===========================================================================*/
151
152/**
153 * @brief Time Measurement APIs.
154 * @details If enabled then the time measurement APIs are included in
155 * the kernel.
156 *
157 * @note The default is @p TRUE.
158 */
159#if !defined(CH_CFG_USE_TM)
160#define CH_CFG_USE_TM TRUE
161#endif
162
163/**
164 * @brief Threads registry APIs.
165 * @details If enabled then the registry APIs are included in the kernel.
166 *
167 * @note The default is @p TRUE.
168 */
169#if !defined(CH_CFG_USE_REGISTRY)
170#define CH_CFG_USE_REGISTRY TRUE
171#endif
172
173/**
174 * @brief Threads synchronization APIs.
175 * @details If enabled then the @p chThdWait() function is included in
176 * the kernel.
177 *
178 * @note The default is @p TRUE.
179 */
180#if !defined(CH_CFG_USE_WAITEXIT)
181#define CH_CFG_USE_WAITEXIT TRUE
182#endif
183
184/**
185 * @brief Semaphores APIs.
186 * @details If enabled then the Semaphores APIs are included in the kernel.
187 *
188 * @note The default is @p TRUE.
189 */
190#if !defined(CH_CFG_USE_SEMAPHORES)
191#define CH_CFG_USE_SEMAPHORES TRUE
192#endif
193
194/**
195 * @brief Semaphores queuing mode.
196 * @details If enabled then the threads are enqueued on semaphores by
197 * priority rather than in FIFO order.
198 *
199 * @note The default is @p FALSE. Enable this if you have special
200 * requirements.
201 * @note Requires @p CH_CFG_USE_SEMAPHORES.
202 */
203#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
204#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
205#endif
206
207/**
208 * @brief Mutexes APIs.
209 * @details If enabled then the mutexes APIs are included in the kernel.
210 *
211 * @note The default is @p TRUE.
212 */
213#if !defined(CH_CFG_USE_MUTEXES)
214#define CH_CFG_USE_MUTEXES TRUE
215#endif
216
217/**
218 * @brief Enables recursive behavior on mutexes.
219 * @note Recursive mutexes are heavier and have an increased
220 * memory footprint.
221 *
222 * @note The default is @p FALSE.
223 * @note Requires @p CH_CFG_USE_MUTEXES.
224 */
225#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
226#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
227#endif
228
229/**
230 * @brief Conditional Variables APIs.
231 * @details If enabled then the conditional variables APIs are included
232 * in the kernel.
233 *
234 * @note The default is @p TRUE.
235 * @note Requires @p CH_CFG_USE_MUTEXES.
236 */
237#if !defined(CH_CFG_USE_CONDVARS)
238#define CH_CFG_USE_CONDVARS TRUE
239#endif
240
241/**
242 * @brief Conditional Variables APIs with timeout.
243 * @details If enabled then the conditional variables APIs with timeout
244 * specification are included in the kernel.
245 *
246 * @note The default is @p TRUE.
247 * @note Requires @p CH_CFG_USE_CONDVARS.
248 */
249#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
250#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
251#endif
252
253/**
254 * @brief Events Flags APIs.
255 * @details If enabled then the event flags APIs are included in the kernel.
256 *
257 * @note The default is @p TRUE.
258 */
259#if !defined(CH_CFG_USE_EVENTS)
260#define CH_CFG_USE_EVENTS TRUE
261#endif
262
263/**
264 * @brief Events Flags APIs with timeout.
265 * @details If enabled then the events APIs with timeout specification
266 * are included in the kernel.
267 *
268 * @note The default is @p TRUE.
269 * @note Requires @p CH_CFG_USE_EVENTS.
270 */
271#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
272#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
273#endif
274
275/**
276 * @brief Synchronous Messages APIs.
277 * @details If enabled then the synchronous messages APIs are included
278 * in the kernel.
279 *
280 * @note The default is @p TRUE.
281 */
282#if !defined(CH_CFG_USE_MESSAGES)
283#define CH_CFG_USE_MESSAGES TRUE
284#endif
285
286/**
287 * @brief Synchronous Messages queuing mode.
288 * @details If enabled then messages are served by priority rather than in
289 * FIFO order.
290 *
291 * @note The default is @p FALSE. Enable this if you have special
292 * requirements.
293 * @note Requires @p CH_CFG_USE_MESSAGES.
294 */
295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
296#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
297#endif
298
299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC TRUE
310#endif
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
322 * @brief Mailboxes APIs.
323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
324 * included in the kernel.
325 *
326 * @note The default is @p TRUE.
327 * @note Requires @p CH_CFG_USE_SEMAPHORES.
328 */
329#if !defined(CH_CFG_USE_MAILBOXES)
330#define CH_CFG_USE_MAILBOXES TRUE
331#endif
332
333/**
334 * @brief Core Memory Manager APIs.
335 * @details If enabled then the core memory manager APIs are included
336 * in the kernel.
337 *
338 * @note The default is @p TRUE.
339 */
340#if !defined(CH_CFG_USE_MEMCORE)
341#define CH_CFG_USE_MEMCORE TRUE
342#endif
343
344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
360 * @brief Heap Allocator APIs.
361 * @details If enabled then the memory heap allocator APIs are included
362 * in the kernel.
363 *
364 * @note The default is @p TRUE.
365 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
366 * @p CH_CFG_USE_SEMAPHORES.
367 * @note Mutexes are recommended.
368 */
369#if !defined(CH_CFG_USE_HEAP)
370#define CH_CFG_USE_HEAP TRUE
371#endif
372
373/**
374 * @brief Memory Pools Allocator APIs.
375 * @details If enabled then the memory pools allocator APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_MEMPOOLS)
381#define CH_CFG_USE_MEMPOOLS TRUE
382#endif
383
384/**
385 * @brief Objects FIFOs APIs.
386 * @details If enabled then the objects FIFOs APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 */
391#if !defined(CH_CFG_USE_OBJ_FIFOS)
392#define CH_CFG_USE_OBJ_FIFOS TRUE
393#endif
394
395/**
396 * @brief Pipes APIs.
397 * @details If enabled then the pipes APIs are included
398 * in the kernel.
399 *
400 * @note The default is @p TRUE.
401 */
402#if !defined(CH_CFG_USE_PIPES)
403#define CH_CFG_USE_PIPES TRUE
404#endif
405
406/**
407 * @brief Objects Caches APIs.
408 * @details If enabled then the objects caches APIs are included
409 * in the kernel.
410 *
411 * @note The default is @p TRUE.
412 */
413#if !defined(CH_CFG_USE_OBJ_CACHES)
414#define CH_CFG_USE_OBJ_CACHES TRUE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES TRUE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS TRUE
437#endif
438
439/** @} */
440
441/*===========================================================================*/
442/**
443 * @name Objects factory options
444 * @{
445 */
446/*===========================================================================*/
447
448/**
449 * @brief Objects Factory APIs.
450 * @details If enabled then the objects factory APIs are included in the
451 * kernel.
452 *
453 * @note The default is @p FALSE.
454 */
455#if !defined(CH_CFG_USE_FACTORY)
456#define CH_CFG_USE_FACTORY TRUE
457#endif
458
459/**
460 * @brief Maximum length for object names.
461 * @details If the specified length is zero then the name is stored by
462 * pointer but this could have unintended side effects.
463 */
464#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
465#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
466#endif
467
468/**
469 * @brief Enables the registry of generic objects.
470 */
471#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
472#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
473#endif
474
475/**
476 * @brief Enables factory for generic buffers.
477 */
478#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
479#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
480#endif
481
482/**
483 * @brief Enables factory for semaphores.
484 */
485#if !defined(CH_CFG_FACTORY_SEMAPHORES)
486#define CH_CFG_FACTORY_SEMAPHORES TRUE
487#endif
488
489/**
490 * @brief Enables factory for mailboxes.
491 */
492#if !defined(CH_CFG_FACTORY_MAILBOXES)
493#define CH_CFG_FACTORY_MAILBOXES TRUE
494#endif
495
496/**
497 * @brief Enables factory for objects FIFOs.
498 */
499#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
500#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
501#endif
502
503/**
504 * @brief Enables factory for Pipes.
505 */
506#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
507#define CH_CFG_FACTORY_PIPES TRUE
508#endif
509
510/** @} */
511
512/*===========================================================================*/
513/**
514 * @name Debug options
515 * @{
516 */
517/*===========================================================================*/
518
519/**
520 * @brief Debug option, kernel statistics.
521 *
522 * @note The default is @p FALSE.
523 */
524#if !defined(CH_DBG_STATISTICS)
525#define CH_DBG_STATISTICS FALSE
526#endif
527
528/**
529 * @brief Debug option, system state check.
530 * @details If enabled the correct call protocol for system APIs is checked
531 * at runtime.
532 *
533 * @note The default is @p FALSE.
534 */
535#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
536#define CH_DBG_SYSTEM_STATE_CHECK FALSE
537#endif
538
539/**
540 * @brief Debug option, parameters checks.
541 * @details If enabled then the checks on the API functions input
542 * parameters are activated.
543 *
544 * @note The default is @p FALSE.
545 */
546#if !defined(CH_DBG_ENABLE_CHECKS)
547#define CH_DBG_ENABLE_CHECKS FALSE
548#endif
549
550/**
551 * @brief Debug option, consistency checks.
552 * @details If enabled then all the assertions in the kernel code are
553 * activated. This includes consistency checks inside the kernel,
554 * runtime anomalies and port-defined checks.
555 *
556 * @note The default is @p FALSE.
557 */
558#if !defined(CH_DBG_ENABLE_ASSERTS)
559#define CH_DBG_ENABLE_ASSERTS FALSE
560#endif
561
562/**
563 * @brief Debug option, trace buffer.
564 * @details If enabled then the trace buffer is activated.
565 *
566 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
567 */
568#if !defined(CH_DBG_TRACE_MASK)
569#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
570#endif
571
572/**
573 * @brief Trace buffer entries.
574 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
575 * different from @p CH_DBG_TRACE_MASK_DISABLED.
576 */
577#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
578#define CH_DBG_TRACE_BUFFER_SIZE 128
579#endif
580
581/**
582 * @brief Debug option, stack checks.
583 * @details If enabled then a runtime stack check is performed.
584 *
585 * @note The default is @p FALSE.
586 * @note The stack check is performed in a architecture/port dependent way.
587 * It may not be implemented or some ports.
588 * @note The default failure mode is to halt the system with the global
589 * @p panic_msg variable set to @p NULL.
590 */
591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
592#define CH_DBG_ENABLE_STACK_CHECK FALSE
593#endif
594
595/**
596 * @brief Debug option, stacks initialization.
597 * @details If enabled then the threads working area is filled with a byte
598 * value when a thread is created. This can be useful for the
599 * runtime measurement of the used stack.
600 *
601 * @note The default is @p FALSE.
602 */
603#if !defined(CH_DBG_FILL_THREADS)
604#define CH_DBG_FILL_THREADS FALSE
605#endif
606
607/**
608 * @brief Debug option, threads profiling.
609 * @details If enabled then a field is added to the @p thread_t structure that
610 * counts the system ticks occurred while executing the thread.
611 *
612 * @note The default is @p FALSE.
613 * @note This debug option is not currently compatible with the
614 * tickless mode.
615 */
616#if !defined(CH_DBG_THREADS_PROFILING)
617#define CH_DBG_THREADS_PROFILING FALSE
618#endif
619
620/** @} */
621
622/*===========================================================================*/
623/**
624 * @name Kernel hooks
625 * @{
626 */
627/*===========================================================================*/
628
629/**
630 * @brief System structure extension.
631 * @details User fields added to the end of the @p ch_system_t structure.
632 */
633#define CH_CFG_SYSTEM_EXTRA_FIELDS \
634 /* Add threads custom fields here.*/
635
636/**
637 * @brief System initialization hook.
638 * @details User initialization code added to the @p chSysInit() function
639 * just before interrupts are enabled globally.
640 */
641#define CH_CFG_SYSTEM_INIT_HOOK() { \
642 /* Add threads initialization code here.*/ \
643}
644
645/**
646 * @brief Threads descriptor structure extension.
647 * @details User fields added to the end of the @p thread_t structure.
648 */
649#define CH_CFG_THREAD_EXTRA_FIELDS \
650 /* Add threads custom fields here.*/
651
652/**
653 * @brief Threads initialization hook.
654 * @details User initialization code added to the @p _thread_init() function.
655 *
656 * @note It is invoked from within @p _thread_init() and implicitly from all
657 * the threads creation APIs.
658 */
659#define CH_CFG_THREAD_INIT_HOOK(tp) { \
660 /* Add threads initialization code here.*/ \
661}
662
663/**
664 * @brief Threads finalization hook.
665 * @details User finalization code added to the @p chThdExit() API.
666 */
667#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
668 /* Add threads finalization code here.*/ \
669}
670
671/**
672 * @brief Context switch hook.
673 * @details This hook is invoked just before switching between threads.
674 */
675#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
676 /* Context switch code here.*/ \
677}
678
679/**
680 * @brief ISR enter hook.
681 */
682#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
683 /* IRQ prologue code here.*/ \
684}
685
686/**
687 * @brief ISR exit hook.
688 */
689#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
690 /* IRQ epilogue code here.*/ \
691}
692
693/**
694 * @brief Idle thread enter hook.
695 * @note This hook is invoked within a critical zone, no OS functions
696 * should be invoked from here.
697 * @note This macro can be used to activate a power saving mode.
698 */
699#define CH_CFG_IDLE_ENTER_HOOK() { \
700 /* Idle-enter code here.*/ \
701}
702
703/**
704 * @brief Idle thread leave hook.
705 * @note This hook is invoked within a critical zone, no OS functions
706 * should be invoked from here.
707 * @note This macro can be used to deactivate a power saving mode.
708 */
709#define CH_CFG_IDLE_LEAVE_HOOK() { \
710 /* Idle-leave code here.*/ \
711}
712
713/**
714 * @brief Idle Loop hook.
715 * @details This hook is continuously invoked by the idle thread loop.
716 */
717#define CH_CFG_IDLE_LOOP_HOOK() { \
718 /* Idle loop code here.*/ \
719}
720
721/**
722 * @brief System tick event hook.
723 * @details This hook is invoked in the system tick handler immediately
724 * after processing the virtual timers queue.
725 */
726#define CH_CFG_SYSTEM_TICK_HOOK() { \
727 /* System tick event code here.*/ \
728}
729
730/**
731 * @brief System halt hook.
732 * @details This hook is invoked in case to a system halting error before
733 * the system is halted.
734 */
735#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
736 /* System halt code here.*/ \
737}
738
739/**
740 * @brief Trace hook.
741 * @details This hook is invoked each time a new record is written in the
742 * trace buffer.
743 */
744#define CH_CFG_TRACE_HOOK(tep) { \
745 /* Trace code here.*/ \
746}
747
748/** @} */
749
750/*===========================================================================*/
751/* Port-specific settings (override port settings defaulted in chcore.h). */
752/*===========================================================================*/
753
754#endif /* CHCONF_H */
755
756/** @} */
diff --git a/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/halconf.h b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/halconf.h
new file mode 100644
index 000000000..5e342d8c6
--- /dev/null
+++ b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/halconf.h
@@ -0,0 +1,531 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_1_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
76#endif
77
78/**
79 * @brief Enables the GPT subsystem.
80 */
81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
82#define HAL_USE_GPT FALSE
83#endif
84
85/**
86 * @brief Enables the I2C subsystem.
87 */
88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
89#define HAL_USE_I2C FALSE
90#endif
91
92/**
93 * @brief Enables the I2S subsystem.
94 */
95#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
96#define HAL_USE_I2S FALSE
97#endif
98
99/**
100 * @brief Enables the ICU subsystem.
101 */
102#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
103#define HAL_USE_ICU FALSE
104#endif
105
106/**
107 * @brief Enables the MAC subsystem.
108 */
109#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
110#define HAL_USE_MAC FALSE
111#endif
112
113/**
114 * @brief Enables the MMC_SPI subsystem.
115 */
116#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
117#define HAL_USE_MMC_SPI FALSE
118#endif
119
120/**
121 * @brief Enables the PWM subsystem.
122 */
123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
124#define HAL_USE_PWM FALSE
125#endif
126
127/**
128 * @brief Enables the RTC subsystem.
129 */
130#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
131#define HAL_USE_RTC FALSE
132#endif
133
134/**
135 * @brief Enables the SDC subsystem.
136 */
137#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
138#define HAL_USE_SDC FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL subsystem.
143 */
144#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL TRUE
146#endif
147
148/**
149 * @brief Enables the SERIAL over USB subsystem.
150 */
151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
152#define HAL_USE_SERIAL_USB FALSE
153#endif
154
155/**
156 * @brief Enables the SIO subsystem.
157 */
158#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
159#define HAL_USE_SIO FALSE
160#endif
161
162/**
163 * @brief Enables the SPI subsystem.
164 */
165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
166#define HAL_USE_SPI FALSE
167#endif
168
169/**
170 * @brief Enables the TRNG subsystem.
171 */
172#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
173#define HAL_USE_TRNG FALSE
174#endif
175
176/**
177 * @brief Enables the UART subsystem.
178 */
179#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
180#define HAL_USE_UART FALSE
181#endif
182
183/**
184 * @brief Enables the USB subsystem.
185 */
186#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
187#define HAL_USE_USB FALSE
188#endif
189
190/**
191 * @brief Enables the WDG subsystem.
192 */
193#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
194#define HAL_USE_WDG FALSE
195#endif
196
197/**
198 * @brief Enables the WSPI subsystem.
199 */
200#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
201#define HAL_USE_WSPI FALSE
202#endif
203
204/*===========================================================================*/
205/* PAL driver related settings. */
206/*===========================================================================*/
207
208/**
209 * @brief Enables synchronous APIs.
210 * @note Disabling this option saves both code and data space.
211 */
212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
213#define PAL_USE_CALLBACKS FALSE
214#endif
215
216/**
217 * @brief Enables synchronous APIs.
218 * @note Disabling this option saves both code and data space.
219 */
220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
221#define PAL_USE_WAIT FALSE
222#endif
223
224/*===========================================================================*/
225/* ADC driver related settings. */
226/*===========================================================================*/
227
228/**
229 * @brief Enables synchronous APIs.
230 * @note Disabling this option saves both code and data space.
231 */
232#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
233#define ADC_USE_WAIT TRUE
234#endif
235
236/**
237 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
238 * @note Disabling this option saves both code and data space.
239 */
240#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
241#define ADC_USE_MUTUAL_EXCLUSION TRUE
242#endif
243
244/*===========================================================================*/
245/* CAN driver related settings. */
246/*===========================================================================*/
247
248/**
249 * @brief Sleep mode related APIs inclusion switch.
250 */
251#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
252#define CAN_USE_SLEEP_MODE TRUE
253#endif
254
255/**
256 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
257 */
258#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
259#define CAN_ENFORCE_USE_CALLBACKS FALSE
260#endif
261
262/*===========================================================================*/
263/* CRY driver related settings. */
264/*===========================================================================*/
265
266/**
267 * @brief Enables the SW fall-back of the cryptographic driver.
268 * @details When enabled, this option, activates a fall-back software
269 * implementation for algorithms not supported by the underlying
270 * hardware.
271 * @note Fall-back implementations may not be present for all algorithms.
272 */
273#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_USE_FALLBACK FALSE
275#endif
276
277/**
278 * @brief Makes the driver forcibly use the fall-back implementations.
279 */
280#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
281#define HAL_CRY_ENFORCE_FALLBACK FALSE
282#endif
283
284/*===========================================================================*/
285/* DAC driver related settings. */
286/*===========================================================================*/
287
288/**
289 * @brief Enables synchronous APIs.
290 * @note Disabling this option saves both code and data space.
291 */
292#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
293#define DAC_USE_WAIT TRUE
294#endif
295
296/**
297 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
298 * @note Disabling this option saves both code and data space.
299 */
300#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
301#define DAC_USE_MUTUAL_EXCLUSION TRUE
302#endif
303
304/*===========================================================================*/
305/* I2C driver related settings. */
306/*===========================================================================*/
307
308/**
309 * @brief Enables the mutual exclusion APIs on the I2C bus.
310 */
311#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
312#define I2C_USE_MUTUAL_EXCLUSION TRUE
313#endif
314
315/*===========================================================================*/
316/* MAC driver related settings. */
317/*===========================================================================*/
318
319/**
320 * @brief Enables the zero-copy API.
321 */
322#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
323#define MAC_USE_ZERO_COPY FALSE
324#endif
325
326/**
327 * @brief Enables an event sources for incoming packets.
328 */
329#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
330#define MAC_USE_EVENTS TRUE
331#endif
332
333/*===========================================================================*/
334/* MMC_SPI driver related settings. */
335/*===========================================================================*/
336
337/**
338 * @brief Delays insertions.
339 * @details If enabled this options inserts delays into the MMC waiting
340 * routines releasing some extra CPU time for the threads with
341 * lower priority, this may slow down the driver a bit however.
342 * This option is recommended also if the SPI driver does not
343 * use a DMA channel and heavily loads the CPU.
344 */
345#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
346#define MMC_NICE_WAITING TRUE
347#endif
348
349/*===========================================================================*/
350/* SDC driver related settings. */
351/*===========================================================================*/
352
353/**
354 * @brief Number of initialization attempts before rejecting the card.
355 * @note Attempts are performed at 10mS intervals.
356 */
357#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
358#define SDC_INIT_RETRY 100
359#endif
360
361/**
362 * @brief Include support for MMC cards.
363 * @note MMC support is not yet implemented so this option must be kept
364 * at @p FALSE.
365 */
366#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
367#define SDC_MMC_SUPPORT FALSE
368#endif
369
370/**
371 * @brief Delays insertions.
372 * @details If enabled this options inserts delays into the MMC waiting
373 * routines releasing some extra CPU time for the threads with
374 * lower priority, this may slow down the driver a bit however.
375 */
376#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
377#define SDC_NICE_WAITING TRUE
378#endif
379
380/**
381 * @brief OCR initialization constant for V20 cards.
382 */
383#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR_V20 0x50FF8000U
385#endif
386
387/**
388 * @brief OCR initialization constant for non-V20 cards.
389 */
390#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
391#define SDC_INIT_OCR 0x80100000U
392#endif
393
394/*===========================================================================*/
395/* SERIAL driver related settings. */
396/*===========================================================================*/
397
398/**
399 * @brief Default bit rate.
400 * @details Configuration parameter, this is the baud rate selected for the
401 * default configuration.
402 */
403#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
404#define SERIAL_DEFAULT_BITRATE 38400
405#endif
406
407/**
408 * @brief Serial buffers size.
409 * @details Configuration parameter, you can change the depth of the queue
410 * buffers depending on the requirements of your application.
411 * @note The default is 16 bytes for both the transmission and receive
412 * buffers.
413 */
414#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
415#define SERIAL_BUFFERS_SIZE 16
416#endif
417
418/*===========================================================================*/
419/* SERIAL_USB driver related setting. */
420/*===========================================================================*/
421
422/**
423 * @brief Serial over USB buffers size.
424 * @details Configuration parameter, the buffer size must be a multiple of
425 * the USB data endpoint maximum packet size.
426 * @note The default is 256 bytes for both the transmission and receive
427 * buffers.
428 */
429#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
430#define SERIAL_USB_BUFFERS_SIZE 256
431#endif
432
433/**
434 * @brief Serial over USB number of buffers.
435 * @note The default is 2 buffers.
436 */
437#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
438#define SERIAL_USB_BUFFERS_NUMBER 2
439#endif
440
441/*===========================================================================*/
442/* SPI driver related settings. */
443/*===========================================================================*/
444
445/**
446 * @brief Enables synchronous APIs.
447 * @note Disabling this option saves both code and data space.
448 */
449#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
450#define SPI_USE_WAIT TRUE
451#endif
452
453/**
454 * @brief Enables circular transfers APIs.
455 * @note Disabling this option saves both code and data space.
456 */
457#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
458#define SPI_USE_CIRCULAR FALSE
459#endif
460
461/**
462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
463 * @note Disabling this option saves both code and data space.
464 */
465#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
466#define SPI_USE_MUTUAL_EXCLUSION TRUE
467#endif
468
469/**
470 * @brief Handling method for SPI CS line.
471 * @note Disabling this option saves both code and data space.
472 */
473#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
474#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
475#endif
476
477/*===========================================================================*/
478/* UART driver related settings. */
479/*===========================================================================*/
480
481/**
482 * @brief Enables synchronous APIs.
483 * @note Disabling this option saves both code and data space.
484 */
485#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
486#define UART_USE_WAIT FALSE
487#endif
488
489/**
490 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
491 * @note Disabling this option saves both code and data space.
492 */
493#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
494#define UART_USE_MUTUAL_EXCLUSION FALSE
495#endif
496
497/*===========================================================================*/
498/* USB driver related settings. */
499/*===========================================================================*/
500
501/**
502 * @brief Enables synchronous APIs.
503 * @note Disabling this option saves both code and data space.
504 */
505#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
506#define USB_USE_WAIT FALSE
507#endif
508
509/*===========================================================================*/
510/* WSPI driver related settings. */
511/*===========================================================================*/
512
513/**
514 * @brief Enables synchronous APIs.
515 * @note Disabling this option saves both code and data space.
516 */
517#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
518#define WSPI_USE_WAIT TRUE
519#endif
520
521/**
522 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
523 * @note Disabling this option saves both code and data space.
524 */
525#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
526#define WSPI_USE_MUTUAL_EXCLUSION TRUE
527#endif
528
529#endif /* HALCONF_H */
530
531/** @} */
diff --git a/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
new file mode 100644
index 000000000..01084a149
--- /dev/null
+++ b/lib/chibios/demos/STM32/RT-STM32L4R9-DISCOVERY/cfg/mcuconf.h
@@ -0,0 +1,363 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * STM32L4xx drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 15...0 Lowest...Highest.
26 *
27 * DMA priorities:
28 * 0...3 Lowest...Highest.
29 */
30
31#ifndef MCUCONF_H
32#define MCUCONF_H
33
34#define STM32L4xx_MCUCONF
35#define STM32L4R5_MCUCONF
36#define STM32L4S5_MCUCONF
37#define STM32L4R7_MCUCONF
38#define STM32L4S7_MCUCONF
39#define STM32L4R9_MCUCONF
40#define STM32L4S9_MCUCONF
41
42/*
43 * HAL driver system settings.
44 */
45#define STM32_NO_INIT FALSE
46#define STM32_VOS STM32_VOS_RANGE1
47#define STM32_PVD_ENABLE FALSE
48#define STM32_PLS STM32_PLS_LEV0
49#define STM32_HSI16_ENABLED FALSE
50#define STM32_HSI48_ENABLED FALSE
51#define STM32_LSI_ENABLED TRUE
52#define STM32_HSE_ENABLED TRUE
53#define STM32_LSE_ENABLED FALSE
54#define STM32_MSIPLL_ENABLED FALSE
55#define STM32_MSIRANGE STM32_MSIRANGE_4M
56#define STM32_MSISRANGE STM32_MSISRANGE_4M
57#define STM32_SW STM32_SW_PLL
58#define STM32_PLLSRC STM32_PLLSRC_HSE
59#define STM32_PLLM_VALUE 4
60#define STM32_PLLN_VALUE 60
61#define STM32_PLLPDIV_VALUE 0
62#define STM32_PLLP_VALUE 7
63#define STM32_PLLQ_VALUE 4
64#define STM32_PLLR_VALUE 2
65#define STM32_HPRE STM32_HPRE_DIV1
66#define STM32_PPRE1 STM32_PPRE1_DIV1
67#define STM32_PPRE2 STM32_PPRE2_DIV1
68#define STM32_STOPWUCK STM32_STOPWUCK_MSI
69#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
70#define STM32_MCOPRE STM32_MCOPRE_DIV1
71#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
72#define STM32_PLLSAI1M_VALUE 4
73#define STM32_PLLSAI1N_VALUE 72
74#define STM32_PLLSAI1PDIV_VALUE 6
75#define STM32_PLLSAI1P_VALUE 7
76#define STM32_PLLSAI1Q_VALUE 6
77#define STM32_PLLSAI1R_VALUE 6
78#define STM32_PLLSAI2M_VALUE 4
79#define STM32_PLLSAI2N_VALUE 72
80#define STM32_PLLSAI2PDIV_VALUE 6
81#define STM32_PLLSAI2P_VALUE 7
82#define STM32_PLLSAI2Q_VALUE 6
83#define STM32_PLLSAI2R_VALUE 6
84#define STM32_PLLSAI2DIVR STM32_PLLSAI2DIVR_DIV16
85
86/*
87 * Peripherals clock sources.
88 */
89#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
90#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
91#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
92#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
93#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
94#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
95#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
96#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
97#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
98#define STM32_I2C4SEL STM32_I2C4SEL_SYSCLK
99#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
100#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
101#define STM32_CLK48SEL STM32_CLK48SEL_PLLSAI1
102#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
103#define STM32_DFSDMSEL STM32_DFSDMSEL_PCLK2
104#define STM32_ADFSDMSEL STM32_ADFSDMSEL_SAI1CLK
105#define STM32_SAI1SEL STM32_SAI1SEL_OFF
106#define STM32_SAI2SEL STM32_SAI2SEL_OFF
107#define STM32_DSISEL STM32_DSISEL_DSIPHY
108#define STM32_SDMMCSEL STM32_SDMMCSEL_48CLK
109#define STM32_OSPISEL STM32_OSPISEL_SYSCLK
110#define STM32_RTCSEL STM32_RTCSEL_LSI
111
112/*
113 * IRQ system settings.
114 */
115#define STM32_IRQ_EXTI0_PRIORITY 6
116#define STM32_IRQ_EXTI1_PRIORITY 6
117#define STM32_IRQ_EXTI2_PRIORITY 6
118#define STM32_IRQ_EXTI3_PRIORITY 6
119#define STM32_IRQ_EXTI4_PRIORITY 6
120#define STM32_IRQ_EXTI5_9_PRIORITY 6
121#define STM32_IRQ_EXTI10_15_PRIORITY 6
122#define STM32_IRQ_EXTI1635_38_PRIORITY 6
123#define STM32_IRQ_EXTI18_PRIORITY 6
124#define STM32_IRQ_EXTI19_PRIORITY 6
125#define STM32_IRQ_EXTI20_PRIORITY 6
126#define STM32_IRQ_EXTI21_22_PRIORITY 6
127
128#define STM32_IRQ_SDMMC1_PRIORITY 9
129
130#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
131#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
132#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
133#define STM32_IRQ_TIM1_CC_PRIORITY 7
134#define STM32_IRQ_TIM2_PRIORITY 7
135#define STM32_IRQ_TIM3_PRIORITY 7
136#define STM32_IRQ_TIM4_PRIORITY 7
137#define STM32_IRQ_TIM5_PRIORITY 7
138#define STM32_IRQ_TIM6_PRIORITY 7
139#define STM32_IRQ_TIM7_PRIORITY 7
140#define STM32_IRQ_TIM8_UP_PRIORITY 7
141#define STM32_IRQ_TIM8_CC_PRIORITY 7
142
143#define STM32_IRQ_USART1_PRIORITY 12
144#define STM32_IRQ_USART2_PRIORITY 12
145#define STM32_IRQ_USART3_PRIORITY 12
146#define STM32_IRQ_UART4_PRIORITY 12
147#define STM32_IRQ_UART5_PRIORITY 12
148#define STM32_IRQ_LPUART1_PRIORITY 12
149
150/*
151 * ADC driver system settings.
152 */
153#define STM32_ADC_COMPACT_SAMPLES FALSE
154#define STM32_ADC_USE_ADC1 FALSE
155#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
156#define STM32_ADC_ADC1_DMA_PRIORITY 2
157#define STM32_ADC_ADC12_IRQ_PRIORITY 5
158#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
159#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV2
160#define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2
161
162/*
163 * CAN driver system settings.
164 */
165#define STM32_CAN_USE_CAN1 FALSE
166#define STM32_CAN_CAN1_IRQ_PRIORITY 11
167
168/*
169 * DAC driver system settings.
170 */
171#define STM32_DAC_DUAL_MODE FALSE
172#define STM32_DAC_USE_DAC1_CH1 FALSE
173#define STM32_DAC_USE_DAC1_CH2 FALSE
174#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
175#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
176#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
177#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
178#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
179#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
180
181/*
182 * GPT driver system settings.
183 */
184#define STM32_GPT_USE_TIM1 FALSE
185#define STM32_GPT_USE_TIM2 FALSE
186#define STM32_GPT_USE_TIM3 FALSE
187#define STM32_GPT_USE_TIM4 FALSE
188#define STM32_GPT_USE_TIM5 FALSE
189#define STM32_GPT_USE_TIM6 FALSE
190#define STM32_GPT_USE_TIM7 FALSE
191#define STM32_GPT_USE_TIM8 FALSE
192#define STM32_GPT_USE_TIM15 FALSE
193#define STM32_GPT_USE_TIM16 FALSE
194#define STM32_GPT_USE_TIM17 FALSE
195
196/*
197 * I2C driver system settings.
198 */
199#define STM32_I2C_USE_I2C1 FALSE
200#define STM32_I2C_USE_I2C2 FALSE
201#define STM32_I2C_USE_I2C3 FALSE
202#define STM32_I2C_USE_I2C4 FALSE
203#define STM32_I2C_BUSY_TIMEOUT 50
204#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
205#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
206#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
207#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
208#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
209#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
210#define STM32_I2C_I2C4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
211#define STM32_I2C_I2C4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
212#define STM32_I2C_I2C1_IRQ_PRIORITY 5
213#define STM32_I2C_I2C2_IRQ_PRIORITY 5
214#define STM32_I2C_I2C3_IRQ_PRIORITY 5
215#define STM32_I2C_I2C4_IRQ_PRIORITY 5
216#define STM32_I2C_I2C1_DMA_PRIORITY 3
217#define STM32_I2C_I2C2_DMA_PRIORITY 3
218#define STM32_I2C_I2C3_DMA_PRIORITY 3
219#define STM32_I2C_I2C4_DMA_PRIORITY 3
220#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
221
222/*
223 * ICU driver system settings.
224 */
225#define STM32_ICU_USE_TIM1 FALSE
226#define STM32_ICU_USE_TIM2 FALSE
227#define STM32_ICU_USE_TIM3 FALSE
228#define STM32_ICU_USE_TIM4 FALSE
229#define STM32_ICU_USE_TIM5 FALSE
230#define STM32_ICU_USE_TIM8 FALSE
231#define STM32_ICU_USE_TIM15 FALSE
232#define STM32_ICU_USE_TIM16 FALSE
233#define STM32_ICU_USE_TIM17 FALSE
234
235/*
236 * PWM driver system settings.
237 */
238#define STM32_PWM_USE_ADVANCED FALSE
239#define STM32_PWM_USE_TIM1 FALSE
240#define STM32_PWM_USE_TIM2 FALSE
241#define STM32_PWM_USE_TIM3 FALSE
242#define STM32_PWM_USE_TIM4 FALSE
243#define STM32_PWM_USE_TIM5 FALSE
244#define STM32_PWM_USE_TIM8 FALSE
245#define STM32_PWM_USE_TIM15 FALSE
246#define STM32_PWM_USE_TIM16 FALSE
247#define STM32_PWM_USE_TIM17 FALSE
248
249/*
250 * RTC driver system settings.
251 */
252#define STM32_RTC_PRESA_VALUE 32
253#define STM32_RTC_PRESS_VALUE 1024
254#define STM32_RTC_CR_INIT 0
255#define STM32_RTC_TAMPCR_INIT 0
256
257/*
258 * SDC driver system settings.
259 */
260#define STM32_SDC_USE_SDMMC1 FALSE
261#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE
262#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000000
263#define STM32_SDC_SDMMC_READ_TIMEOUT 1000000
264#define STM32_SDC_SDMMC_CLOCK_DELAY 10
265#define STM32_SDC_SDMMC_PWRSAV TRUE
266#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
267
268/*
269 * SERIAL driver system settings.
270 */
271#define STM32_SERIAL_USE_USART1 FALSE
272#define STM32_SERIAL_USE_USART2 TRUE
273#define STM32_SERIAL_USE_USART3 FALSE
274#define STM32_SERIAL_USE_UART4 FALSE
275#define STM32_SERIAL_USE_UART5 FALSE
276#define STM32_SERIAL_USE_LPUART1 FALSE
277
278/*
279 * SPI driver system settings.
280 */
281#define STM32_SPI_USE_SPI1 FALSE
282#define STM32_SPI_USE_SPI2 FALSE
283#define STM32_SPI_USE_SPI3 FALSE
284#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
285#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
286#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
287#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
288#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
289#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
290#define STM32_SPI_SPI1_DMA_PRIORITY 1
291#define STM32_SPI_SPI2_DMA_PRIORITY 1
292#define STM32_SPI_SPI3_DMA_PRIORITY 1
293#define STM32_SPI_SPI1_IRQ_PRIORITY 10
294#define STM32_SPI_SPI2_IRQ_PRIORITY 10
295#define STM32_SPI_SPI3_IRQ_PRIORITY 10
296#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
297
298/*
299 * ST driver system settings.
300 */
301#define STM32_ST_IRQ_PRIORITY 8
302#define STM32_ST_USE_TIMER 2
303
304/*
305 * TRNG driver system settings.
306 */
307#define STM32_TRNG_USE_RNG1 FALSE
308
309/*
310 * UART driver system settings.
311 */
312#define STM32_UART_USE_USART1 FALSE
313#define STM32_UART_USE_USART2 FALSE
314#define STM32_UART_USE_USART3 FALSE
315#define STM32_UART_USE_UART4 FALSE
316#define STM32_UART_USE_UART5 FALSE
317#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
318#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
319#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
320#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
321#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
322#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
323#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
324#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
325#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
326#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY
327#define STM32_UART_USART1_DMA_PRIORITY 0
328#define STM32_UART_USART2_DMA_PRIORITY 0
329#define STM32_UART_USART3_DMA_PRIORITY 0
330#define STM32_UART_UART4_DMA_PRIORITY 0
331#define STM32_UART_UART5_DMA_PRIORITY 0
332#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
333
334/*
335 * USB driver system settings.
336 */
337#define STM32_USB_USE_OTG1 FALSE
338#define STM32_USB_OTG1_IRQ_PRIORITY 14
339#define STM32_USB_OTG1_RX_FIFO_SIZE 512
340
341/*
342 * WDG driver system settings.
343 */
344#define STM32_WDG_USE_IWDG FALSE
345
346/*
347 * WSPI driver system settings.
348 */
349#define STM32_WSPI_USE_OCTOSPI1 TRUE
350#define STM32_WSPI_USE_OCTOSPI2 TRUE
351#define STM32_WSPI_OCTOSPI1_PRESCALER_VALUE 1
352#define STM32_WSPI_OCTOSPI2_PRESCALER_VALUE 1
353#define STM32_WSPI_OCTOSPI1_IRQ_PRIORITY 10
354#define STM32_WSPI_OCTOSPI2_IRQ_PRIORITY 10
355#define STM32_WSPI_OCTOSPI1_DMA_STREAM STM32_DMA_STREAM_ID_ANY
356#define STM32_WSPI_OCTOSPI2_DMA_STREAM STM32_DMA_STREAM_ID_ANY
357#define STM32_WSPI_OCTOSPI1_DMA_PRIORITY 1
358#define STM32_WSPI_OCTOSPI2_DMA_PRIORITY 1
359#define STM32_WSPI_OCTOSPI1_DMA_IRQ_PRIORITY 10
360#define STM32_WSPI_OCTOSPI2_DMA_IRQ_PRIORITY 10
361#define STM32_WSPI_DMA_ERROR_HOOK(qspip) osalSysHalt("DMA failure")
362
363#endif /* MCUCONF_H */
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 22:44:08 +0100