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Diffstat (limited to 'lib/chibios/os/common/startup/ARMCMx/compilers/IAR/cstartup.s')
-rw-r--r-- | lib/chibios/os/common/startup/ARMCMx/compilers/IAR/cstartup.s | 169 |
1 files changed, 169 insertions, 0 deletions
diff --git a/lib/chibios/os/common/startup/ARMCMx/compilers/IAR/cstartup.s b/lib/chibios/os/common/startup/ARMCMx/compilers/IAR/cstartup.s new file mode 100644 index 000000000..f75dd1823 --- /dev/null +++ b/lib/chibios/os/common/startup/ARMCMx/compilers/IAR/cstartup.s | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /** | ||
18 | * @file ARMCMx/compilers/IAR/cstartup.s | ||
19 | * @brief Generic IAR Cortex-Mx startup file. | ||
20 | * | ||
21 | * @addtogroup ARMCMx_IAR_STARTUP | ||
22 | * @{ | ||
23 | */ | ||
24 | |||
25 | #if !defined(__DOXYGEN__) | ||
26 | |||
27 | #define SCB_VTOR 0xE000ED08 | ||
28 | |||
29 | /** | ||
30 | * @brief VTOR special register initialization. | ||
31 | * @details VTOR is initialized to point to the vectors table. | ||
32 | * @note IAR assembler #if directive conditions do not work like C/C++ conditions. | ||
33 | * @details Set to 0 to disable the function, 1 to enable | ||
34 | */ | ||
35 | #ifndef CRT0_VTOR_INIT | ||
36 | #define CRT0_VTOR_INIT 1 | ||
37 | #endif | ||
38 | /** | ||
39 | * @brief Stack segments initialization value. | ||
40 | */ | ||
41 | #ifndef CRT0_STACKS_FILL_PATTERN | ||
42 | #define CRT0_STACKS_FILL_PATTERN 0x55555555 | ||
43 | #endif | ||
44 | |||
45 | /** | ||
46 | * @brief Stack segments initialization switch. | ||
47 | * @details Set to 0 to disable the function, 1 to enable | ||
48 | */ | ||
49 | #ifndef CRT0_INIT_STACKS | ||
50 | #define CRT0_INIT_STACKS 1 | ||
51 | #endif | ||
52 | |||
53 | /** | ||
54 | * @brief Heap segment initialization value. | ||
55 | */ | ||
56 | #ifndef CRT0_HEAP_FILL_PATTERN | ||
57 | #define CRT0_HEAP_FILL_PATTERN 0xCCCCCCCC | ||
58 | #endif | ||
59 | |||
60 | /** | ||
61 | * @brief Heap segment initialization switch. | ||
62 | * @details Set to 0 to disable the function, 1 to enable | ||
63 | */ | ||
64 | #ifndef CRT0_INIT_HEAP | ||
65 | #define CRT0_INIT_HEAP 1 | ||
66 | #endif | ||
67 | |||
68 | |||
69 | MODULE ?cstartup | ||
70 | |||
71 | CONTROL_MODE_PRIVILEGED SET 0 | ||
72 | CONTROL_MODE_UNPRIVILEGED SET 1 | ||
73 | CONTROL_USE_MSP SET 0 | ||
74 | CONTROL_USE_PSP SET 2 | ||
75 | |||
76 | AAPCS INTERWORK, VFP_COMPATIBLE, ROPI | ||
77 | PRESERVE8 | ||
78 | |||
79 | SECTION HEAP:DATA:NOROOT(3) | ||
80 | PUBLIC __heap_base__ | ||
81 | __heap_base__: /* Note: heap section defines sysheap base */ | ||
82 | |||
83 | SECTION SYSHEAP:DATA:NOROOT(3) | ||
84 | PUBLIC __heap_end__ | ||
85 | __heap_end__: /* Note: sysheap section defines sysheap end */ | ||
86 | |||
87 | PUBLIC __iar_program_start | ||
88 | EXTWEAK __iar_init_core | ||
89 | EXTWEAK __iar_init_vfp | ||
90 | EXTERN __cmain | ||
91 | EXTERN __vector_table | ||
92 | EXTERN __main_stack_base__ | ||
93 | EXTERN __main_stack_end__ | ||
94 | EXTERN __process_stack_base__ | ||
95 | EXTERN __process_stack_end__ | ||
96 | |||
97 | SECTION IRQSTACK:DATA:NOROOT(3) | ||
98 | SECTION CSTACK:DATA:NOROOT(3) | ||
99 | SECTION .text:CODE:REORDER(2) | ||
100 | THUMB | ||
101 | |||
102 | __iar_program_start: | ||
103 | cpsid i | ||
104 | ldr r0, =SFE(IRQSTACK) | ||
105 | msr MSP, r0 | ||
106 | ldr r0, =SFE(CSTACK) | ||
107 | msr PSP, r0 | ||
108 | movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP | ||
109 | msr CONTROL, r0 | ||
110 | isb | ||
111 | |||
112 | #if (CRT0_VTOR_INIT) | ||
113 | ldr r0, =__vector_table | ||
114 | movw r1, #SCB_VTOR & 0xFFFF | ||
115 | movt r1, #SCB_VTOR >> 16 | ||
116 | str r0, [r1] | ||
117 | #endif | ||
118 | |||
119 | #if (CRT0_INIT_STACKS) | ||
120 | ldr r0, =CRT0_STACKS_FILL_PATTERN | ||
121 | /* Main Stack initialization. Note, it assumes that the stack size | ||
122 | is a multiple of 4 so the linker file must ensure this.*/ | ||
123 | ldr r1, =__main_stack_base__ | ||
124 | ldr r2, =__main_stack_end__ | ||
125 | msloop: | ||
126 | cmp r1, r2 | ||
127 | itt lo | ||
128 | strlo r0, [r1], #4 | ||
129 | blo msloop | ||
130 | |||
131 | /* Process Stack initialization. Note, it assumes that the stack size | ||
132 | is a multiple of 4 so the linker file must ensure this.*/ | ||
133 | ldr r1, =__process_stack_base__ | ||
134 | ldr r2, =__process_stack_end__ | ||
135 | psloop: | ||
136 | cmp r1, r2 | ||
137 | itt lo | ||
138 | strlo r0, [r1], #4 | ||
139 | blo psloop | ||
140 | #endif | ||
141 | |||
142 | #if (CRT0_INIT_HEAP) | ||
143 | ldr r0, =CRT0_HEAP_FILL_PATTERN | ||
144 | /* Sys Heap initialization. Note, it assumes that the heap size | ||
145 | is a multiple of 4 so the linker file must ensure this.*/ | ||
146 | ldr r1, =__heap_base__ | ||
147 | ldr r2, =__heap_end__ | ||
148 | hloop: | ||
149 | cmp r1, r2 | ||
150 | itt lo | ||
151 | strlo r0, [r1], #4 | ||
152 | blo hloop | ||
153 | #endif | ||
154 | |||
155 | bl __early_init | ||
156 | bl __iar_init_core | ||
157 | bl __iar_init_vfp | ||
158 | b __cmain | ||
159 | |||
160 | SECTION .text:CODE:NOROOT:REORDER(2) | ||
161 | PUBWEAK __early_init | ||
162 | __early_init: | ||
163 | bx lr | ||
164 | |||
165 | END | ||
166 | |||
167 | #endif /* !defined(__DOXYGEN__) */ | ||
168 | |||
169 | /**< @} */ | ||