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Diffstat (limited to 'lib/chibios/os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h')
-rw-r--r-- | lib/chibios/os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h | 206 |
1 files changed, 206 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h b/lib/chibios/os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h new file mode 100644 index 000000000..c93b688b9 --- /dev/null +++ b/lib/chibios/os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h | |||
@@ -0,0 +1,206 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /** | ||
18 | * @file STM32H7xx/stm32_dmamux.h | ||
19 | * @brief STM32H7xx DMAMUX handler header. | ||
20 | * | ||
21 | * @addtogroup STM32H7xx_DMAMUX | ||
22 | * @{ | ||
23 | */ | ||
24 | |||
25 | #ifndef STM32_DMAMUX_H | ||
26 | #define STM32_DMAMUX_H | ||
27 | |||
28 | /*===========================================================================*/ | ||
29 | /* Driver constants. */ | ||
30 | /*===========================================================================*/ | ||
31 | |||
32 | /** | ||
33 | * @name DMAMUX1 request sources | ||
34 | * @{ | ||
35 | */ | ||
36 | #define STM32_DMAMUX1_REQ_GEN0 1 | ||
37 | #define STM32_DMAMUX1_REQ_GEN1 2 | ||
38 | #define STM32_DMAMUX1_REQ_GEN2 3 | ||
39 | #define STM32_DMAMUX1_REQ_GEN3 4 | ||
40 | #define STM32_DMAMUX1_REQ_GEN4 5 | ||
41 | #define STM32_DMAMUX1_REQ_GEN5 6 | ||
42 | #define STM32_DMAMUX1_REQ_GEN6 7 | ||
43 | #define STM32_DMAMUX1_REQ_GEN7 8 | ||
44 | #define STM32_DMAMUX1_ADC1 9 | ||
45 | #define STM32_DMAMUX1_ADC2 10 | ||
46 | #define STM32_DMAMUX1_TIM1_CH1 11 | ||
47 | #define STM32_DMAMUX1_TIM1_CH2 12 | ||
48 | #define STM32_DMAMUX1_TIM1_CH3 13 | ||
49 | #define STM32_DMAMUX1_TIM1_CH4 14 | ||
50 | #define STM32_DMAMUX1_TIM1_UP 15 | ||
51 | #define STM32_DMAMUX1_TIM1_TRIG 16 | ||
52 | #define STM32_DMAMUX1_TIM1_COM 17 | ||
53 | #define STM32_DMAMUX1_TIM2_CH1 18 | ||
54 | #define STM32_DMAMUX1_TIM2_CH2 19 | ||
55 | #define STM32_DMAMUX1_TIM2_CH3 20 | ||
56 | #define STM32_DMAMUX1_TIM2_CH4 21 | ||
57 | #define STM32_DMAMUX1_TIM2_UP 22 | ||
58 | #define STM32_DMAMUX1_TIM3_CH1 23 | ||
59 | #define STM32_DMAMUX1_TIM3_CH2 24 | ||
60 | #define STM32_DMAMUX1_TIM3_CH3 25 | ||
61 | #define STM32_DMAMUX1_TIM3_CH4 26 | ||
62 | #define STM32_DMAMUX1_TIM3_UP 27 | ||
63 | #define STM32_DMAMUX1_TIM3_TRIG 28 | ||
64 | #define STM32_DMAMUX1_TIM4_CH1 29 | ||
65 | #define STM32_DMAMUX1_TIM4_CH2 30 | ||
66 | #define STM32_DMAMUX1_TIM4_CH3 31 | ||
67 | #define STM32_DMAMUX1_TIM4_UP 32 | ||
68 | #define STM32_DMAMUX1_I2C1_RX 33 | ||
69 | #define STM32_DMAMUX1_I2C1_TX 34 | ||
70 | #define STM32_DMAMUX1_I2C2_RX 35 | ||
71 | #define STM32_DMAMUX1_I2C2_TX 36 | ||
72 | #define STM32_DMAMUX1_SPI1_RX 37 | ||
73 | #define STM32_DMAMUX1_SPI1_TX 38 | ||
74 | #define STM32_DMAMUX1_SPI2_RX 39 | ||
75 | #define STM32_DMAMUX1_SPI2_TX 40 | ||
76 | #define STM32_DMAMUX1_USART1_RX 41 | ||
77 | #define STM32_DMAMUX1_USART1_TX 42 | ||
78 | #define STM32_DMAMUX1_USART2_RX 43 | ||
79 | #define STM32_DMAMUX1_USART2_TX 44 | ||
80 | #define STM32_DMAMUX1_USART3_RX 45 | ||
81 | #define STM32_DMAMUX1_USART3_TX 46 | ||
82 | #define STM32_DMAMUX1_TIM8_CH1 47 | ||
83 | #define STM32_DMAMUX1_TIM8_CH2 48 | ||
84 | #define STM32_DMAMUX1_TIM8_CH3 49 | ||
85 | #define STM32_DMAMUX1_TIM8_CH4 50 | ||
86 | #define STM32_DMAMUX1_TIM8_UP 51 | ||
87 | #define STM32_DMAMUX1_TIM8_TRIG 52 | ||
88 | #define STM32_DMAMUX1_TIM8_COM 53 | ||
89 | #define STM32_DMAMUX1_RESERVED54 54 | ||
90 | #define STM32_DMAMUX1_TIM5_CH1 55 | ||
91 | #define STM32_DMAMUX1_TIM5_CH2 56 | ||
92 | #define STM32_DMAMUX1_TIM5_CH3 57 | ||
93 | #define STM32_DMAMUX1_TIM5_CH4 58 | ||
94 | #define STM32_DMAMUX1_TIM5_UP 59 | ||
95 | #define STM32_DMAMUX1_TIM5_TRIG 60 | ||
96 | #define STM32_DMAMUX1_SPI3_RX 61 | ||
97 | #define STM32_DMAMUX1_SPI3_TX 62 | ||
98 | #define STM32_DMAMUX1_UART4_RX 63 | ||
99 | #define STM32_DMAMUX1_UART4_TX 64 | ||
100 | #define STM32_DMAMUX1_UART5_RX 65 | ||
101 | #define STM32_DMAMUX1_UART5_TX 66 | ||
102 | #define STM32_DMAMUX1_DAC1_CH1 67 /* Renamed to L4 name.*/ | ||
103 | #define STM32_DMAMUX1_DAC1_CH2 68 /* Renamed to L4 name.*/ | ||
104 | #define STM32_DMAMUX1_TIM6_UP 69 | ||
105 | #define STM32_DMAMUX1_TIM7_UP 70 | ||
106 | #define STM32_DMAMUX1_USART6_RX 71 | ||
107 | #define STM32_DMAMUX1_USART6_TX 72 | ||
108 | #define STM32_DMAMUX1_I2C3_RX 73 | ||
109 | #define STM32_DMAMUX1_I2C3_TX 74 | ||
110 | #define STM32_DMAMUX1_DCMI 75 | ||
111 | #define STM32_DMAMUX1_CRYP_IN 76 | ||
112 | #define STM32_DMAMUX1_CRYP_OUT 77 | ||
113 | #define STM32_DMAMUX1_HASH_IN 78 | ||
114 | #define STM32_DMAMUX1_UART7_RX 79 | ||
115 | #define STM32_DMAMUX1_UART7_TX 80 | ||
116 | #define STM32_DMAMUX1_UART8_RX 81 | ||
117 | #define STM32_DMAMUX1_UART8_TX 82 | ||
118 | #define STM32_DMAMUX1_SPI4_RX 83 | ||
119 | #define STM32_DMAMUX1_SPI4_TX 84 | ||
120 | #define STM32_DMAMUX1_SPI5_RX 85 | ||
121 | #define STM32_DMAMUX1_SPI5_TX 86 | ||
122 | #define STM32_DMAMUX1_SAI1_A 87 | ||
123 | #define STM32_DMAMUX1_SAI1_B 88 | ||
124 | #define STM32_DMAMUX1_SAI2_A 89 | ||
125 | #define STM32_DMAMUX1_SAI2_B 90 | ||
126 | #define STM32_DMAMUX1_SWPMI_RX 91 | ||
127 | #define STM32_DMAMUX1_SQPMI_TX 92 | ||
128 | #define STM32_DMAMUX1_SPDIFRX_DT 93 | ||
129 | #define STM32_DMAMUX1_SPDIFRX_CS 94 | ||
130 | #define STM32_DMAMUX1_HR_REQ1 95 | ||
131 | #define STM32_DMAMUX1_HR_REQ2 96 | ||
132 | #define STM32_DMAMUX1_HR_REQ3 97 | ||
133 | #define STM32_DMAMUX1_HR_REQ4 98 | ||
134 | #define STM32_DMAMUX1_HR_REQ5 99 | ||
135 | #define STM32_DMAMUX1_HR_REQ6 100 | ||
136 | #define STM32_DMAMUX1_DFSDM1_DMA0 101 | ||
137 | #define STM32_DMAMUX1_DFSDM1_DMA1 102 | ||
138 | #define STM32_DMAMUX1_DFSDM1_DMA2 103 | ||
139 | #define STM32_DMAMUX1_DFSDM1_DMA3 104 | ||
140 | #define STM32_DMAMUX1_TIM15_CH1 105 | ||
141 | #define STM32_DMAMUX1_TIM15_UP 106 | ||
142 | #define STM32_DMAMUX1_TIM15_TRIG 107 | ||
143 | #define STM32_DMAMUX1_TIM15_COM 108 | ||
144 | #define STM32_DMAMUX1_TIM16_CH1 109 | ||
145 | #define STM32_DMAMUX1_TIM16_UP 110 | ||
146 | #define STM32_DMAMUX1_TIM17_CH1 111 | ||
147 | #define STM32_DMAMUX1_TIM17_UP 112 | ||
148 | #define STM32_DMAMUX1_SAI3_A 113 | ||
149 | #define STM32_DMAMUX1_SAI3_B 114 | ||
150 | #define STM32_DMAMUX1_ADC3 115 | ||
151 | /** @} */ | ||
152 | |||
153 | /** | ||
154 | * @name DMAMUX2 request sources | ||
155 | * @{ | ||
156 | */ | ||
157 | #define STM32_DMAMUX2_REQ_GEN0 1 | ||
158 | #define STM32_DMAMUX2_REQ_GEN1 2 | ||
159 | #define STM32_DMAMUX2_REQ_GEN2 3 | ||
160 | #define STM32_DMAMUX2_REQ_GEN3 4 | ||
161 | #define STM32_DMAMUX2_REQ_GEN4 5 | ||
162 | #define STM32_DMAMUX2_REQ_GEN5 6 | ||
163 | #define STM32_DMAMUX2_REQ_GEN6 7 | ||
164 | #define STM32_DMAMUX2_REQ_GEN7 8 | ||
165 | #define STM32_DMAMUX2_LP_UART1_RX 9 | ||
166 | #define STM32_DMAMUX2_LP_UART1_TX 10 | ||
167 | #define STM32_DMAMUX2_SPI6_RX 11 | ||
168 | #define STM32_DMAMUX2_SPI6_TX 12 | ||
169 | #define STM32_DMAMUX2_I2C4_RX 13 | ||
170 | #define STM32_DMAMUX2_I2C4_TX 14 | ||
171 | #define STM32_DMAMUX2_SAI4_A 15 | ||
172 | #define STM32_DMAMUX2_SAI4_B 16 | ||
173 | #define STM32_DMAMUX2_ADC3_REQ 17 | ||
174 | /** @} */ | ||
175 | |||
176 | /*===========================================================================*/ | ||
177 | /* Driver pre-compile time settings. */ | ||
178 | /*===========================================================================*/ | ||
179 | |||
180 | /*===========================================================================*/ | ||
181 | /* Derived constants and error checks. */ | ||
182 | /*===========================================================================*/ | ||
183 | |||
184 | /*===========================================================================*/ | ||
185 | /* Driver data structures and types. */ | ||
186 | /*===========================================================================*/ | ||
187 | |||
188 | /*===========================================================================*/ | ||
189 | /* Driver macros. */ | ||
190 | /*===========================================================================*/ | ||
191 | |||
192 | /*===========================================================================*/ | ||
193 | /* External declarations. */ | ||
194 | /*===========================================================================*/ | ||
195 | |||
196 | #ifdef __cplusplus | ||
197 | extern "C" { | ||
198 | #endif | ||
199 | |||
200 | #ifdef __cplusplus | ||
201 | } | ||
202 | #endif | ||
203 | |||
204 | #endif /* STM32_DMAMUX_H */ | ||
205 | |||
206 | /** @} */ | ||