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1 | This is the Readme file for the V-USB example circuits directory. | ||
2 | |||
3 | |||
4 | CIRCUITS IN THIS DIRECTORY | ||
5 | ========================== | ||
6 | Since USB requires 3.3 V levels on D+ and D- but delivers a power supply of | ||
7 | ca. 5 V, some kind of level conversion must be performed. There are several | ||
8 | ways to implement this level conversion, see the example circuits below. | ||
9 | |||
10 | with-vreg.png and with-vreg.sch (EAGLE schematics): | ||
11 | This circuit uses a low drop voltage regulator to reduce the USB supply to | ||
12 | 3.3 V. You MUST use a low drop regulator because standard regulators such | ||
13 | as the LM317 require at least ca. 2 V drop. The advantage of this approach | ||
14 | is that it comes closest to the voltage levels required by the USB | ||
15 | specification and that the circuit is powered from a regulated supply. If | ||
16 | no USB cable is used (connector directly soldered on PCB), you can even | ||
17 | omit the 68 Ohm series resistors. The disadvantage is that you may want to | ||
18 | use other chips in your design which require 5 V. Please check that the AVR | ||
19 | used in your design allows the chosen clock rate at 3.3 V. | ||
20 | |||
21 | with-zener.png and with-zener.sch (EAGLE schematics): | ||
22 | This circuit enforces lower voltage levels on D+ and D- with zener diodes. | ||
23 | The zener diodes MUST be low power / low current types to ensure that the | ||
24 | 1k5 pull-up resistor on D- generates a voltage of well above 2.5 V (but | ||
25 | below 3.6 V). The advantage of this circuit is its simplicity and that the | ||
26 | circuit can be powered at 5 V (usually precise enough if the cable drop is | ||
27 | neglected). The disadvantage is that some zener diodes have a lower voltage | ||
28 | than 3 V when powered through 1k5 and the choice of components becomes | ||
29 | relevant. In addition to that, the power consumption during USB data | ||
30 | transfer is increased because the current is only limited by the 68 Ohm | ||
31 | series resistor. The zeners may even distort the signal waveforms due to | ||
32 | their capacity. | ||
33 | |||
34 | with-series-diodes.png and with-series-diodes.sch (EAGLE schematics): | ||
35 | This is a simplified low-cost version of the voltage regulator approach. | ||
36 | Instead of using a voltage regulator, we reduce the voltage by the forward | ||
37 | voltage of two silicon diodes (roughly 1.4 V). This gives ca. 3.6 V which | ||
38 | is practically inside the allowed range. The big disadvantage is that the | ||
39 | supply is not regulated -- it even depends strongly on the power | ||
40 | consumption. This cannot be tolerated for analog circuits. | ||
41 | |||
42 | tiny45-rc.png and tiny45-rc.sch (EAGLE schematics): | ||
43 | This is mostly an example for connecting an 8 pin device using the internal | ||
44 | RC oscillator for system clock. This example uses series diodes to limit | ||
45 | the supply, but you may choose any other method. Please note that you must | ||
46 | choose a clock rate of 12.8 or 16.5 MHz because only the receiver modules | ||
47 | for these frequencies have a PLL to allow higher clock rate tolerances. | ||
48 | |||
49 | |||
50 | GENERAL DESIGN NOTES | ||
51 | ==================== | ||
52 | All examples have D+ on hardware interrupt INT0 because this is the highest | ||
53 | priority interrupt on AVRs. You may use other hardware interrupts (and | ||
54 | configure the options at the end of usbconfig.h accordingly) if you make sure | ||
55 | that no higher priority interrupt is used. | ||
56 | |||
57 | If you use USB_SOF_HOOK or USB_COUNT_SOF in usbconfig.h, you must wire D- to | ||
58 | the interrupt instead. This way the interrupt is triggered on USB Start Of | ||
59 | Frame pulses as well. | ||
60 | |||
61 | Most examples have a 1M pull-down resistor at D+. This pull-up ensures that | ||
62 | in self-powered designs no interrupts occur while USB is not connected. You | ||
63 | may omit this resistor in bus-powered designs. Older examples had a pull-up | ||
64 | resistor instead. This is not compatible with the zener diode approach to | ||
65 | level conversion: 1M pull-up in conjunction with a 3.6 V zener diode give an | ||
66 | invalid logic level. | ||
67 | |||
68 | All examples with ATMega8/88/168 have D+ at port D bit 2 (because this is | ||
69 | hardware interrupt 0) and D- on port D bit 4 because it is also a clock input | ||
70 | for timer/counter 0. This way the firmware can easily check for activity on | ||
71 | D- (USB frame pulses) by checking the counter value in regular intervals. If | ||
72 | no activity is found, the firmware should (according to the USB | ||
73 | specification) put the system into a low power suspend mode. | ||
74 | |||
75 | |||
76 | |||
77 | ---------------------------------------------------------------------------- | ||
78 | (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH. | ||
79 | http://www.obdev.at/ | ||