diff options
author | Akshay <[email protected]> | 2022-04-10 12:13:40 +0100 |
---|---|---|
committer | Akshay <[email protected]> | 2022-04-10 12:13:40 +0100 |
commit | dc90387ce7d8ba7b607d9c48540bf6d8b560f14d (patch) | |
tree | 4ccb8fa5886b66fa9d480edef74236c27f035e16 /lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld |
Diffstat (limited to 'lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld')
-rw-r--r-- | lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld | 928 |
1 files changed, 928 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld b/lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld new file mode 100644 index 000000000..b9ee725dc --- /dev/null +++ b/lib/chibios-contrib/os/common/startup/MSP430X/compilers/GCC/ld/msp430fr5969_symbols.ld | |||
@@ -0,0 +1,928 @@ | |||
1 | /* ============================================================================ */ | ||
2 | /* Copyright (c) 2016, Texas Instruments Incorporated */ | ||
3 | /* All rights reserved. */ | ||
4 | /* */ | ||
5 | /* Redistribution and use in source and binary forms, with or without */ | ||
6 | /* modification, are permitted provided that the following conditions */ | ||
7 | /* are met: */ | ||
8 | /* */ | ||
9 | /* * Redistributions of source code must retain the above copyright */ | ||
10 | /* notice, this list of conditions and the following disclaimer. */ | ||
11 | /* */ | ||
12 | /* * Redistributions in binary form must reproduce the above copyright */ | ||
13 | /* notice, this list of conditions and the following disclaimer in the */ | ||
14 | /* documentation and/or other materials provided with the distribution. */ | ||
15 | /* */ | ||
16 | /* * Neither the name of Texas Instruments Incorporated nor the names of */ | ||
17 | /* its contributors may be used to endorse or promote products derived */ | ||
18 | /* from this software without specific prior written permission. */ | ||
19 | /* */ | ||
20 | /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ | ||
21 | /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ | ||
22 | /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ | ||
23 | /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ | ||
24 | /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ | ||
25 | /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ | ||
26 | /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ | ||
27 | /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ | ||
28 | /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ | ||
29 | /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ | ||
30 | /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ | ||
31 | /* ============================================================================ */ | ||
32 | |||
33 | /* This file supports MSP430FR5969 devices. */ | ||
34 | /* Version: 1.198 */ | ||
35 | |||
36 | /************************************************************ | ||
37 | * STANDARD BITS | ||
38 | ************************************************************/ | ||
39 | /************************************************************ | ||
40 | * STATUS REGISTER BITS | ||
41 | ************************************************************/ | ||
42 | /************************************************************ | ||
43 | * PERIPHERAL FILE MAP | ||
44 | ************************************************************/ | ||
45 | /************************************************************ | ||
46 | * ADC12_B | ||
47 | ************************************************************/ | ||
48 | PROVIDE(ADC12CTL0 = 0x0800); | ||
49 | PROVIDE(ADC12CTL0_L = 0x0800); | ||
50 | PROVIDE(ADC12CTL0_H = 0x0801); | ||
51 | PROVIDE(ADC12CTL1 = 0x0802); | ||
52 | PROVIDE(ADC12CTL1_L = 0x0802); | ||
53 | PROVIDE(ADC12CTL1_H = 0x0803); | ||
54 | PROVIDE(ADC12CTL2 = 0x0804); | ||
55 | PROVIDE(ADC12CTL2_L = 0x0804); | ||
56 | PROVIDE(ADC12CTL2_H = 0x0805); | ||
57 | PROVIDE(ADC12CTL3 = 0x0806); | ||
58 | PROVIDE(ADC12CTL3_L = 0x0806); | ||
59 | PROVIDE(ADC12CTL3_H = 0x0807); | ||
60 | PROVIDE(ADC12LO = 0x0808); | ||
61 | PROVIDE(ADC12LO_L = 0x0808); | ||
62 | PROVIDE(ADC12LO_H = 0x0809); | ||
63 | PROVIDE(ADC12HI = 0x080A); | ||
64 | PROVIDE(ADC12HI_L = 0x080A); | ||
65 | PROVIDE(ADC12HI_H = 0x080B); | ||
66 | PROVIDE(ADC12IFGR0 = 0x080C); | ||
67 | PROVIDE(ADC12IFGR0_L = 0x080C); | ||
68 | PROVIDE(ADC12IFGR0_H = 0x080D); | ||
69 | PROVIDE(ADC12IFGR1 = 0x080E); | ||
70 | PROVIDE(ADC12IFGR1_L = 0x080E); | ||
71 | PROVIDE(ADC12IFGR1_H = 0x080F); | ||
72 | PROVIDE(ADC12IFGR2 = 0x0810); | ||
73 | PROVIDE(ADC12IFGR2_L = 0x0810); | ||
74 | PROVIDE(ADC12IFGR2_H = 0x0811); | ||
75 | PROVIDE(ADC12IER0 = 0x0812); | ||
76 | PROVIDE(ADC12IER0_L = 0x0812); | ||
77 | PROVIDE(ADC12IER0_H = 0x0813); | ||
78 | PROVIDE(ADC12IER1 = 0x0814); | ||
79 | PROVIDE(ADC12IER1_L = 0x0814); | ||
80 | PROVIDE(ADC12IER1_H = 0x0815); | ||
81 | PROVIDE(ADC12IER2 = 0x0816); | ||
82 | PROVIDE(ADC12IER2_L = 0x0816); | ||
83 | PROVIDE(ADC12IER2_H = 0x0817); | ||
84 | PROVIDE(ADC12IV = 0x0818); | ||
85 | PROVIDE(ADC12IV_L = 0x0818); | ||
86 | PROVIDE(ADC12IV_H = 0x0819); | ||
87 | PROVIDE(ADC12MCTL0 = 0x0820); | ||
88 | PROVIDE(ADC12MCTL0_L = 0x0820); | ||
89 | PROVIDE(ADC12MCTL0_H = 0x0821); | ||
90 | PROVIDE(ADC12MCTL1 = 0x0822); | ||
91 | PROVIDE(ADC12MCTL1_L = 0x0822); | ||
92 | PROVIDE(ADC12MCTL1_H = 0x0823); | ||
93 | PROVIDE(ADC12MCTL2 = 0x0824); | ||
94 | PROVIDE(ADC12MCTL2_L = 0x0824); | ||
95 | PROVIDE(ADC12MCTL2_H = 0x0825); | ||
96 | PROVIDE(ADC12MCTL3 = 0x0826); | ||
97 | PROVIDE(ADC12MCTL3_L = 0x0826); | ||
98 | PROVIDE(ADC12MCTL3_H = 0x0827); | ||
99 | PROVIDE(ADC12MCTL4 = 0x0828); | ||
100 | PROVIDE(ADC12MCTL4_L = 0x0828); | ||
101 | PROVIDE(ADC12MCTL4_H = 0x0829); | ||
102 | PROVIDE(ADC12MCTL5 = 0x082A); | ||
103 | PROVIDE(ADC12MCTL5_L = 0x082A); | ||
104 | PROVIDE(ADC12MCTL5_H = 0x082B); | ||
105 | PROVIDE(ADC12MCTL6 = 0x082C); | ||
106 | PROVIDE(ADC12MCTL6_L = 0x082C); | ||
107 | PROVIDE(ADC12MCTL6_H = 0x082D); | ||
108 | PROVIDE(ADC12MCTL7 = 0x082E); | ||
109 | PROVIDE(ADC12MCTL7_L = 0x082E); | ||
110 | PROVIDE(ADC12MCTL7_H = 0x082F); | ||
111 | PROVIDE(ADC12MCTL8 = 0x0830); | ||
112 | PROVIDE(ADC12MCTL8_L = 0x0830); | ||
113 | PROVIDE(ADC12MCTL8_H = 0x0831); | ||
114 | PROVIDE(ADC12MCTL9 = 0x0832); | ||
115 | PROVIDE(ADC12MCTL9_L = 0x0832); | ||
116 | PROVIDE(ADC12MCTL9_H = 0x0833); | ||
117 | PROVIDE(ADC12MCTL10 = 0x0834); | ||
118 | PROVIDE(ADC12MCTL10_L = 0x0834); | ||
119 | PROVIDE(ADC12MCTL10_H = 0x0835); | ||
120 | PROVIDE(ADC12MCTL11 = 0x0836); | ||
121 | PROVIDE(ADC12MCTL11_L = 0x0836); | ||
122 | PROVIDE(ADC12MCTL11_H = 0x0837); | ||
123 | PROVIDE(ADC12MCTL12 = 0x0838); | ||
124 | PROVIDE(ADC12MCTL12_L = 0x0838); | ||
125 | PROVIDE(ADC12MCTL12_H = 0x0839); | ||
126 | PROVIDE(ADC12MCTL13 = 0x083A); | ||
127 | PROVIDE(ADC12MCTL13_L = 0x083A); | ||
128 | PROVIDE(ADC12MCTL13_H = 0x083B); | ||
129 | PROVIDE(ADC12MCTL14 = 0x083C); | ||
130 | PROVIDE(ADC12MCTL14_L = 0x083C); | ||
131 | PROVIDE(ADC12MCTL14_H = 0x083D); | ||
132 | PROVIDE(ADC12MCTL15 = 0x083E); | ||
133 | PROVIDE(ADC12MCTL15_L = 0x083E); | ||
134 | PROVIDE(ADC12MCTL15_H = 0x083F); | ||
135 | PROVIDE(ADC12MCTL16 = 0x0840); | ||
136 | PROVIDE(ADC12MCTL16_L = 0x0840); | ||
137 | PROVIDE(ADC12MCTL16_H = 0x0841); | ||
138 | PROVIDE(ADC12MCTL17 = 0x0842); | ||
139 | PROVIDE(ADC12MCTL17_L = 0x0842); | ||
140 | PROVIDE(ADC12MCTL17_H = 0x0843); | ||
141 | PROVIDE(ADC12MCTL18 = 0x0844); | ||
142 | PROVIDE(ADC12MCTL18_L = 0x0844); | ||
143 | PROVIDE(ADC12MCTL18_H = 0x0845); | ||
144 | PROVIDE(ADC12MCTL19 = 0x0846); | ||
145 | PROVIDE(ADC12MCTL19_L = 0x0846); | ||
146 | PROVIDE(ADC12MCTL19_H = 0x0847); | ||
147 | PROVIDE(ADC12MCTL20 = 0x0848); | ||
148 | PROVIDE(ADC12MCTL20_L = 0x0848); | ||
149 | PROVIDE(ADC12MCTL20_H = 0x0849); | ||
150 | PROVIDE(ADC12MCTL21 = 0x084A); | ||
151 | PROVIDE(ADC12MCTL21_L = 0x084A); | ||
152 | PROVIDE(ADC12MCTL21_H = 0x084B); | ||
153 | PROVIDE(ADC12MCTL22 = 0x084C); | ||
154 | PROVIDE(ADC12MCTL22_L = 0x084C); | ||
155 | PROVIDE(ADC12MCTL22_H = 0x084D); | ||
156 | PROVIDE(ADC12MCTL23 = 0x084E); | ||
157 | PROVIDE(ADC12MCTL23_L = 0x084E); | ||
158 | PROVIDE(ADC12MCTL23_H = 0x084F); | ||
159 | PROVIDE(ADC12MCTL24 = 0x0850); | ||
160 | PROVIDE(ADC12MCTL24_L = 0x0850); | ||
161 | PROVIDE(ADC12MCTL24_H = 0x0851); | ||
162 | PROVIDE(ADC12MCTL25 = 0x0852); | ||
163 | PROVIDE(ADC12MCTL25_L = 0x0852); | ||
164 | PROVIDE(ADC12MCTL25_H = 0x0853); | ||
165 | PROVIDE(ADC12MCTL26 = 0x0854); | ||
166 | PROVIDE(ADC12MCTL26_L = 0x0854); | ||
167 | PROVIDE(ADC12MCTL26_H = 0x0855); | ||
168 | PROVIDE(ADC12MCTL27 = 0x0856); | ||
169 | PROVIDE(ADC12MCTL27_L = 0x0856); | ||
170 | PROVIDE(ADC12MCTL27_H = 0x0857); | ||
171 | PROVIDE(ADC12MCTL28 = 0x0858); | ||
172 | PROVIDE(ADC12MCTL28_L = 0x0858); | ||
173 | PROVIDE(ADC12MCTL28_H = 0x0859); | ||
174 | PROVIDE(ADC12MCTL29 = 0x085A); | ||
175 | PROVIDE(ADC12MCTL29_L = 0x085A); | ||
176 | PROVIDE(ADC12MCTL29_H = 0x085B); | ||
177 | PROVIDE(ADC12MCTL30 = 0x085C); | ||
178 | PROVIDE(ADC12MCTL30_L = 0x085C); | ||
179 | PROVIDE(ADC12MCTL30_H = 0x085D); | ||
180 | PROVIDE(ADC12MCTL31 = 0x085E); | ||
181 | PROVIDE(ADC12MCTL31_L = 0x085E); | ||
182 | PROVIDE(ADC12MCTL31_H = 0x085F); | ||
183 | PROVIDE(ADC12MEM0 = 0x0860); | ||
184 | PROVIDE(ADC12MEM0_L = 0x0860); | ||
185 | PROVIDE(ADC12MEM0_H = 0x0861); | ||
186 | PROVIDE(ADC12MEM1 = 0x0862); | ||
187 | PROVIDE(ADC12MEM1_L = 0x0862); | ||
188 | PROVIDE(ADC12MEM1_H = 0x0863); | ||
189 | PROVIDE(ADC12MEM2 = 0x0864); | ||
190 | PROVIDE(ADC12MEM2_L = 0x0864); | ||
191 | PROVIDE(ADC12MEM2_H = 0x0865); | ||
192 | PROVIDE(ADC12MEM3 = 0x0866); | ||
193 | PROVIDE(ADC12MEM3_L = 0x0866); | ||
194 | PROVIDE(ADC12MEM3_H = 0x0867); | ||
195 | PROVIDE(ADC12MEM4 = 0x0868); | ||
196 | PROVIDE(ADC12MEM4_L = 0x0868); | ||
197 | PROVIDE(ADC12MEM4_H = 0x0869); | ||
198 | PROVIDE(ADC12MEM5 = 0x086A); | ||
199 | PROVIDE(ADC12MEM5_L = 0x086A); | ||
200 | PROVIDE(ADC12MEM5_H = 0x086B); | ||
201 | PROVIDE(ADC12MEM6 = 0x086C); | ||
202 | PROVIDE(ADC12MEM6_L = 0x086C); | ||
203 | PROVIDE(ADC12MEM6_H = 0x086D); | ||
204 | PROVIDE(ADC12MEM7 = 0x086E); | ||
205 | PROVIDE(ADC12MEM7_L = 0x086E); | ||
206 | PROVIDE(ADC12MEM7_H = 0x086F); | ||
207 | PROVIDE(ADC12MEM8 = 0x0870); | ||
208 | PROVIDE(ADC12MEM8_L = 0x0870); | ||
209 | PROVIDE(ADC12MEM8_H = 0x0871); | ||
210 | PROVIDE(ADC12MEM9 = 0x0872); | ||
211 | PROVIDE(ADC12MEM9_L = 0x0872); | ||
212 | PROVIDE(ADC12MEM9_H = 0x0873); | ||
213 | PROVIDE(ADC12MEM10 = 0x0874); | ||
214 | PROVIDE(ADC12MEM10_L = 0x0874); | ||
215 | PROVIDE(ADC12MEM10_H = 0x0875); | ||
216 | PROVIDE(ADC12MEM11 = 0x0876); | ||
217 | PROVIDE(ADC12MEM11_L = 0x0876); | ||
218 | PROVIDE(ADC12MEM11_H = 0x0877); | ||
219 | PROVIDE(ADC12MEM12 = 0x0878); | ||
220 | PROVIDE(ADC12MEM12_L = 0x0878); | ||
221 | PROVIDE(ADC12MEM12_H = 0x0879); | ||
222 | PROVIDE(ADC12MEM13 = 0x087A); | ||
223 | PROVIDE(ADC12MEM13_L = 0x087A); | ||
224 | PROVIDE(ADC12MEM13_H = 0x087B); | ||
225 | PROVIDE(ADC12MEM14 = 0x087C); | ||
226 | PROVIDE(ADC12MEM14_L = 0x087C); | ||
227 | PROVIDE(ADC12MEM14_H = 0x087D); | ||
228 | PROVIDE(ADC12MEM15 = 0x087E); | ||
229 | PROVIDE(ADC12MEM15_L = 0x087E); | ||
230 | PROVIDE(ADC12MEM15_H = 0x087F); | ||
231 | PROVIDE(ADC12MEM16 = 0x0880); | ||
232 | PROVIDE(ADC12MEM16_L = 0x0880); | ||
233 | PROVIDE(ADC12MEM16_H = 0x0881); | ||
234 | PROVIDE(ADC12MEM17 = 0x0882); | ||
235 | PROVIDE(ADC12MEM17_L = 0x0882); | ||
236 | PROVIDE(ADC12MEM17_H = 0x0883); | ||
237 | PROVIDE(ADC12MEM18 = 0x0884); | ||
238 | PROVIDE(ADC12MEM18_L = 0x0884); | ||
239 | PROVIDE(ADC12MEM18_H = 0x0885); | ||
240 | PROVIDE(ADC12MEM19 = 0x0886); | ||
241 | PROVIDE(ADC12MEM19_L = 0x0886); | ||
242 | PROVIDE(ADC12MEM19_H = 0x0887); | ||
243 | PROVIDE(ADC12MEM20 = 0x0888); | ||
244 | PROVIDE(ADC12MEM20_L = 0x0888); | ||
245 | PROVIDE(ADC12MEM20_H = 0x0889); | ||
246 | PROVIDE(ADC12MEM21 = 0x088A); | ||
247 | PROVIDE(ADC12MEM21_L = 0x088A); | ||
248 | PROVIDE(ADC12MEM21_H = 0x088B); | ||
249 | PROVIDE(ADC12MEM22 = 0x088C); | ||
250 | PROVIDE(ADC12MEM22_L = 0x088C); | ||
251 | PROVIDE(ADC12MEM22_H = 0x088D); | ||
252 | PROVIDE(ADC12MEM23 = 0x088E); | ||
253 | PROVIDE(ADC12MEM23_L = 0x088E); | ||
254 | PROVIDE(ADC12MEM23_H = 0x088F); | ||
255 | PROVIDE(ADC12MEM24 = 0x0890); | ||
256 | PROVIDE(ADC12MEM24_L = 0x0890); | ||
257 | PROVIDE(ADC12MEM24_H = 0x0891); | ||
258 | PROVIDE(ADC12MEM25 = 0x0892); | ||
259 | PROVIDE(ADC12MEM25_L = 0x0892); | ||
260 | PROVIDE(ADC12MEM25_H = 0x0893); | ||
261 | PROVIDE(ADC12MEM26 = 0x0894); | ||
262 | PROVIDE(ADC12MEM26_L = 0x0894); | ||
263 | PROVIDE(ADC12MEM26_H = 0x0895); | ||
264 | PROVIDE(ADC12MEM27 = 0x0896); | ||
265 | PROVIDE(ADC12MEM27_L = 0x0896); | ||
266 | PROVIDE(ADC12MEM27_H = 0x0897); | ||
267 | PROVIDE(ADC12MEM28 = 0x0898); | ||
268 | PROVIDE(ADC12MEM28_L = 0x0898); | ||
269 | PROVIDE(ADC12MEM28_H = 0x0899); | ||
270 | PROVIDE(ADC12MEM29 = 0x089A); | ||
271 | PROVIDE(ADC12MEM29_L = 0x089A); | ||
272 | PROVIDE(ADC12MEM29_H = 0x089B); | ||
273 | PROVIDE(ADC12MEM30 = 0x089C); | ||
274 | PROVIDE(ADC12MEM30_L = 0x089C); | ||
275 | PROVIDE(ADC12MEM30_H = 0x089D); | ||
276 | PROVIDE(ADC12MEM31 = 0x089E); | ||
277 | PROVIDE(ADC12MEM31_L = 0x089E); | ||
278 | PROVIDE(ADC12MEM31_H = 0x089F); | ||
279 | /************************************************************ | ||
280 | * AES256 Accelerator | ||
281 | ************************************************************/ | ||
282 | PROVIDE(AESACTL0 = 0x09C0); | ||
283 | PROVIDE(AESACTL0_L = 0x09C0); | ||
284 | PROVIDE(AESACTL0_H = 0x09C1); | ||
285 | PROVIDE(AESACTL1 = 0x09C2); | ||
286 | PROVIDE(AESACTL1_L = 0x09C2); | ||
287 | PROVIDE(AESACTL1_H = 0x09C3); | ||
288 | PROVIDE(AESASTAT = 0x09C4); | ||
289 | PROVIDE(AESASTAT_L = 0x09C4); | ||
290 | PROVIDE(AESASTAT_H = 0x09C5); | ||
291 | PROVIDE(AESAKEY = 0x09C6); | ||
292 | PROVIDE(AESAKEY_L = 0x09C6); | ||
293 | PROVIDE(AESAKEY_H = 0x09C7); | ||
294 | PROVIDE(AESADIN = 0x09C8); | ||
295 | PROVIDE(AESADIN_L = 0x09C8); | ||
296 | PROVIDE(AESADIN_H = 0x09C9); | ||
297 | PROVIDE(AESADOUT = 0x09CA); | ||
298 | PROVIDE(AESADOUT_L = 0x09CA); | ||
299 | PROVIDE(AESADOUT_H = 0x09CB); | ||
300 | PROVIDE(AESAXDIN = 0x09CC); | ||
301 | PROVIDE(AESAXDIN_L = 0x09CC); | ||
302 | PROVIDE(AESAXDIN_H = 0x09CD); | ||
303 | PROVIDE(AESAXIN = 0x09CE); | ||
304 | PROVIDE(AESAXIN_L = 0x09CE); | ||
305 | PROVIDE(AESAXIN_H = 0x09CF); | ||
306 | /************************************************************ | ||
307 | * Capacitive_Touch_IO 0 | ||
308 | ************************************************************/ | ||
309 | PROVIDE(CAPTIO0CTL = 0x043E); | ||
310 | PROVIDE(CAPTIO0CTL_L = 0x043E); | ||
311 | PROVIDE(CAPTIO0CTL_H = 0x043F); | ||
312 | /************************************************************ | ||
313 | * Capacitive_Touch_IO 1 | ||
314 | ************************************************************/ | ||
315 | PROVIDE(CAPTIO1CTL = 0x047E); | ||
316 | PROVIDE(CAPTIO1CTL_L = 0x047E); | ||
317 | PROVIDE(CAPTIO1CTL_H = 0x047F); | ||
318 | /************************************************************ | ||
319 | * Comparator E | ||
320 | ************************************************************/ | ||
321 | PROVIDE(CECTL0 = 0x08C0); | ||
322 | PROVIDE(CECTL0_L = 0x08C0); | ||
323 | PROVIDE(CECTL0_H = 0x08C1); | ||
324 | PROVIDE(CECTL1 = 0x08C2); | ||
325 | PROVIDE(CECTL1_L = 0x08C2); | ||
326 | PROVIDE(CECTL1_H = 0x08C3); | ||
327 | PROVIDE(CECTL2 = 0x08C4); | ||
328 | PROVIDE(CECTL2_L = 0x08C4); | ||
329 | PROVIDE(CECTL2_H = 0x08C5); | ||
330 | PROVIDE(CECTL3 = 0x08C6); | ||
331 | PROVIDE(CECTL3_L = 0x08C6); | ||
332 | PROVIDE(CECTL3_H = 0x08C7); | ||
333 | PROVIDE(CEINT = 0x08CC); | ||
334 | PROVIDE(CEINT_L = 0x08CC); | ||
335 | PROVIDE(CEINT_H = 0x08CD); | ||
336 | PROVIDE(CEIV = 0x08CE); | ||
337 | PROVIDE(CEIV_L = 0x08CE); | ||
338 | PROVIDE(CEIV_H = 0x08CF); | ||
339 | /************************************************************* | ||
340 | * CRC Module | ||
341 | *************************************************************/ | ||
342 | PROVIDE(CRCDI = 0x0150); | ||
343 | PROVIDE(CRCDI_L = 0x0150); | ||
344 | PROVIDE(CRCDI_H = 0x0151); | ||
345 | PROVIDE(CRCDIRB = 0x0152); | ||
346 | PROVIDE(CRCDIRB_L = 0x0152); | ||
347 | PROVIDE(CRCDIRB_H = 0x0153); | ||
348 | PROVIDE(CRCINIRES = 0x0154); | ||
349 | PROVIDE(CRCINIRES_L = 0x0154); | ||
350 | PROVIDE(CRCINIRES_H = 0x0155); | ||
351 | PROVIDE(CRCRESR = 0x0156); | ||
352 | PROVIDE(CRCRESR_L = 0x0156); | ||
353 | PROVIDE(CRCRESR_H = 0x0157); | ||
354 | /************************************************************ | ||
355 | * CLOCK SYSTEM | ||
356 | ************************************************************/ | ||
357 | PROVIDE(CSCTL0 = 0x0160); | ||
358 | PROVIDE(CSCTL0_L = 0x0160); | ||
359 | PROVIDE(CSCTL0_H = 0x0161); | ||
360 | PROVIDE(CSCTL1 = 0x0162); | ||
361 | PROVIDE(CSCTL1_L = 0x0162); | ||
362 | PROVIDE(CSCTL1_H = 0x0163); | ||
363 | PROVIDE(CSCTL2 = 0x0164); | ||
364 | PROVIDE(CSCTL2_L = 0x0164); | ||
365 | PROVIDE(CSCTL2_H = 0x0165); | ||
366 | PROVIDE(CSCTL3 = 0x0166); | ||
367 | PROVIDE(CSCTL3_L = 0x0166); | ||
368 | PROVIDE(CSCTL3_H = 0x0167); | ||
369 | PROVIDE(CSCTL4 = 0x0168); | ||
370 | PROVIDE(CSCTL4_L = 0x0168); | ||
371 | PROVIDE(CSCTL4_H = 0x0169); | ||
372 | PROVIDE(CSCTL5 = 0x016A); | ||
373 | PROVIDE(CSCTL5_L = 0x016A); | ||
374 | PROVIDE(CSCTL5_H = 0x016B); | ||
375 | PROVIDE(CSCTL6 = 0x016C); | ||
376 | PROVIDE(CSCTL6_L = 0x016C); | ||
377 | PROVIDE(CSCTL6_H = 0x016D); | ||
378 | /************************************************************ | ||
379 | * DMA_X | ||
380 | ************************************************************/ | ||
381 | PROVIDE(DMACTL0 = 0x0500); | ||
382 | PROVIDE(DMACTL0_L = 0x0500); | ||
383 | PROVIDE(DMACTL0_H = 0x0501); | ||
384 | PROVIDE(DMACTL1 = 0x0502); | ||
385 | PROVIDE(DMACTL1_L = 0x0502); | ||
386 | PROVIDE(DMACTL1_H = 0x0503); | ||
387 | PROVIDE(DMACTL2 = 0x0504); | ||
388 | PROVIDE(DMACTL2_L = 0x0504); | ||
389 | PROVIDE(DMACTL2_H = 0x0505); | ||
390 | PROVIDE(DMACTL3 = 0x0506); | ||
391 | PROVIDE(DMACTL3_L = 0x0506); | ||
392 | PROVIDE(DMACTL3_H = 0x0507); | ||
393 | PROVIDE(DMACTL4 = 0x0508); | ||
394 | PROVIDE(DMACTL4_L = 0x0508); | ||
395 | PROVIDE(DMACTL4_H = 0x0509); | ||
396 | PROVIDE(DMAIV = 0x050E); | ||
397 | PROVIDE(DMAIV_L = 0x050E); | ||
398 | PROVIDE(DMAIV_H = 0x050F); | ||
399 | PROVIDE(DMA0CTL = 0x0510); | ||
400 | PROVIDE(DMA0CTL_L = 0x0510); | ||
401 | PROVIDE(DMA0CTL_H = 0x0511); | ||
402 | PROVIDE(DMA0SA = 0x0512); | ||
403 | PROVIDE(DMA0SAL = 0x0512); | ||
404 | PROVIDE(DMA0DA = 0x0516); | ||
405 | PROVIDE(DMA0DAL = 0x0516); | ||
406 | PROVIDE(DMA0SZ = 0x051A); | ||
407 | PROVIDE(DMA1CTL = 0x0520); | ||
408 | PROVIDE(DMA1CTL_L = 0x0520); | ||
409 | PROVIDE(DMA1CTL_H = 0x0521); | ||
410 | PROVIDE(DMA1SA = 0x0522); | ||
411 | PROVIDE(DMA1SAL = 0x0522); | ||
412 | PROVIDE(DMA1DA = 0x0526); | ||
413 | PROVIDE(DMA1DAL = 0x0526); | ||
414 | PROVIDE(DMA1SZ = 0x052A); | ||
415 | PROVIDE(DMA2CTL = 0x0530); | ||
416 | PROVIDE(DMA2CTL_L = 0x0530); | ||
417 | PROVIDE(DMA2CTL_H = 0x0531); | ||
418 | PROVIDE(DMA2SA = 0x0532); | ||
419 | PROVIDE(DMA2SAL = 0x0532); | ||
420 | PROVIDE(DMA2DA = 0x0536); | ||
421 | PROVIDE(DMA2DAL = 0x0536); | ||
422 | PROVIDE(DMA2SZ = 0x053A); | ||
423 | /************************************************************* | ||
424 | * FRAM Memory | ||
425 | *************************************************************/ | ||
426 | PROVIDE(FRCTL0 = 0x0140); | ||
427 | PROVIDE(FRCTL0_L = 0x0140); | ||
428 | PROVIDE(FRCTL0_H = 0x0141); | ||
429 | PROVIDE(GCCTL0 = 0x0144); | ||
430 | PROVIDE(GCCTL0_L = 0x0144); | ||
431 | PROVIDE(GCCTL0_H = 0x0145); | ||
432 | PROVIDE(GCCTL1 = 0x0146); | ||
433 | PROVIDE(GCCTL1_L = 0x0146); | ||
434 | PROVIDE(GCCTL1_H = 0x0147); | ||
435 | /************************************************************ | ||
436 | * Memory Protection Unit | ||
437 | ************************************************************/ | ||
438 | PROVIDE(MPUCTL0 = 0x05A0); | ||
439 | PROVIDE(MPUCTL0_L = 0x05A0); | ||
440 | PROVIDE(MPUCTL0_H = 0x05A1); | ||
441 | PROVIDE(MPUCTL1 = 0x05A2); | ||
442 | PROVIDE(MPUCTL1_L = 0x05A2); | ||
443 | PROVIDE(MPUCTL1_H = 0x05A3); | ||
444 | PROVIDE(MPUSEGB2 = 0x05A4); | ||
445 | PROVIDE(MPUSEGB2_L = 0x05A4); | ||
446 | PROVIDE(MPUSEGB2_H = 0x05A5); | ||
447 | PROVIDE(MPUSEGB1 = 0x05A6); | ||
448 | PROVIDE(MPUSEGB1_L = 0x05A6); | ||
449 | PROVIDE(MPUSEGB1_H = 0x05A7); | ||
450 | PROVIDE(MPUSAM = 0x05A8); | ||
451 | PROVIDE(MPUSAM_L = 0x05A8); | ||
452 | PROVIDE(MPUSAM_H = 0x05A9); | ||
453 | PROVIDE(MPUIPC0 = 0x05AA); | ||
454 | PROVIDE(MPUIPC0_L = 0x05AA); | ||
455 | PROVIDE(MPUIPC0_H = 0x05AB); | ||
456 | PROVIDE(MPUIPSEGB2 = 0x05AC); | ||
457 | PROVIDE(MPUIPSEGB2_L = 0x05AC); | ||
458 | PROVIDE(MPUIPSEGB2_H = 0x05AD); | ||
459 | PROVIDE(MPUIPSEGB1 = 0x05AE); | ||
460 | PROVIDE(MPUIPSEGB1_L = 0x05AE); | ||
461 | PROVIDE(MPUIPSEGB1_H = 0x05AF); | ||
462 | /************************************************************ | ||
463 | * HARDWARE MULTIPLIER 32Bit | ||
464 | ************************************************************/ | ||
465 | PROVIDE(MPY = 0x04C0); | ||
466 | PROVIDE(MPY_L = 0x04C0); | ||
467 | PROVIDE(MPY_H = 0x04C1); | ||
468 | PROVIDE(MPYS = 0x04C2); | ||
469 | PROVIDE(MPYS_L = 0x04C2); | ||
470 | PROVIDE(MPYS_H = 0x04C3); | ||
471 | PROVIDE(MAC = 0x04C4); | ||
472 | PROVIDE(MAC_L = 0x04C4); | ||
473 | PROVIDE(MAC_H = 0x04C5); | ||
474 | PROVIDE(MACS = 0x04C6); | ||
475 | PROVIDE(MACS_L = 0x04C6); | ||
476 | PROVIDE(MACS_H = 0x04C7); | ||
477 | PROVIDE(OP2 = 0x04C8); | ||
478 | PROVIDE(OP2_L = 0x04C8); | ||
479 | PROVIDE(OP2_H = 0x04C9); | ||
480 | PROVIDE(RESLO = 0x04CA); | ||
481 | PROVIDE(RESLO_L = 0x04CA); | ||
482 | PROVIDE(RESLO_H = 0x04CB); | ||
483 | PROVIDE(RESHI = 0x04CC); | ||
484 | PROVIDE(RESHI_L = 0x04CC); | ||
485 | PROVIDE(RESHI_H = 0x04CD); | ||
486 | PROVIDE(SUMEXT = 0x04CE); | ||
487 | PROVIDE(SUMEXT_L = 0x04CE); | ||
488 | PROVIDE(SUMEXT_H = 0x04CF); | ||
489 | PROVIDE(MPY32L = 0x04D0); | ||
490 | PROVIDE(MPY32L_L = 0x04D0); | ||
491 | PROVIDE(MPY32L_H = 0x04D1); | ||
492 | PROVIDE(MPY32H = 0x04D2); | ||
493 | PROVIDE(MPY32H_L = 0x04D2); | ||
494 | PROVIDE(MPY32H_H = 0x04D3); | ||
495 | PROVIDE(MPYS32L = 0x04D4); | ||
496 | PROVIDE(MPYS32L_L = 0x04D4); | ||
497 | PROVIDE(MPYS32L_H = 0x04D5); | ||
498 | PROVIDE(MPYS32H = 0x04D6); | ||
499 | PROVIDE(MPYS32H_L = 0x04D6); | ||
500 | PROVIDE(MPYS32H_H = 0x04D7); | ||
501 | PROVIDE(MAC32L = 0x04D8); | ||
502 | PROVIDE(MAC32L_L = 0x04D8); | ||
503 | PROVIDE(MAC32L_H = 0x04D9); | ||
504 | PROVIDE(MAC32H = 0x04DA); | ||
505 | PROVIDE(MAC32H_L = 0x04DA); | ||
506 | PROVIDE(MAC32H_H = 0x04DB); | ||
507 | PROVIDE(MACS32L = 0x04DC); | ||
508 | PROVIDE(MACS32L_L = 0x04DC); | ||
509 | PROVIDE(MACS32L_H = 0x04DD); | ||
510 | PROVIDE(MACS32H = 0x04DE); | ||
511 | PROVIDE(MACS32H_L = 0x04DE); | ||
512 | PROVIDE(MACS32H_H = 0x04DF); | ||
513 | PROVIDE(OP2L = 0x04E0); | ||
514 | PROVIDE(OP2L_L = 0x04E0); | ||
515 | PROVIDE(OP2L_H = 0x04E1); | ||
516 | PROVIDE(OP2H = 0x04E2); | ||
517 | PROVIDE(OP2H_L = 0x04E2); | ||
518 | PROVIDE(OP2H_H = 0x04E3); | ||
519 | PROVIDE(RES0 = 0x04E4); | ||
520 | PROVIDE(RES0_L = 0x04E4); | ||
521 | PROVIDE(RES0_H = 0x04E5); | ||
522 | PROVIDE(RES1 = 0x04E6); | ||
523 | PROVIDE(RES1_L = 0x04E6); | ||
524 | PROVIDE(RES1_H = 0x04E7); | ||
525 | PROVIDE(RES2 = 0x04E8); | ||
526 | PROVIDE(RES2_L = 0x04E8); | ||
527 | PROVIDE(RES2_H = 0x04E9); | ||
528 | PROVIDE(RES3 = 0x04EA); | ||
529 | PROVIDE(RES3_L = 0x04EA); | ||
530 | PROVIDE(RES3_H = 0x04EB); | ||
531 | PROVIDE(MPY32CTL0 = 0x04EC); | ||
532 | PROVIDE(MPY32CTL0_L = 0x04EC); | ||
533 | PROVIDE(MPY32CTL0_H = 0x04ED); | ||
534 | /************************************************************ | ||
535 | * PMM - Power Management System for FRAM | ||
536 | ************************************************************/ | ||
537 | PROVIDE(PMMCTL0 = 0x0120); | ||
538 | PROVIDE(PMMCTL0_L = 0x0120); | ||
539 | PROVIDE(PMMCTL0_H = 0x0121); | ||
540 | PROVIDE(PMMIFG = 0x012A); | ||
541 | PROVIDE(PMMIFG_L = 0x012A); | ||
542 | PROVIDE(PMMIFG_H = 0x012B); | ||
543 | PROVIDE(PM5CTL0 = 0x0130); | ||
544 | PROVIDE(PM5CTL0_L = 0x0130); | ||
545 | PROVIDE(PM5CTL0_H = 0x0131); | ||
546 | /************************************************************ | ||
547 | * DIGITAL I/O Port1/2 Pull up / Pull down Resistors | ||
548 | ************************************************************/ | ||
549 | PROVIDE(PAIN = 0x0200); | ||
550 | PROVIDE(PAIN_L = 0x0200); | ||
551 | PROVIDE(PAIN_H = 0x0201); | ||
552 | PROVIDE(PAOUT = 0x0202); | ||
553 | PROVIDE(PAOUT_L = 0x0202); | ||
554 | PROVIDE(PAOUT_H = 0x0203); | ||
555 | PROVIDE(PADIR = 0x0204); | ||
556 | PROVIDE(PADIR_L = 0x0204); | ||
557 | PROVIDE(PADIR_H = 0x0205); | ||
558 | PROVIDE(PAREN = 0x0206); | ||
559 | PROVIDE(PAREN_L = 0x0206); | ||
560 | PROVIDE(PAREN_H = 0x0207); | ||
561 | PROVIDE(PASEL0 = 0x020A); | ||
562 | PROVIDE(PASEL0_L = 0x020A); | ||
563 | PROVIDE(PASEL0_H = 0x020B); | ||
564 | PROVIDE(PASEL1 = 0x020C); | ||
565 | PROVIDE(PASEL1_L = 0x020C); | ||
566 | PROVIDE(PASEL1_H = 0x020D); | ||
567 | PROVIDE(PASELC = 0x0216); | ||
568 | PROVIDE(PASELC_L = 0x0216); | ||
569 | PROVIDE(PASELC_H = 0x0217); | ||
570 | PROVIDE(PAIES = 0x0218); | ||
571 | PROVIDE(PAIES_L = 0x0218); | ||
572 | PROVIDE(PAIES_H = 0x0219); | ||
573 | PROVIDE(PAIE = 0x021A); | ||
574 | PROVIDE(PAIE_L = 0x021A); | ||
575 | PROVIDE(PAIE_H = 0x021B); | ||
576 | PROVIDE(PAIFG = 0x021C); | ||
577 | PROVIDE(PAIFG_L = 0x021C); | ||
578 | PROVIDE(PAIFG_H = 0x021D); | ||
579 | PROVIDE(P1IV = 0x020E); | ||
580 | PROVIDE(P2IV = 0x021E); | ||
581 | /************************************************************ | ||
582 | * DIGITAL I/O Port3/4 Pull up / Pull down Resistors | ||
583 | ************************************************************/ | ||
584 | PROVIDE(PBIN = 0x0220); | ||
585 | PROVIDE(PBIN_L = 0x0220); | ||
586 | PROVIDE(PBIN_H = 0x0221); | ||
587 | PROVIDE(PBOUT = 0x0222); | ||
588 | PROVIDE(PBOUT_L = 0x0222); | ||
589 | PROVIDE(PBOUT_H = 0x0223); | ||
590 | PROVIDE(PBDIR = 0x0224); | ||
591 | PROVIDE(PBDIR_L = 0x0224); | ||
592 | PROVIDE(PBDIR_H = 0x0225); | ||
593 | PROVIDE(PBREN = 0x0226); | ||
594 | PROVIDE(PBREN_L = 0x0226); | ||
595 | PROVIDE(PBREN_H = 0x0227); | ||
596 | PROVIDE(PBSEL0 = 0x022A); | ||
597 | PROVIDE(PBSEL0_L = 0x022A); | ||
598 | PROVIDE(PBSEL0_H = 0x022B); | ||
599 | PROVIDE(PBSEL1 = 0x022C); | ||
600 | PROVIDE(PBSEL1_L = 0x022C); | ||
601 | PROVIDE(PBSEL1_H = 0x022D); | ||
602 | PROVIDE(PBSELC = 0x0236); | ||
603 | PROVIDE(PBSELC_L = 0x0236); | ||
604 | PROVIDE(PBSELC_H = 0x0237); | ||
605 | PROVIDE(PBIES = 0x0238); | ||
606 | PROVIDE(PBIES_L = 0x0238); | ||
607 | PROVIDE(PBIES_H = 0x0239); | ||
608 | PROVIDE(PBIE = 0x023A); | ||
609 | PROVIDE(PBIE_L = 0x023A); | ||
610 | PROVIDE(PBIE_H = 0x023B); | ||
611 | PROVIDE(PBIFG = 0x023C); | ||
612 | PROVIDE(PBIFG_L = 0x023C); | ||
613 | PROVIDE(PBIFG_H = 0x023D); | ||
614 | PROVIDE(P3IV = 0x022E); | ||
615 | PROVIDE(P4IV = 0x023E); | ||
616 | /************************************************************ | ||
617 | * DIGITAL I/O PortJ Pull up / Pull down Resistors | ||
618 | ************************************************************/ | ||
619 | PROVIDE(PJIN = 0x0320); | ||
620 | PROVIDE(PJIN_L = 0x0320); | ||
621 | PROVIDE(PJIN_H = 0x0321); | ||
622 | PROVIDE(PJOUT = 0x0322); | ||
623 | PROVIDE(PJOUT_L = 0x0322); | ||
624 | PROVIDE(PJOUT_H = 0x0323); | ||
625 | PROVIDE(PJDIR = 0x0324); | ||
626 | PROVIDE(PJDIR_L = 0x0324); | ||
627 | PROVIDE(PJDIR_H = 0x0325); | ||
628 | PROVIDE(PJREN = 0x0326); | ||
629 | PROVIDE(PJREN_L = 0x0326); | ||
630 | PROVIDE(PJREN_H = 0x0327); | ||
631 | PROVIDE(PJSEL0 = 0x032A); | ||
632 | PROVIDE(PJSEL0_L = 0x032A); | ||
633 | PROVIDE(PJSEL0_H = 0x032B); | ||
634 | PROVIDE(PJSEL1 = 0x032C); | ||
635 | PROVIDE(PJSEL1_L = 0x032C); | ||
636 | PROVIDE(PJSEL1_H = 0x032D); | ||
637 | PROVIDE(PJSELC = 0x0336); | ||
638 | PROVIDE(PJSELC_L = 0x0336); | ||
639 | PROVIDE(PJSELC_H = 0x0337); | ||
640 | /************************************************************ | ||
641 | * Shared Reference | ||
642 | ************************************************************/ | ||
643 | PROVIDE(REFCTL0 = 0x01B0); | ||
644 | PROVIDE(REFCTL0_L = 0x01B0); | ||
645 | PROVIDE(REFCTL0_H = 0x01B1); | ||
646 | /************************************************************ | ||
647 | * Real Time Clock | ||
648 | ************************************************************/ | ||
649 | PROVIDE(RTCCTL01 = 0x04A0); | ||
650 | PROVIDE(RTCCTL01_L = 0x04A0); | ||
651 | PROVIDE(RTCCTL01_H = 0x04A1); | ||
652 | PROVIDE(RTCCTL23 = 0x04A2); | ||
653 | PROVIDE(RTCCTL23_L = 0x04A2); | ||
654 | PROVIDE(RTCCTL23_H = 0x04A3); | ||
655 | PROVIDE(RTCPS0CTL = 0x04A8); | ||
656 | PROVIDE(RTCPS0CTL_L = 0x04A8); | ||
657 | PROVIDE(RTCPS0CTL_H = 0x04A9); | ||
658 | PROVIDE(RTCPS1CTL = 0x04AA); | ||
659 | PROVIDE(RTCPS1CTL_L = 0x04AA); | ||
660 | PROVIDE(RTCPS1CTL_H = 0x04AB); | ||
661 | PROVIDE(RTCPS = 0x04AC); | ||
662 | PROVIDE(RTCPS_L = 0x04AC); | ||
663 | PROVIDE(RTCPS_H = 0x04AD); | ||
664 | PROVIDE(RTCIV = 0x04AE); | ||
665 | PROVIDE(RTCTIM0 = 0x04B0); | ||
666 | PROVIDE(RTCTIM0_L = 0x04B0); | ||
667 | PROVIDE(RTCTIM0_H = 0x04B1); | ||
668 | PROVIDE(RTCTIM1 = 0x04B2); | ||
669 | PROVIDE(RTCTIM1_L = 0x04B2); | ||
670 | PROVIDE(RTCTIM1_H = 0x04B3); | ||
671 | PROVIDE(RTCDATE = 0x04B4); | ||
672 | PROVIDE(RTCDATE_L = 0x04B4); | ||
673 | PROVIDE(RTCDATE_H = 0x04B5); | ||
674 | PROVIDE(RTCYEAR = 0x04B6); | ||
675 | PROVIDE(RTCYEAR_L = 0x04B6); | ||
676 | PROVIDE(RTCYEAR_H = 0x04B7); | ||
677 | PROVIDE(RTCAMINHR = 0x04B8); | ||
678 | PROVIDE(RTCAMINHR_L = 0x04B8); | ||
679 | PROVIDE(RTCAMINHR_H = 0x04B9); | ||
680 | PROVIDE(RTCADOWDAY = 0x04BA); | ||
681 | PROVIDE(RTCADOWDAY_L = 0x04BA); | ||
682 | PROVIDE(RTCADOWDAY_H = 0x04BB); | ||
683 | PROVIDE(BIN2BCD = 0x04BC); | ||
684 | PROVIDE(BCD2BIN = 0x04BE); | ||
685 | /************************************************************ | ||
686 | * SFR - Special Function Register Module | ||
687 | ************************************************************/ | ||
688 | PROVIDE(SFRIE1 = 0x0100); | ||
689 | PROVIDE(SFRIE1_L = 0x0100); | ||
690 | PROVIDE(SFRIE1_H = 0x0101); | ||
691 | PROVIDE(SFRIFG1 = 0x0102); | ||
692 | PROVIDE(SFRIFG1_L = 0x0102); | ||
693 | PROVIDE(SFRIFG1_H = 0x0103); | ||
694 | PROVIDE(SFRRPCR = 0x0104); | ||
695 | PROVIDE(SFRRPCR_L = 0x0104); | ||
696 | PROVIDE(SFRRPCR_H = 0x0105); | ||
697 | /************************************************************ | ||
698 | * SYS - System Module | ||
699 | ************************************************************/ | ||
700 | PROVIDE(SYSCTL = 0x0180); | ||
701 | PROVIDE(SYSCTL_L = 0x0180); | ||
702 | PROVIDE(SYSCTL_H = 0x0181); | ||
703 | PROVIDE(SYSJMBC = 0x0186); | ||
704 | PROVIDE(SYSJMBC_L = 0x0186); | ||
705 | PROVIDE(SYSJMBC_H = 0x0187); | ||
706 | PROVIDE(SYSJMBI0 = 0x0188); | ||
707 | PROVIDE(SYSJMBI0_L = 0x0188); | ||
708 | PROVIDE(SYSJMBI0_H = 0x0189); | ||
709 | PROVIDE(SYSJMBI1 = 0x018A); | ||
710 | PROVIDE(SYSJMBI1_L = 0x018A); | ||
711 | PROVIDE(SYSJMBI1_H = 0x018B); | ||
712 | PROVIDE(SYSJMBO0 = 0x018C); | ||
713 | PROVIDE(SYSJMBO0_L = 0x018C); | ||
714 | PROVIDE(SYSJMBO0_H = 0x018D); | ||
715 | PROVIDE(SYSJMBO1 = 0x018E); | ||
716 | PROVIDE(SYSJMBO1_L = 0x018E); | ||
717 | PROVIDE(SYSJMBO1_H = 0x018F); | ||
718 | PROVIDE(SYSUNIV = 0x019A); | ||
719 | PROVIDE(SYSUNIV_L = 0x019A); | ||
720 | PROVIDE(SYSUNIV_H = 0x019B); | ||
721 | PROVIDE(SYSSNIV = 0x019C); | ||
722 | PROVIDE(SYSSNIV_L = 0x019C); | ||
723 | PROVIDE(SYSSNIV_H = 0x019D); | ||
724 | PROVIDE(SYSRSTIV = 0x019E); | ||
725 | PROVIDE(SYSRSTIV_L = 0x019E); | ||
726 | PROVIDE(SYSRSTIV_H = 0x019F); | ||
727 | /************************************************************ | ||
728 | * Timer0_A3 | ||
729 | ************************************************************/ | ||
730 | PROVIDE(TA0CTL = 0x0340); | ||
731 | PROVIDE(TA0CCTL0 = 0x0342); | ||
732 | PROVIDE(TA0CCTL1 = 0x0344); | ||
733 | PROVIDE(TA0CCTL2 = 0x0346); | ||
734 | PROVIDE(TA0R = 0x0350); | ||
735 | PROVIDE(TA0CCR0 = 0x0352); | ||
736 | PROVIDE(TA0CCR1 = 0x0354); | ||
737 | PROVIDE(TA0CCR2 = 0x0356); | ||
738 | PROVIDE(TA0IV = 0x036E); | ||
739 | PROVIDE(TA0EX0 = 0x0360); | ||
740 | /************************************************************ | ||
741 | * Timer1_A3 | ||
742 | ************************************************************/ | ||
743 | PROVIDE(TA1CTL = 0x0380); | ||
744 | PROVIDE(TA1CCTL0 = 0x0382); | ||
745 | PROVIDE(TA1CCTL1 = 0x0384); | ||
746 | PROVIDE(TA1CCTL2 = 0x0386); | ||
747 | PROVIDE(TA1R = 0x0390); | ||
748 | PROVIDE(TA1CCR0 = 0x0392); | ||
749 | PROVIDE(TA1CCR1 = 0x0394); | ||
750 | PROVIDE(TA1CCR2 = 0x0396); | ||
751 | PROVIDE(TA1IV = 0x03AE); | ||
752 | PROVIDE(TA1EX0 = 0x03A0); | ||
753 | /************************************************************ | ||
754 | * Timer2_A2 | ||
755 | ************************************************************/ | ||
756 | PROVIDE(TA2CTL = 0x0400); | ||
757 | PROVIDE(TA2CCTL0 = 0x0402); | ||
758 | PROVIDE(TA2CCTL1 = 0x0404); | ||
759 | PROVIDE(TA2R = 0x0410); | ||
760 | PROVIDE(TA2CCR0 = 0x0412); | ||
761 | PROVIDE(TA2CCR1 = 0x0414); | ||
762 | PROVIDE(TA2IV = 0x042E); | ||
763 | PROVIDE(TA2EX0 = 0x0420); | ||
764 | /************************************************************ | ||
765 | * Timer3_A2 | ||
766 | ************************************************************/ | ||
767 | PROVIDE(TA3CTL = 0x0440); | ||
768 | PROVIDE(TA3CCTL0 = 0x0442); | ||
769 | PROVIDE(TA3CCTL1 = 0x0444); | ||
770 | PROVIDE(TA3R = 0x0450); | ||
771 | PROVIDE(TA3CCR0 = 0x0452); | ||
772 | PROVIDE(TA3CCR1 = 0x0454); | ||
773 | PROVIDE(TA3IV = 0x046E); | ||
774 | PROVIDE(TA3EX0 = 0x0460); | ||
775 | /************************************************************ | ||
776 | * Timer0_B7 | ||
777 | ************************************************************/ | ||
778 | PROVIDE(TB0CTL = 0x03C0); | ||
779 | PROVIDE(TB0CCTL0 = 0x03C2); | ||
780 | PROVIDE(TB0CCTL1 = 0x03C4); | ||
781 | PROVIDE(TB0CCTL2 = 0x03C6); | ||
782 | PROVIDE(TB0CCTL3 = 0x03C8); | ||
783 | PROVIDE(TB0CCTL4 = 0x03CA); | ||
784 | PROVIDE(TB0CCTL5 = 0x03CC); | ||
785 | PROVIDE(TB0CCTL6 = 0x03CE); | ||
786 | PROVIDE(TB0R = 0x03D0); | ||
787 | PROVIDE(TB0CCR0 = 0x03D2); | ||
788 | PROVIDE(TB0CCR1 = 0x03D4); | ||
789 | PROVIDE(TB0CCR2 = 0x03D6); | ||
790 | PROVIDE(TB0CCR3 = 0x03D8); | ||
791 | PROVIDE(TB0CCR4 = 0x03DA); | ||
792 | PROVIDE(TB0CCR5 = 0x03DC); | ||
793 | PROVIDE(TB0CCR6 = 0x03DE); | ||
794 | PROVIDE(TB0EX0 = 0x03E0); | ||
795 | PROVIDE(TB0IV = 0x03EE); | ||
796 | /************************************************************ | ||
797 | * USCI A0 | ||
798 | ************************************************************/ | ||
799 | PROVIDE(UCA0CTLW0 = 0x05C0); | ||
800 | PROVIDE(UCA0CTLW0_L = 0x05C0); | ||
801 | PROVIDE(UCA0CTLW0_H = 0x05C1); | ||
802 | PROVIDE(UCA0CTLW1 = 0x05C2); | ||
803 | PROVIDE(UCA0CTLW1_L = 0x05C2); | ||
804 | PROVIDE(UCA0CTLW1_H = 0x05C3); | ||
805 | PROVIDE(UCA0BRW = 0x05C6); | ||
806 | PROVIDE(UCA0BRW_L = 0x05C6); | ||
807 | PROVIDE(UCA0BRW_H = 0x05C7); | ||
808 | PROVIDE(UCA0MCTLW = 0x05C8); | ||
809 | PROVIDE(UCA0MCTLW_L = 0x05C8); | ||
810 | PROVIDE(UCA0MCTLW_H = 0x05C9); | ||
811 | PROVIDE(UCA0STATW = 0x05CA); | ||
812 | PROVIDE(UCA0RXBUF = 0x05CC); | ||
813 | PROVIDE(UCA0RXBUF_L = 0x05CC); | ||
814 | PROVIDE(UCA0RXBUF_H = 0x05CD); | ||
815 | PROVIDE(UCA0TXBUF = 0x05CE); | ||
816 | PROVIDE(UCA0TXBUF_L = 0x05CE); | ||
817 | PROVIDE(UCA0TXBUF_H = 0x05CF); | ||
818 | PROVIDE(UCA0ABCTL = 0x05D0); | ||
819 | PROVIDE(UCA0IRCTL = 0x05D2); | ||
820 | PROVIDE(UCA0IRCTL_L = 0x05D2); | ||
821 | PROVIDE(UCA0IRCTL_H = 0x05D3); | ||
822 | PROVIDE(UCA0IE = 0x05DA); | ||
823 | PROVIDE(UCA0IE_L = 0x05DA); | ||
824 | PROVIDE(UCA0IE_H = 0x05DB); | ||
825 | PROVIDE(UCA0IFG = 0x05DC); | ||
826 | PROVIDE(UCA0IFG_L = 0x05DC); | ||
827 | PROVIDE(UCA0IFG_H = 0x05DD); | ||
828 | PROVIDE(UCA0IV = 0x05DE); | ||
829 | /************************************************************ | ||
830 | * USCI A1 | ||
831 | ************************************************************/ | ||
832 | PROVIDE(UCA1CTLW0 = 0x05E0); | ||
833 | PROVIDE(UCA1CTLW0_L = 0x05E0); | ||
834 | PROVIDE(UCA1CTLW0_H = 0x05E1); | ||
835 | PROVIDE(UCA1CTLW1 = 0x05E2); | ||
836 | PROVIDE(UCA1CTLW1_L = 0x05E2); | ||
837 | PROVIDE(UCA1CTLW1_H = 0x05E3); | ||
838 | PROVIDE(UCA1BRW = 0x05E6); | ||
839 | PROVIDE(UCA1BRW_L = 0x05E6); | ||
840 | PROVIDE(UCA1BRW_H = 0x05E7); | ||
841 | PROVIDE(UCA1MCTLW = 0x05E8); | ||
842 | PROVIDE(UCA1MCTLW_L = 0x05E8); | ||
843 | PROVIDE(UCA1MCTLW_H = 0x05E9); | ||
844 | PROVIDE(UCA1STATW = 0x05EA); | ||
845 | PROVIDE(UCA1RXBUF = 0x05EC); | ||
846 | PROVIDE(UCA1RXBUF_L = 0x05EC); | ||
847 | PROVIDE(UCA1RXBUF_H = 0x05ED); | ||
848 | PROVIDE(UCA1TXBUF = 0x05EE); | ||
849 | PROVIDE(UCA1TXBUF_L = 0x05EE); | ||
850 | PROVIDE(UCA1TXBUF_H = 0x05EF); | ||
851 | PROVIDE(UCA1ABCTL = 0x05F0); | ||
852 | PROVIDE(UCA1IRCTL = 0x05F2); | ||
853 | PROVIDE(UCA1IRCTL_L = 0x05F2); | ||
854 | PROVIDE(UCA1IRCTL_H = 0x05F3); | ||
855 | PROVIDE(UCA1IE = 0x05FA); | ||
856 | PROVIDE(UCA1IE_L = 0x05FA); | ||
857 | PROVIDE(UCA1IE_H = 0x05FB); | ||
858 | PROVIDE(UCA1IFG = 0x05FC); | ||
859 | PROVIDE(UCA1IFG_L = 0x05FC); | ||
860 | PROVIDE(UCA1IFG_H = 0x05FD); | ||
861 | PROVIDE(UCA1IV = 0x05FE); | ||
862 | /************************************************************ | ||
863 | * USCI B0 | ||
864 | ************************************************************/ | ||
865 | PROVIDE(UCB0CTLW0 = 0x0640); | ||
866 | PROVIDE(UCB0CTLW0_L = 0x0640); | ||
867 | PROVIDE(UCB0CTLW0_H = 0x0641); | ||
868 | PROVIDE(UCB0CTLW1 = 0x0642); | ||
869 | PROVIDE(UCB0CTLW1_L = 0x0642); | ||
870 | PROVIDE(UCB0CTLW1_H = 0x0643); | ||
871 | PROVIDE(UCB0BRW = 0x0646); | ||
872 | PROVIDE(UCB0BRW_L = 0x0646); | ||
873 | PROVIDE(UCB0BRW_H = 0x0647); | ||
874 | PROVIDE(UCB0STATW = 0x0648); | ||
875 | PROVIDE(UCB0STATW_L = 0x0648); | ||
876 | PROVIDE(UCB0STATW_H = 0x0649); | ||
877 | PROVIDE(UCB0TBCNT = 0x064A); | ||
878 | PROVIDE(UCB0TBCNT_L = 0x064A); | ||
879 | PROVIDE(UCB0TBCNT_H = 0x064B); | ||
880 | PROVIDE(UCB0RXBUF = 0x064C); | ||
881 | PROVIDE(UCB0RXBUF_L = 0x064C); | ||
882 | PROVIDE(UCB0RXBUF_H = 0x064D); | ||
883 | PROVIDE(UCB0TXBUF = 0x064E); | ||
884 | PROVIDE(UCB0TXBUF_L = 0x064E); | ||
885 | PROVIDE(UCB0TXBUF_H = 0x064F); | ||
886 | PROVIDE(UCB0I2COA0 = 0x0654); | ||
887 | PROVIDE(UCB0I2COA0_L = 0x0654); | ||
888 | PROVIDE(UCB0I2COA0_H = 0x0655); | ||
889 | PROVIDE(UCB0I2COA1 = 0x0656); | ||
890 | PROVIDE(UCB0I2COA1_L = 0x0656); | ||
891 | PROVIDE(UCB0I2COA1_H = 0x0657); | ||
892 | PROVIDE(UCB0I2COA2 = 0x0658); | ||
893 | PROVIDE(UCB0I2COA2_L = 0x0658); | ||
894 | PROVIDE(UCB0I2COA2_H = 0x0659); | ||
895 | PROVIDE(UCB0I2COA3 = 0x065A); | ||
896 | PROVIDE(UCB0I2COA3_L = 0x065A); | ||
897 | PROVIDE(UCB0I2COA3_H = 0x065B); | ||
898 | PROVIDE(UCB0ADDRX = 0x065C); | ||
899 | PROVIDE(UCB0ADDRX_L = 0x065C); | ||
900 | PROVIDE(UCB0ADDRX_H = 0x065D); | ||
901 | PROVIDE(UCB0ADDMASK = 0x065E); | ||
902 | PROVIDE(UCB0ADDMASK_L = 0x065E); | ||
903 | PROVIDE(UCB0ADDMASK_H = 0x065F); | ||
904 | PROVIDE(UCB0I2CSA = 0x0660); | ||
905 | PROVIDE(UCB0I2CSA_L = 0x0660); | ||
906 | PROVIDE(UCB0I2CSA_H = 0x0661); | ||
907 | PROVIDE(UCB0IE = 0x066A); | ||
908 | PROVIDE(UCB0IE_L = 0x066A); | ||
909 | PROVIDE(UCB0IE_H = 0x066B); | ||
910 | PROVIDE(UCB0IFG = 0x066C); | ||
911 | PROVIDE(UCB0IFG_L = 0x066C); | ||
912 | PROVIDE(UCB0IFG_H = 0x066D); | ||
913 | PROVIDE(UCB0IV = 0x066E); | ||
914 | /************************************************************ | ||
915 | * WATCHDOG TIMER A | ||
916 | ************************************************************/ | ||
917 | PROVIDE(WDTCTL = 0x015C); | ||
918 | PROVIDE(WDTCTL_L = 0x015C); | ||
919 | PROVIDE(WDTCTL_H = 0x015D); | ||
920 | /************************************************************ | ||
921 | * TLV Descriptors | ||
922 | ************************************************************/ | ||
923 | /************************************************************ | ||
924 | * Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) | ||
925 | ************************************************************/ | ||
926 | /************************************************************ | ||
927 | * End of Modules | ||
928 | ************************************************************/ | ||