aboutsummaryrefslogtreecommitdiff
path: root/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
diff options
context:
space:
mode:
authorAkshay <[email protected]>2022-04-10 12:13:40 +0100
committerAkshay <[email protected]>2022-04-10 12:13:40 +0100
commitdc90387ce7d8ba7b607d9c48540bf6d8b560f14d (patch)
tree4ccb8fa5886b66fa9d480edef74236c27f035e16 /lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
Diffstat (limited to 'lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c')
-rw-r--r--lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c92
1 files changed, 92 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
new file mode 100644
index 000000000..c5237d7f7
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
@@ -0,0 +1,92 @@
1/*
2 Copyright (C) 2015 Fabio Utzig
3 2016 Stéphane D'Alu / Bruno Remond
4
5 Licensed under the Apache License, Version 2.0 (the "License");
6 you may not use this file except in compliance with the License.
7 You may obtain a copy of the License at
8
9 http://www.apache.org/licenses/LICENSE-2.0
10
11 Unless required by applicable law or agreed to in writing, software
12 distributed under the License is distributed on an "AS IS" BASIS,
13 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 See the License for the specific language governing permissions and
15 limitations under the License.
16*/
17
18#include "hal.h"
19
20#if HAL_USE_PAL || defined(__DOXYGEN__)
21
22/* RAM Banks
23 * (Values are defined in Nordic gcc_startup_nrf51.s)
24 */
25#define NRF_POWER_RAMON_ADDRESS 0x40000524
26#define NRF_POWER_RAMONB_ADDRESS 0x40000554
27#define NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 0x3
28
29/**
30 * @brief PAL setup.
31 * @details Digital I/O ports static configuration as defined in @p board.h.
32 * This variable is used by the HAL when initializing the PAL driver.
33 */
34const PALConfig pal_default_config =
35{
36 .pads = {
37 PAL_MODE_UNCONNECTED, /* P0.0 */
38 PAL_MODE_UNCONNECTED, /* P0.1 */
39 PAL_MODE_UNCONNECTED, /* P0.2 */
40 PAL_MODE_UNCONNECTED, /* P0.3 */
41 PAL_MODE_UNCONNECTED, /* P0.4 */
42 PAL_MODE_UNCONNECTED, /* P0.5 */
43 PAL_MODE_UNCONNECTED, /* P0.6 */
44 PAL_MODE_OUTPUT_OPENDRAIN, /* P0.7 : SCL */
45 PAL_MODE_OUTPUT_PUSHPULL, /* P0.8 : UART_RTS */
46 PAL_MODE_OUTPUT_PUSHPULL, /* P0.9 : UART_TX */
47 PAL_MODE_INPUT_PULLUP, /* P0.10: UART_CTS */
48 PAL_MODE_INPUT_PULLUP, /* P0.11: UART_RX */
49 PAL_MODE_UNCONNECTED, /* P0.12 */
50 PAL_MODE_UNCONNECTED, /* P0.13 */
51 PAL_MODE_UNCONNECTED, /* P0.14 */
52 PAL_MODE_UNCONNECTED, /* P0.15 */
53 PAL_MODE_UNCONNECTED, /* P0.16 */
54 PAL_MODE_INPUT_PULLUP, /* P0.17: BTN1 */
55 PAL_MODE_INPUT_PULLUP, /* P0.18: BTN2 */
56 PAL_MODE_INPUT_PULLUP, /* P0.19: BTN3 */
57 PAL_MODE_INPUT_PULLUP, /* P0.20: BTN4 */
58 PAL_MODE_OUTPUT_PUSHPULL, /* P0.21: LED1 */
59 PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: LED2 */
60 PAL_MODE_OUTPUT_PUSHPULL, /* P0.23: LED3 */
61 PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: LED4 | SPI_SEL */
62 PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_MOSI */
63 PAL_MODE_UNCONNECTED, /* P0.26: XTAL (32MHz) */
64 PAL_MODE_UNCONNECTED, /* P0.27: XTAL (32MHz) */
65 PAL_MODE_INPUT_PULLUP, /* P0.28: SPI_MISO */
66 PAL_MODE_OUTPUT_PUSHPULL, /* P0.29: SPI_SCK */
67 PAL_MODE_OUTPUT_OPENDRAIN, /* P0.30: SDA */
68 PAL_MODE_UNCONNECTED, /* P0.31 */
69 },
70};
71#endif
72
73/**
74 * @brief Early initialization code.
75 * @details This initialization is performed just after reset before BSS and
76 * DATA segments initialization.
77 */
78void __early_init(void)
79{
80 /* Make sure ALL RAM banks are powered on */
81 *(uint32_t *)NRF_POWER_RAMON_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
82 *(uint32_t *)NRF_POWER_RAMONB_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
83}
84
85/**
86 * @brief Late initialization code.
87 * @note This initialization is performed after BSS and DATA segments
88 * initialization and before invoking the main() function.
89 */
90void boardInit(void)
91{
92}