1 files changed, 273 insertions, 0 deletions
diff --git a/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S b/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S
new file mode 100644
index 000000000..57a2f8a10
--- /dev/null
+++ b/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S
@@ -0,0 +1,273 @@
+/* Copyright (C) 2018  Adam Green (https://github.com/adamgreen)
+   Licensed under the Apache License, Version 2.0 (the "License");
+   you may not use this file except in compliance with the License.
+   You may obtain a copy of the License at
+       http://www.apache.org/licenses/LICENSE-2.0
+   Unless required by applicable law or agreed to in writing, software
+   distributed under the License is distributed on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.
+*/
+/* Implementation of code to generate various crash scenarios for testing. */
+    .text
+    .syntax unified
+    .global testMspMultipleOf8
+    .type testMspMultipleOf8, %function
+    .thumb_func
+    /* extern "C" void testMspMultipleOf8(void);
+       Uses MSP and has it pointing to an even multiple of 8.
+    */
+testMspMultipleOf8:
+    // Make SP, an even multiple of 8.
+    mov     r0, sp
+    movs    r1, #4
+    bics    r0, r1
+    mov     sp, r0
+    // Load 0xFFFFFFFF into LR
+    movs    r1, #1
+    rsbs    r0, r1, #0
+    mov     lr, r0
+    // Load known values into R0-R12
+    movs    r0, #0
+    // r1 was already set correctly above when initializing LR.
+    movs    r2, #2
+    movs    r3, #3
+    movs    r4, #4
+    movs    r5, #5
+    movs    r6, #6
+    movs    r7, #7
+    mov     r8, r7
+    mov     r9, r7
+    mov     r10, r7
+    mov     r11, r7
+    mov     r12, r7
+    add     r8, r1
+    add     r9, r2
+    add     r10, r3
+    add     r11, r4
+    add     r12, r5
+    // Generate a hard fault by executing an undefined instruction.
+    .word 0xDE00
+    // CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
+    b       .
+    // Let assembler know that we have hit the end of the function.
+    .pool
+    .size   testMspMultipleOf8, .-testMspMultipleOf8
+    .global testMspNotMultipleOf8
+    .type testMspNotMultipleOf8, %function
+    .thumb_func
+    /* extern "C" void testMspNotMultipleOf8(void);
+       Uses MSP and has it not pointing to an even multiple of 8.
+    */
+testMspNotMultipleOf8:
+    // Make SP, not an even multiple of 8.
+    mov     r0, sp
+    subs    r0, #8
+    movs    r1, #4
+    orrs    r0, r1
+    mov     sp, r0
+    // Load 0xFFFFFFFF into LR
+    movs    r1, #1
+    rsbs    r0, r1, #0
+    mov     lr, r0
+    // Load known values into R0-R12
+    movs    r0, #0
+    // r1 was already set correctly above when initializing LR.
+    movs    r2, #2
+    movs    r3, #3
+    movs    r4, #4
+    movs    r5, #5
+    movs    r6, #6
+    movs    r7, #7
+    mov     r8, r7
+    mov     r9, r7
+    mov     r10, r7
+    mov     r11, r7
+    mov     r12, r7
+    add     r8, r1
+    add     r9, r2
+    add     r10, r3
+    add     r11, r4
+    add     r12, r5
+    // Generate a hard fault by executing an undefined instruction.
+    .word 0xDE00
+    // CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
+    b       .
+    // Let assembler know that we have hit the end of the function.
+    .pool
+    .size   testMspNotMultipleOf8, .-testMspNotMultipleOf8
+    .global testPspMultipleOf8
+    .type testPspMultipleOf8, %function
+    .thumb_func
+    /* extern "C" void testPspMultipleOf8(void);
+       Uses MSP and has it pointing to an even multiple of 8.
+    */
+testPspMultipleOf8:
+    // Make PSP, an even multiple of 8.
+    mov     r0, sp
+    movs    r1, #4
+    bics    r0, r1
+    msr     psp, r0
+    // Switch to use of PSP.
+    movs    r0, #3
+    msr     control,r0
+    // Flush instructions so that control mods take effect.
+    isb
+    // Load 0xFFFFFFFF into LR
+    movs    r1, #1
+    rsbs    r0, r1, #0
+    mov     lr, r0
+    // Load known values into R0-R12
+    movs    r0, #0
+    // r1 was already set correctly above when initializing LR.
+    movs    r2, #2
+    movs    r3, #3
+    movs    r4, #4
+    movs    r5, #5
+    movs    r6, #6
+    movs    r7, #7
+    mov     r8, r7
+    mov     r9, r7
+    mov     r10, r7
+    mov     r11, r7
+    mov     r12, r7
+    add     r8, r1
+    add     r9, r2
+    add     r10, r3
+    add     r11, r4
+    add     r12, r5
+    // Generate a hard fault by executing an undefined instruction.
+    .word 0xDE00
+    // CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
+    b       .
+    // Let assembler know that we have hit the end of the function.
+    .pool
+    .size   testPspMultipleOf8, .-testPspMultipleOf8
+    .global testBreakpoints
+    .type testBreakpoints, %function
+    .thumb_func
+    /* extern "C" void testBreakpoints(void);
+       Set registers to known values, breakpoint, allow continuation, and breakpoint again to see if anything changed.
+    */
+testBreakpoints:
+    // Save away non-volatile registers that will be modified for testing.
+    mov     r0, r8
+    mov     r1, r9
+    mov     r2, r10
+    mov     r3, r11
+    push    {r0-r7}
+    // Load incrementing values into R0-R12
+    movs    r0, #0
+    movs    r1, #1
+    movs    r2, #2
+    movs    r3, #3
+    movs    r4, #4
+    movs    r5, #5
+    movs    r6, #6
+    movs    r7, #7
+    mov     r8, r7
+    mov     r9, r7
+    mov     r10, r7
+    mov     r11, r7
+    mov     r12, r7
+    add     r8, r1
+    add     r9, r2
+    add     r10, r3
+    add     r11, r4
+    add     r12, r5
+    // Issue one hard coded breakpoint.
+    bkpt    #0
+    // Issue another hard coded breakpoint and see if dumps contain same values for all registers other than PC.
+    bkpt    #255
+    // Restore non-volatile registers and return to caller.
+    pop     {r0-r7}
+    mov     r8, r0
+    mov     r9, r1
+    mov     r10, r2
+    mov     r11, r3
+    bx      lr
+    // Let assembler know that we have hit the end of the function.
+    .pool
+    .size   testBreakpoints, .-testBreakpoints
+#if defined(TARGET_M4)
+    .global testInitFPURegisters
+    .type testInitFPURegisters, %function
+    .thumb_func
+    /* extern "C" void testInitFPURegisters(void);
+       Initialize FPU registers to known values.
+    */
+testInitFPURegisters:
+    vmov.f32    s0, #-1.0
+    vmov.f32    s1, #1.0
+    vmov.f32    s2, #2.0
+    vmov.f32    s3, #3.0
+    vmov.f32    s4, #4.0
+    vmov.f32    s5, #5.0
+    vmov.f32    s6, #6.0
+    vmov.f32    s7, #7.0
+    vmov.f32    s8, #8.0
+    vmov.f32    s9, #9.0
+    vmov.f32    s10, #10.0
+    vmov.f32    s11, #11.0
+    vmov.f32    s12, #12.0
+    vmov.f32    s13, #13.0
+    vmov.f32    s14, #14.0
+    vmov.f32    s15, #15.0
+    vmov.f32    s16, #16.0
+    vmov.f32    s17, #17.0
+    vmov.f32    s18, #18.0
+    vmov.f32    s19, #19.0
+    vmov.f32    s20, #20.0
+    vmov.f32    s21, #21.0
+    vmov.f32    s22, #22.0
+    vmov.f32    s23, #23.0
+    vmov.f32    s24, #24.0
+    vmov.f32    s25, #25.0
+    vmov.f32    s26, #26.0
+    vmov.f32    s27, #27.0
+    vmov.f32    s28, #28.0
+    vmov.f32    s29, #29.0
+    vmov.f32    s30, #30.0
+    vmov.f32    s31, #31.0
+    ldr         r0, =0xBAADFEED
+    vmsr        fpscr, r0
+    bx          lr
+    .pool
+    .size   testInitFPURegisters, .-testInitFPURegisters
+#else
+    .global testInitFPURegisters
+    .type testInitFPURegisters, %function
+    .thumb_func
+    /* extern "C" void testInitFPURegisters(void);
+       Initialize FPU registers to known values.
+    */
+testInitFPURegisters:
+    bx      lr
+    .pool
+    .size   testInitFPURegisters, .-testInitFPURegisters
+#endif
+    .end

diff --git a/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S b/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S new file mode 100644 index 000000000..57a2f8a10 --- /dev/null +++ b/lib/chibios-contrib/demos/STM32/RT-STM32F407-DISCOVERY-fault_handlers/crash_test_asm.S
@@ -0,0 +1,273 @@
	1	/* Copyright (C) 2018 Adam Green (https://github.com/adamgreen)
	2
	3	Licensed under the Apache License, Version 2.0 (the "License");
	4	you may not use this file except in compliance with the License.
	5	You may obtain a copy of the License at
	6
	7	http://www.apache.org/licenses/LICENSE-2.0
	8
	9	Unless required by applicable law or agreed to in writing, software
	10	distributed under the License is distributed on an "AS IS" BASIS,
	11	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	12	See the License for the specific language governing permissions and
	13	limitations under the License.
	14	*/
	15	/* Implementation of code to generate various crash scenarios for testing. */
	16	.text
	17	.syntax unified
	18
	19	.global testMspMultipleOf8
	20	.type testMspMultipleOf8, %function
	21	.thumb_func
	22	/* extern "C" void testMspMultipleOf8(void);
	23	Uses MSP and has it pointing to an even multiple of 8.
	24	*/
	25	testMspMultipleOf8:
	26	// Make SP, an even multiple of 8.
	27	mov r0, sp
	28	movs r1, #4
	29	bics r0, r1
	30	mov sp, r0
	31	// Load 0xFFFFFFFF into LR
	32	movs r1, #1
	33	rsbs r0, r1, #0
	34	mov lr, r0
	35	// Load known values into R0-R12
	36	movs r0, #0
	37	// r1 was already set correctly above when initializing LR.
	38	movs r2, #2
	39	movs r3, #3
	40	movs r4, #4
	41	movs r5, #5
	42	movs r6, #6
	43	movs r7, #7
	44	mov r8, r7
	45	mov r9, r7
	46	mov r10, r7
	47	mov r11, r7
	48	mov r12, r7
	49	add r8, r1
	50	add r9, r2
	51	add r10, r3
	52	add r11, r4
	53	add r12, r5
	54	// Generate a hard fault by executing an undefined instruction.
	55	.word 0xDE00
	56	// CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
	57	b .
	58	// Let assembler know that we have hit the end of the function.
	59	.pool
	60	.size testMspMultipleOf8, .-testMspMultipleOf8
	61
	62
	63	.global testMspNotMultipleOf8
	64	.type testMspNotMultipleOf8, %function
	65	.thumb_func
	66	/* extern "C" void testMspNotMultipleOf8(void);
	67	Uses MSP and has it not pointing to an even multiple of 8.
	68	*/
	69	testMspNotMultipleOf8:
	70	// Make SP, not an even multiple of 8.
	71	mov r0, sp
	72	subs r0, #8
	73	movs r1, #4
	74	orrs r0, r1
	75	mov sp, r0
	76	// Load 0xFFFFFFFF into LR
	77	movs r1, #1
	78	rsbs r0, r1, #0
	79	mov lr, r0
	80	// Load known values into R0-R12
	81	movs r0, #0
	82	// r1 was already set correctly above when initializing LR.
	83	movs r2, #2
	84	movs r3, #3
	85	movs r4, #4
	86	movs r5, #5
	87	movs r6, #6
	88	movs r7, #7
	89	mov r8, r7
	90	mov r9, r7
	91	mov r10, r7
	92	mov r11, r7
	93	mov r12, r7
	94	add r8, r1
	95	add r9, r2
	96	add r10, r3
	97	add r11, r4
	98	add r12, r5
	99	// Generate a hard fault by executing an undefined instruction.
	100	.word 0xDE00
	101	// CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
	102	b .
	103	// Let assembler know that we have hit the end of the function.
	104	.pool
	105	.size testMspNotMultipleOf8, .-testMspNotMultipleOf8
	106
	107
	108	.global testPspMultipleOf8
	109	.type testPspMultipleOf8, %function
	110	.thumb_func
	111	/* extern "C" void testPspMultipleOf8(void);
	112	Uses MSP and has it pointing to an even multiple of 8.
	113	*/
	114	testPspMultipleOf8:
	115	// Make PSP, an even multiple of 8.
	116	mov r0, sp
	117	movs r1, #4
	118	bics r0, r1
	119	msr psp, r0
	120	// Switch to use of PSP.
	121	movs r0, #3
	122	msr control,r0
	123	// Flush instructions so that control mods take effect.
	124	isb
	125	// Load 0xFFFFFFFF into LR
	126	movs r1, #1
	127	rsbs r0, r1, #0
	128	mov lr, r0
	129	// Load known values into R0-R12
	130	movs r0, #0
	131	// r1 was already set correctly above when initializing LR.
	132	movs r2, #2
	133	movs r3, #3
	134	movs r4, #4
	135	movs r5, #5
	136	movs r6, #6
	137	movs r7, #7
	138	mov r8, r7
	139	mov r9, r7
	140	mov r10, r7
	141	mov r11, r7
	142	mov r12, r7
	143	add r8, r1
	144	add r9, r2
	145	add r10, r3
	146	add r11, r4
	147	add r12, r5
	148	// Generate a hard fault by executing an undefined instruction.
	149	.word 0xDE00
	150	// CrashCatcher_Entry() shouldn't return but if it does, just infinite loop here.
	151	b .
	152	// Let assembler know that we have hit the end of the function.
	153	.pool
	154	.size testPspMultipleOf8, .-testPspMultipleOf8
	155
	156
	157	.global testBreakpoints
	158	.type testBreakpoints, %function
	159	.thumb_func
	160	/* extern "C" void testBreakpoints(void);
	161	Set registers to known values, breakpoint, allow continuation, and breakpoint again to see if anything changed.
	162	*/
	163	testBreakpoints:
	164	// Save away non-volatile registers that will be modified for testing.
	165	mov r0, r8
	166	mov r1, r9
	167	mov r2, r10
	168	mov r3, r11
	169	push {r0-r7}
	170
	171	// Load incrementing values into R0-R12
	172	movs r0, #0
	173	movs r1, #1
	174	movs r2, #2
	175	movs r3, #3
	176	movs r4, #4
	177	movs r5, #5
	178	movs r6, #6
	179	movs r7, #7
	180	mov r8, r7
	181	mov r9, r7
	182	mov r10, r7
	183	mov r11, r7
	184	mov r12, r7
	185	add r8, r1
	186	add r9, r2
	187	add r10, r3
	188	add r11, r4
	189	add r12, r5
	190
	191	// Issue one hard coded breakpoint.
	192	bkpt #0
	193
	194	// Issue another hard coded breakpoint and see if dumps contain same values for all registers other than PC.
	195	bkpt #255
	196
	197	// Restore non-volatile registers and return to caller.
	198	pop {r0-r7}
	199	mov r8, r0
	200	mov r9, r1
	201	mov r10, r2
	202	mov r11, r3
	203	bx lr
	204
	205	// Let assembler know that we have hit the end of the function.
	206	.pool
	207	.size testBreakpoints, .-testBreakpoints
	208
	209
	210	#if defined(TARGET_M4)
	211
	212	.global testInitFPURegisters
	213	.type testInitFPURegisters, %function
	214	.thumb_func
	215	/* extern "C" void testInitFPURegisters(void);
	216	Initialize FPU registers to known values.
	217	*/
	218	testInitFPURegisters:
	219	vmov.f32 s0, #-1.0
	220	vmov.f32 s1, #1.0
	221	vmov.f32 s2, #2.0
	222	vmov.f32 s3, #3.0
	223	vmov.f32 s4, #4.0
	224	vmov.f32 s5, #5.0
	225	vmov.f32 s6, #6.0
	226	vmov.f32 s7, #7.0
	227	vmov.f32 s8, #8.0
	228	vmov.f32 s9, #9.0
	229	vmov.f32 s10, #10.0
	230	vmov.f32 s11, #11.0
	231	vmov.f32 s12, #12.0
	232	vmov.f32 s13, #13.0
	233	vmov.f32 s14, #14.0
	234	vmov.f32 s15, #15.0
	235	vmov.f32 s16, #16.0
	236	vmov.f32 s17, #17.0
	237	vmov.f32 s18, #18.0
	238	vmov.f32 s19, #19.0
	239	vmov.f32 s20, #20.0
	240	vmov.f32 s21, #21.0
	241	vmov.f32 s22, #22.0
	242	vmov.f32 s23, #23.0
	243	vmov.f32 s24, #24.0
	244	vmov.f32 s25, #25.0
	245	vmov.f32 s26, #26.0
	246	vmov.f32 s27, #27.0
	247	vmov.f32 s28, #28.0
	248	vmov.f32 s29, #29.0
	249	vmov.f32 s30, #30.0
	250	vmov.f32 s31, #31.0
	251	ldr r0, =0xBAADFEED
	252	vmsr fpscr, r0
	253	bx lr
	254	.pool
	255	.size testInitFPURegisters, .-testInitFPURegisters
	256
	257	#else
	258
	259	.global testInitFPURegisters
	260	.type testInitFPURegisters, %function
	261	.thumb_func
	262	/* extern "C" void testInitFPURegisters(void);
	263	Initialize FPU registers to known values.
	264	*/
	265	testInitFPURegisters:
	266	bx lr
	267	.pool
	268	.size testInitFPURegisters, .-testInitFPURegisters
	269
	270	#endif
	271
	272
	273	.end