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1/*
2 * Copyright (c) 2013-2017 ARM Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 *
18 * $Date: 2. Feb 2017
19 * $Revision: V1.1
20 *
21 * Project: SAI (Serial Audio Interface) Driver definitions
22 */
23
24/* History:
25 * Version 1.1
26 * ARM_SAI_STATUS made volatile
27 * Version 1.0
28 * Initial release
29 */
30
31#ifndef DRIVER_SAI_H_
32#define DRIVER_SAI_H_
33
34#ifdef __cplusplus
35extern "C"
36{
37#endif
38
39#include "Driver_Common.h"
40
41#define ARM_SAI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
42
43
44/****** SAI Control Codes *****/
45
46#define ARM_SAI_CONTROL_Msk (0xFFU)
47#define ARM_SAI_CONFIGURE_TX (0x01U) ///< Configure Transmitter; arg1 and arg2 provide additional configuration
48#define ARM_SAI_CONFIGURE_RX (0x02U) ///< Configure Receiver; arg1 and arg2 provide additional configuration
49#define ARM_SAI_CONTROL_TX (0x03U) ///< Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute
50#define ARM_SAI_CONTROL_RX (0x04U) ///< Control Receiver; arg1.0: 0=disable (default), 1=enable
51#define ARM_SAI_MASK_SLOTS_TX (0x05U) ///< Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default
52#define ARM_SAI_MASK_SLOTS_RX (0x06U) ///< Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default
53#define ARM_SAI_ABORT_SEND (0x07U) ///< Abort \ref ARM_SAI_Send
54#define ARM_SAI_ABORT_RECEIVE (0x08U) ///< Abort \ref ARM_SAI_Receive
55
56/*----- SAI Control Codes: Configuration Parameters: Mode -----*/
57#define ARM_SAI_MODE_Pos 8
58#define ARM_SAI_MODE_Msk (1U << ARM_SAI_MODE_Pos)
59#define ARM_SAI_MODE_MASTER (1U << ARM_SAI_MODE_Pos) ///< Master Mode
60#define ARM_SAI_MODE_SLAVE (0U << ARM_SAI_MODE_Pos) ///< Slave Mode (default)
61
62/*----- SAI Control Codes: Configuration Parameters: Synchronization -----*/
63#define ARM_SAI_SYNCHRONIZATION_Pos 9
64#define ARM_SAI_SYNCHRONIZATION_Msk (1U << ARM_SAI_SYNCHRONIZATION_Pos)
65#define ARM_SAI_ASYNCHRONOUS (0U << ARM_SAI_SYNCHRONIZATION_Pos) ///< Asynchronous (default)
66#define ARM_SAI_SYNCHRONOUS (1U << ARM_SAI_SYNCHRONIZATION_Pos) ///< Synchronous
67
68/*----- SAI Control Codes: Configuration Parameters: Protocol -----*/
69#define ARM_SAI_PROTOCOL_Pos 10
70#define ARM_SAI_PROTOCOL_Msk (7U << ARM_SAI_PROTOCOL_Pos)
71#define ARM_SAI_PROTOCOL_USER (0U << ARM_SAI_PROTOCOL_Pos) ///< User defined (default)
72#define ARM_SAI_PROTOCOL_I2S (1U << ARM_SAI_PROTOCOL_Pos) ///< I2S
73#define ARM_SAI_PROTOCOL_MSB_JUSTIFIED (2U << ARM_SAI_PROTOCOL_Pos) ///< MSB (left) justified
74#define ARM_SAI_PROTOCOL_LSB_JUSTIFIED (3U << ARM_SAI_PROTOCOL_Pos) ///< LSB (right) justified
75#define ARM_SAI_PROTOCOL_PCM_SHORT (4U << ARM_SAI_PROTOCOL_Pos) ///< PCM with short frame
76#define ARM_SAI_PROTOCOL_PCM_LONG (5U << ARM_SAI_PROTOCOL_Pos) ///< PCM with long frame
77#define ARM_SAI_PROTOCOL_AC97 (6U << ARM_SAI_PROTOCOL_Pos) ///< AC'97
78
79/*----- SAI Control Codes: Configuration Parameters: Data Size -----*/
80#define ARM_SAI_DATA_SIZE_Pos 13
81#define ARM_SAI_DATA_SIZE_Msk (0x1FU << ARM_SAI_DATA_SIZE_Pos)
82#define ARM_SAI_DATA_SIZE(n) ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos) ///< Data size in bits (8..32)
83
84/*----- SAI Control Codes: Configuration Parameters: Bit Order -----*/
85#define ARM_SAI_BIT_ORDER_Pos 18
86#define ARM_SAI_BIT_ORDER_Msk (1U << ARM_SAI_BIT_ORDER_Pos)
87#define ARM_SAI_MSB_FIRST (0U << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with MSB first (default)
88#define ARM_SAI_LSB_FIRST (1U << ARM_SAI_BIT_ORDER_Pos) ///< Data is transferred with LSB first; User Protocol only (ignored otherwise)
89
90/*----- SAI Control Codes: Configuration Parameters: Mono Mode -----*/
91#define ARM_SAI_MONO_MODE (1U << 19) ///< Mono Mode (only for I2S, MSB/LSB justified)
92
93/*----- SAI Control Codes:Configuration Parameters: Companding -----*/
94#define ARM_SAI_COMPANDING_Pos 20
95#define ARM_SAI_COMPANDING_Msk (3U << ARM_SAI_COMPANDING_Pos)
96#define ARM_SAI_COMPANDING_NONE (0U << ARM_SAI_COMPANDING_Pos) ///< No companding (default)
97#define ARM_SAI_COMPANDING_A_LAW (2U << ARM_SAI_COMPANDING_Pos) ///< A-Law companding
98#define ARM_SAI_COMPANDING_U_LAW (3U << ARM_SAI_COMPANDING_Pos) ///< u-Law companding
99
100/*----- SAI Control Codes: Configuration Parameters: Clock Polarity -----*/
101#define ARM_SAI_CLOCK_POLARITY_Pos 23
102#define ARM_SAI_CLOCK_POLARITY_Msk (1U << ARM_SAI_CLOCK_POLARITY_Pos)
103#define ARM_SAI_CLOCK_POLARITY_0 (0U << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on falling edge, Capture on rising edge (default)
104#define ARM_SAI_CLOCK_POLARITY_1 (1U << ARM_SAI_CLOCK_POLARITY_Pos) ///< Drive on rising edge, Capture on falling edge
105
106/*----- SAI Control Codes: Configuration Parameters: Master Clock Pin -----*/
107#define ARM_SAI_MCLK_PIN_Pos 24
108#define ARM_SAI_MCLK_PIN_Msk (3U << ARM_SAI_MCLK_PIN_Pos)
109#define ARM_SAI_MCLK_PIN_INACTIVE (0U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK not used (default)
110#define ARM_SAI_MCLK_PIN_OUTPUT (1U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is output (Master only)
111#define ARM_SAI_MCLK_PIN_INPUT (2U << ARM_SAI_MCLK_PIN_Pos) ///< MCLK is input (Master only)
112
113
114/****** SAI Configuration (arg1) *****/
115
116/*----- SAI Configuration (arg1): Frame Length -----*/
117#define ARM_SAI_FRAME_LENGTH_Pos 0
118#define ARM_SAI_FRAME_LENGTH_Msk (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos)
119#define ARM_SAI_FRAME_LENGTH(n) ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos) ///< Frame length in bits (8..1024); default depends on protocol and data
120
121/*----- SAI Configuration (arg1): Frame Sync Width -----*/
122#define ARM_SAI_FRAME_SYNC_WIDTH_Pos 10
123#define ARM_SAI_FRAME_SYNC_WIDTH_Msk (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
124#define ARM_SAI_FRAME_SYNC_WIDTH(n) ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos) ///< Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise)
125
126/*----- SAI Configuration (arg1): Frame Sync Polarity -----*/
127#define ARM_SAI_FRAME_SYNC_POLARITY_Pos 18
128#define ARM_SAI_FRAME_SYNC_POLARITY_Msk (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
129#define ARM_SAI_FRAME_SYNC_POLARITY_HIGH (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active high (default); User Protocol only (ignored otherwise)
130#define ARM_SAI_FRAME_SYNC_POLARITY_LOW (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos) ///< Frame Sync is active low; User Protocol only (ignored otherwise)
131
132/*----- SAI Configuration (arg1): Frame Sync Early -----*/
133#define ARM_SAI_FRAME_SYNC_EARLY (1U << 19) ///< Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise)
134
135/*----- SAI Configuration (arg1): Slot Count -----*/
136#define ARM_SAI_SLOT_COUNT_Pos 20
137#define ARM_SAI_SLOT_COUNT_Msk (0x1FU << ARM_SAI_SLOT_COUNT_Pos)
138#define ARM_SAI_SLOT_COUNT(n) ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos) ///< Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise)
139
140/*----- SAI Configuration (arg1): Slot Size -----*/
141#define ARM_SAI_SLOT_SIZE_Pos 25
142#define ARM_SAI_SLOT_SIZE_Msk (3U << ARM_SAI_SLOT_SIZE_Pos)
143#define ARM_SAI_SLOT_SIZE_DEFAULT (0U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size is equal to data size (default)
144#define ARM_SAI_SLOT_SIZE_16 (1U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 16 bits; User Protocol only (ignored otherwise)
145#define ARM_SAI_SLOT_SIZE_32 (3U << ARM_SAI_SLOT_SIZE_Pos) ///< Slot size = 32 bits; User Protocol only (ignored otherwise)
146
147/*----- SAI Configuration (arg1): Slot Offset -----*/
148#define ARM_SAI_SLOT_OFFSET_Pos 27
149#define ARM_SAI_SLOT_OFFSET_Msk (0x1FU << ARM_SAI_SLOT_OFFSET_Pos)
150#define ARM_SAI_SLOT_OFFSET(n) (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos) ///< Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise)
151
152/****** SAI Configuration (arg2) *****/
153
154/*----- SAI Control Codes: Configuration Parameters: Audio Frequency (Master only) -----*/
155#define ARM_SAI_AUDIO_FREQ_Msk (0x0FFFFFU) ///< Audio frequency mask
156
157/*----- SAI Control Codes: Configuration Parameters: Master Clock Prescaler (Master only and MCLK Pin) -----*/
158#define ARM_SAI_MCLK_PRESCALER_Pos 20
159#define ARM_SAI_MCLK_PRESCALER_Msk (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos)
160#define ARM_SAI_MCLK_PRESCALER(n) ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos) ///< MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1)
161
162
163/****** SAI specific error codes *****/
164#define ARM_SAI_ERROR_SYNCHRONIZATION (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< Specified Synchronization not supported
165#define ARM_SAI_ERROR_PROTOCOL (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Specified Protocol not supported
166#define ARM_SAI_ERROR_DATA_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Specified Data size not supported
167#define ARM_SAI_ERROR_BIT_ORDER (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< Specified Bit order not supported
168#define ARM_SAI_ERROR_MONO_MODE (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Specified Mono mode not supported
169#define ARM_SAI_ERROR_COMPANDING (ARM_DRIVER_ERROR_SPECIFIC - 6) ///< Specified Companding not supported
170#define ARM_SAI_ERROR_CLOCK_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 7) ///< Specified Clock polarity not supported
171#define ARM_SAI_ERROR_AUDIO_FREQ (ARM_DRIVER_ERROR_SPECIFIC - 8) ///< Specified Audio frequency not supported
172#define ARM_SAI_ERROR_MCLK_PIN (ARM_DRIVER_ERROR_SPECIFIC - 9) ///< Specified MCLK Pin setting not supported
173#define ARM_SAI_ERROR_MCLK_PRESCALER (ARM_DRIVER_ERROR_SPECIFIC - 10) ///< Specified MCLK Prescaler not supported
174#define ARM_SAI_ERROR_FRAME_LENGHT (ARM_DRIVER_ERROR_SPECIFIC - 11) ///< Specified Frame length not supported
175#define ARM_SAI_ERROR_FRAME_SYNC_WIDTH (ARM_DRIVER_ERROR_SPECIFIC - 12) ///< Specified Frame Sync width not supported
176#define ARM_SAI_ERROR_FRAME_SYNC_POLARITY (ARM_DRIVER_ERROR_SPECIFIC - 13) ///< Specified Frame Sync polarity not supported
177#define ARM_SAI_ERROR_FRAME_SYNC_EARLY (ARM_DRIVER_ERROR_SPECIFIC - 14) ///< Specified Frame Sync early not supported
178#define ARM_SAI_ERROR_SLOT_COUNT (ARM_DRIVER_ERROR_SPECIFIC - 15) ///< Specified Slot count not supported
179#define ARM_SAI_ERROR_SLOT_SIZE (ARM_DRIVER_ERROR_SPECIFIC - 16) ///< Specified Slot size not supported
180#define ARM_SAI_ERROR_SLOT_OFFESET (ARM_DRIVER_ERROR_SPECIFIC - 17) ///< Specified Slot offset not supported
181
182
183/**
184\brief SAI Status
185*/
186typedef volatile struct _ARM_SAI_STATUS {
187 uint32_t tx_busy : 1; ///< Transmitter busy flag
188 uint32_t rx_busy : 1; ///< Receiver busy flag
189 uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation)
190 uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation)
191 uint32_t frame_error : 1; ///< Sync Frame error detected (cleared on start of next send/receive operation)
192 uint32_t reserved : 27;
193} ARM_SAI_STATUS;
194
195
196/****** SAI Event *****/
197#define ARM_SAI_EVENT_SEND_COMPLETE (1U << 0) ///< Send completed
198#define ARM_SAI_EVENT_RECEIVE_COMPLETE (1U << 1) ///< Receive completed
199#define ARM_SAI_EVENT_TX_UNDERFLOW (1U << 2) ///< Transmit data not available
200#define ARM_SAI_EVENT_RX_OVERFLOW (1U << 3) ///< Receive data overflow
201#define ARM_SAI_EVENT_FRAME_ERROR (1U << 4) ///< Sync Frame error in Slave mode (optional)
202
203
204// Function documentation
205/**
206 \fn ARM_DRIVER_VERSION ARM_SAI_GetVersion (void)
207 \brief Get driver version.
208 \return \ref ARM_DRIVER_VERSION
209
210 \fn ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void)
211 \brief Get driver capabilities.
212 \return \ref ARM_SAI_CAPABILITIES
213
214 \fn int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event)
215 \brief Initialize SAI Interface.
216 \param[in] cb_event Pointer to \ref ARM_SAI_SignalEvent
217 \return \ref execution_status
218
219 \fn int32_t ARM_SAI_Uninitialize (void)
220 \brief De-initialize SAI Interface.
221 \return \ref execution_status
222
223 \fn int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state)
224 \brief Control SAI Interface Power.
225 \param[in] state Power state
226 \return \ref execution_status
227
228 \fn int32_t ARM_SAI_Send (const void *data, uint32_t num)
229 \brief Start sending data to SAI transmitter.
230 \param[in] data Pointer to buffer with data to send to SAI transmitter
231 \param[in] num Number of data items to send
232 \return \ref execution_status
233
234 \fn int32_t ARM_SAI_Receive (void *data, uint32_t num)
235 \brief Start receiving data from SAI receiver.
236 \param[out] data Pointer to buffer for data to receive from SAI receiver
237 \param[in] num Number of data items to receive
238 \return \ref execution_status
239
240 \fn uint32_t ARM_SAI_GetTxCount (void)
241 \brief Get transmitted data count.
242 \return number of data items transmitted
243
244 \fn uint32_t ARM_SAI_GetRxCount (void)
245 \brief Get received data count.
246 \return number of data items received
247
248 \fn int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2)
249 \brief Control SAI Interface.
250 \param[in] control Operation
251 \param[in] arg1 Argument 1 of operation (optional)
252 \param[in] arg2 Argument 2 of operation (optional)
253 \return common \ref execution_status and driver specific \ref sai_execution_status
254
255 \fn ARM_SAI_STATUS ARM_SAI_GetStatus (void)
256 \brief Get SAI status.
257 \return SAI status \ref ARM_SAI_STATUS
258
259 \fn void ARM_SAI_SignalEvent (uint32_t event)
260 \brief Signal SAI Events.
261 \param[in] event \ref SAI_events notification mask
262 \return none
263*/
264
265typedef void (*ARM_SAI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_SAI_SignalEvent : Signal SAI Event.
266
267
268/**
269\brief SAI Driver Capabilities.
270*/
271typedef struct _ARM_SAI_CAPABILITIES {
272 uint32_t asynchronous : 1; ///< supports asynchronous Transmit/Receive
273 uint32_t synchronous : 1; ///< supports synchronous Transmit/Receive
274 uint32_t protocol_user : 1; ///< supports user defined Protocol
275 uint32_t protocol_i2s : 1; ///< supports I2S Protocol
276 uint32_t protocol_justified : 1; ///< supports MSB/LSB justified Protocol
277 uint32_t protocol_pcm : 1; ///< supports PCM short/long frame Protocol
278 uint32_t protocol_ac97 : 1; ///< supports AC'97 Protocol
279 uint32_t mono_mode : 1; ///< supports Mono mode
280 uint32_t companding : 1; ///< supports Companding
281 uint32_t mclk_pin : 1; ///< supports MCLK (Master Clock) pin
282 uint32_t event_frame_error : 1; ///< supports Frame error event: \ref ARM_SAI_EVENT_FRAME_ERROR
283 uint32_t reserved : 21; ///< Reserved (must be zero)
284} ARM_SAI_CAPABILITIES;
285
286
287/**
288\brief Access structure of the SAI Driver.
289*/
290typedef struct _ARM_DRIVER_SAI {
291 ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_SAI_GetVersion : Get driver version.
292 ARM_SAI_CAPABILITIES (*GetCapabilities) (void); ///< Pointer to \ref ARM_SAI_GetCapabilities : Get driver capabilities.
293 int32_t (*Initialize) (ARM_SAI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_SAI_Initialize : Initialize SAI Interface.
294 int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_SAI_Uninitialize : De-initialize SAI Interface.
295 int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_SAI_PowerControl : Control SAI Interface Power.
296 int32_t (*Send) (const void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Send : Start sending data to SAI Interface.
297 int32_t (*Receive) ( void *data, uint32_t num); ///< Pointer to \ref ARM_SAI_Receive : Start receiving data from SAI Interface.
298 uint32_t (*GetTxCount) (void); ///< Pointer to \ref ARM_SAI_GetTxCount : Get transmitted data count.
299 uint32_t (*GetRxCount) (void); ///< Pointer to \ref ARM_SAI_GetRxCount : Get received data count.
300 int32_t (*Control) (uint32_t control, uint32_t arg1, uint32_t arg2); ///< Pointer to \ref ARM_SAI_Control : Control SAI Interface.
301 ARM_SAI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_SAI_GetStatus : Get SAI status.
302} const ARM_DRIVER_SAI;
303
304#ifdef __cplusplus
305}
306#endif
307
308#endif /* DRIVER_SAI_H_ */
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