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1/*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#include "dcd.h"
14
15/* Component ID definition, used by tools. */
16#ifndef FSL_COMPONENT_ID
17#define FSL_COMPONENT_ID "platform.drivers.xip_board"
18#endif
19
20#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
21#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
22#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
23__attribute__((section(".boot_hdr.dcd_data"), used))
24#elif defined(__ICCARM__)
25#pragma location = ".boot_hdr.dcd_data"
26#endif
27
28/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
29!!GlobalInfo
30product: DCDx V2.0
31processor: MIMXRT1021xxxxx
32package_id: MIMXRT1021DAG5A
33mcu_data: ksdk2_0
34processor_version: 0.0.0
35output_format: c_array
36 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
37/* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */
38const uint8_t dcd_data[] = {
39 /* HEADER */
40 /* Tag */
41 0xD2,
42 /* Image Length */
43 0x03, 0xE8,
44 /* Version */
45 0x41,
46
47 /* COMMANDS */
48
49 /* group: 'Imported Commands' */
50 /* #1.1-8, command header bytes for merged 'Write - value' command */
51 0xCC, 0x00, 0x44, 0x04,
52 /* #1.1, command: write_value, address: CCM_CCGR0, value: 0xFFFFFFFF, size: 4 */
53 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
54 /* #1.2, command: write_value, address: CCM_CCGR1, value: 0xFFFFFFFF, size: 4 */
55 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF,
56 /* #1.3, command: write_value, address: CCM_CCGR2, value: 0xFFFFFFFF, size: 4 */
57 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
58 /* #1.4, command: write_value, address: CCM_CCGR3, value: 0xFFFFFFFF, size: 4 */
59 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF,
60 /* #1.5, command: write_value, address: CCM_CCGR4, value: 0xFFFFFFFF, size: 4 */
61 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
62 /* #1.6, command: write_value, address: CCM_CCGR5, value: 0xFFFFFFFF, size: 4 */
63 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF,
64 /* #1.7, command: write_value, address: CCM_CCGR6, value: 0xFFFFFFFF, size: 4 */
65 0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF,
66 /* #1.8, command: write_value, address: CCM_ANALOG_PLL_SYS, value: 0x2001, size: 4 */
67 0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01,
68 /* #2, command: write_clear_bits, address: CCM_ANALOG_PFD_528, value: 0x800000, size: 4 */
69 0xCC, 0x00, 0x0C, 0x0C, 0x40, 0x0D, 0x81, 0x00, 0x00, 0x80, 0x00, 0x00,
70 /* #3.1-98, command header bytes for merged 'Write - value' command */
71 0xCC, 0x03, 0x14, 0x04,
72 /* #3.1, command: write_value, address: CCM_CBCDR, value: 0xA8340, size: 4 */
73 0x40, 0x0F, 0xC0, 0x14, 0x00, 0x0A, 0x83, 0x40,
74 /* #3.2, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00, value: 0x00, size: 4 */
75 0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00,
76 /* #3.3, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01, value: 0x00, size: 4 */
77 0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00,
78 /* #3.4, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02, value: 0x00, size: 4 */
79 0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00,
80 /* #3.5, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03, value: 0x00, size: 4 */
81 0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00,
82 /* #3.6, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04, value: 0x00, size: 4 */
83 0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00,
84 /* #3.7, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05, value: 0x00, size: 4 */
85 0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00,
86 /* #3.8, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06, value: 0x00, size: 4 */
87 0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00,
88 /* #3.9, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07, value: 0x00, size: 4 */
89 0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00,
90 /* #3.10, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08, value: 0x00, size: 4 */
91 0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00,
92 /* #3.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09, value: 0x00, size: 4 */
93 0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00,
94 /* #3.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10, value: 0x00, size: 4 */
95 0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00,
96 /* #3.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11, value: 0x00, size: 4 */
97 0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00,
98 /* #3.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12, value: 0x00, size: 4 */
99 0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00,
100 /* #3.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13, value: 0x00, size: 4 */
101 0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00,
102 /* #3.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14, value: 0x00, size: 4 */
103 0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00,
104 /* #3.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15, value: 0x00, size: 4 */
105 0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00,
106 /* #3.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16, value: 0x00, size: 4 */
107 0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00,
108 /* #3.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17, value: 0x00, size: 4 */
109 0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00,
110 /* #3.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18, value: 0x00, size: 4 */
111 0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00,
112 /* #3.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19, value: 0x00, size: 4 */
113 0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00,
114 /* #3.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20, value: 0x00, size: 4 */
115 0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00,
116 /* #3.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21, value: 0x00, size: 4 */
117 0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00,
118 /* #3.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22, value: 0x00, size: 4 */
119 0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00,
120 /* #3.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, value: 0x00, size: 4 */
121 0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00,
122 /* #3.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, value: 0x00, size: 4 */
123 0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00,
124 /* #3.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25, value: 0x00, size: 4 */
125 0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00,
126 /* #3.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26, value: 0x00, size: 4 */
127 0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00,
128 /* #3.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27, value: 0x00, size: 4 */
129 0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00,
130 /* #3.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28, value: 0x10, size: 4 */
131 0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x10,
132 /* #3.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29, value: 0x00, size: 4 */
133 0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00,
134 /* #3.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30, value: 0x00, size: 4 */
135 0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00,
136 /* #3.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, value: 0x00, size: 4 */
137 0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00,
138 /* #3.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, value: 0x00, size: 4 */
139 0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00,
140 /* #3.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33, value: 0x00, size: 4 */
141 0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00,
142 /* #3.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34, value: 0x00, size: 4 */
143 0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00,
144 /* #3.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35, value: 0x00, size: 4 */
145 0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00,
146 /* #3.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36, value: 0x00, size: 4 */
147 0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00,
148 /* #3.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37, value: 0x00, size: 4 */
149 0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00,
150 /* #3.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38, value: 0x00, size: 4 */
151 0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00,
152 /* #3.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39, value: 0x00, size: 4 */
153 0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x00,
154 /* #3.42, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00, value: 0xE1, size: 4 */
155 0x40, 0x1F, 0x81, 0x88, 0x00, 0x00, 0x00, 0xE1,
156 /* #3.43, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01, value: 0xE1, size: 4 */
157 0x40, 0x1F, 0x81, 0x8C, 0x00, 0x00, 0x00, 0xE1,
158 /* #3.44, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02, value: 0xE1, size: 4 */
159 0x40, 0x1F, 0x81, 0x90, 0x00, 0x00, 0x00, 0xE1,
160 /* #3.45, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03, value: 0xE1, size: 4 */
161 0x40, 0x1F, 0x81, 0x94, 0x00, 0x00, 0x00, 0xE1,
162 /* #3.46, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04, value: 0xE1, size: 4 */
163 0x40, 0x1F, 0x81, 0x98, 0x00, 0x00, 0x00, 0xE1,
164 /* #3.47, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05, value: 0xE1, size: 4 */
165 0x40, 0x1F, 0x81, 0x9C, 0x00, 0x00, 0x00, 0xE1,
166 /* #3.48, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06, value: 0xE1, size: 4 */
167 0x40, 0x1F, 0x81, 0xA0, 0x00, 0x00, 0x00, 0xE1,
168 /* #3.49, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07, value: 0xE1, size: 4 */
169 0x40, 0x1F, 0x81, 0xA4, 0x00, 0x00, 0x00, 0xE1,
170 /* #3.50, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08, value: 0xE1, size: 4 */
171 0x40, 0x1F, 0x81, 0xA8, 0x00, 0x00, 0x00, 0xE1,
172 /* #3.51, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09, value: 0xE1, size: 4 */
173 0x40, 0x1F, 0x81, 0xAC, 0x00, 0x00, 0x00, 0xE1,
174 /* #3.52, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10, value: 0xE1, size: 4 */
175 0x40, 0x1F, 0x81, 0xB0, 0x00, 0x00, 0x00, 0xE1,
176 /* #3.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11, value: 0xE1, size: 4 */
177 0x40, 0x1F, 0x81, 0xB4, 0x00, 0x00, 0x00, 0xE1,
178 /* #3.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12, value: 0xE1, size: 4 */
179 0x40, 0x1F, 0x81, 0xB8, 0x00, 0x00, 0x00, 0xE1,
180 /* #3.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13, value: 0xE1, size: 4 */
181 0x40, 0x1F, 0x81, 0xBC, 0x00, 0x00, 0x00, 0xE1,
182 /* #3.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14, value: 0xE1, size: 4 */
183 0x40, 0x1F, 0x81, 0xC0, 0x00, 0x00, 0x00, 0xE1,
184 /* #3.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15, value: 0xE1, size: 4 */
185 0x40, 0x1F, 0x81, 0xC4, 0x00, 0x00, 0x00, 0xE1,
186 /* #3.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16, value: 0xE1, size: 4 */
187 0x40, 0x1F, 0x81, 0xC8, 0x00, 0x00, 0x00, 0xE1,
188 /* #3.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17, value: 0xE1, size: 4 */
189 0x40, 0x1F, 0x81, 0xCC, 0x00, 0x00, 0x00, 0xE1,
190 /* #3.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18, value: 0xE1, size: 4 */
191 0x40, 0x1F, 0x81, 0xD0, 0x00, 0x00, 0x00, 0xE1,
192 /* #3.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19, value: 0xE1, size: 4 */
193 0x40, 0x1F, 0x81, 0xD4, 0x00, 0x00, 0x00, 0xE1,
194 /* #3.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20, value: 0xE1, size: 4 */
195 0x40, 0x1F, 0x81, 0xD8, 0x00, 0x00, 0x00, 0xE1,
196 /* #3.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21, value: 0xE1, size: 4 */
197 0x40, 0x1F, 0x81, 0xDC, 0x00, 0x00, 0x00, 0xE1,
198 /* #3.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22, value: 0xE1, size: 4 */
199 0x40, 0x1F, 0x81, 0xE0, 0x00, 0x00, 0x00, 0xE1,
200 /* #3.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23, value: 0xE1, size: 4 */
201 0x40, 0x1F, 0x81, 0xE4, 0x00, 0x00, 0x00, 0xE1,
202 /* #3.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24, value: 0xE1, size: 4 */
203 0x40, 0x1F, 0x81, 0xE8, 0x00, 0x00, 0x00, 0xE1,
204 /* #3.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25, value: 0xE1, size: 4 */
205 0x40, 0x1F, 0x81, 0xEC, 0x00, 0x00, 0x00, 0xE1,
206 /* #3.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26, value: 0xE1, size: 4 */
207 0x40, 0x1F, 0x81, 0xF0, 0x00, 0x00, 0x00, 0xE1,
208 /* #3.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27, value: 0xE1, size: 4 */
209 0x40, 0x1F, 0x81, 0xF4, 0x00, 0x00, 0x00, 0xE1,
210 /* #3.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28, value: 0xE1, size: 4 */
211 0x40, 0x1F, 0x81, 0xF8, 0x00, 0x00, 0x00, 0xE1,
212 /* #3.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29, value: 0xE1, size: 4 */
213 0x40, 0x1F, 0x81, 0xFC, 0x00, 0x00, 0x00, 0xE1,
214 /* #3.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30, value: 0xE1, size: 4 */
215 0x40, 0x1F, 0x82, 0x00, 0x00, 0x00, 0x00, 0xE1,
216 /* #3.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31, value: 0xE1, size: 4 */
217 0x40, 0x1F, 0x82, 0x04, 0x00, 0x00, 0x00, 0xE1,
218 /* #3.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32, value: 0xE1, size: 4 */
219 0x40, 0x1F, 0x82, 0x08, 0x00, 0x00, 0x00, 0xE1,
220 /* #3.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33, value: 0xE1, size: 4 */
221 0x40, 0x1F, 0x82, 0x0C, 0x00, 0x00, 0x00, 0xE1,
222 /* #3.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34, value: 0xE1, size: 4 */
223 0x40, 0x1F, 0x82, 0x10, 0x00, 0x00, 0x00, 0xE1,
224 /* #3.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35, value: 0xE1, size: 4 */
225 0x40, 0x1F, 0x82, 0x14, 0x00, 0x00, 0x00, 0xE1,
226 /* #3.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36, value: 0xE1, size: 4 */
227 0x40, 0x1F, 0x82, 0x18, 0x00, 0x00, 0x00, 0xE1,
228 /* #3.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37, value: 0xE1, size: 4 */
229 0x40, 0x1F, 0x82, 0x1C, 0x00, 0x00, 0x00, 0xE1,
230 /* #3.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38, value: 0xE1, size: 4 */
231 0x40, 0x1F, 0x82, 0x20, 0x00, 0x00, 0x00, 0xE1,
232 /* #3.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39, value: 0xE1, size: 4 */
233 0x40, 0x1F, 0x82, 0x24, 0x00, 0x00, 0x00, 0xE1,
234 /* #3.82, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */
235 0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04,
236 /* #3.83, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */
237 0x40, 0x2F, 0x00, 0x08, 0x00, 0x00, 0x00, 0x81,
238 /* #3.84, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */
239 0x40, 0x2F, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x81,
240 /* #3.85, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */
241 0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B,
242 /* #3.86, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */
243 0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B,
244 /* #3.87, command: write_value, address: SEMC_BR2, value: 0x8400001B, size: 4 */
245 0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B,
246 /* #3.88, command: write_value, address: SEMC_IOCR, value: 0x7988, size: 4 */
247 0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0x88,
248 /* #3.89, command: write_value, address: SEMC_SDRAMCR0, value: 0xF37, size: 4 */
249 0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x37,
250 /* #3.90, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */
251 0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22,
252 /* #3.91, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */
253 0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20,
254 /* #3.92, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */
255 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08,
256 /* #3.93, command: write_value, address: SEMC_DBICR0, value: 0x21, size: 4 */
257 0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21,
258 /* #3.94, command: write_value, address: SEMC_DBICR1, value: 0x888888, size: 4 */
259 0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88,
260 /* #3.95, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */
261 0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02,
262 /* #3.96, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */
263 0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00,
264 /* #3.97, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
265 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
266 /* #3.98, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */
267 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F,
268 /* #4, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
269 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
270 /* #5.1-2, command header bytes for merged 'Write - value' command */
271 0xCC, 0x00, 0x14, 0x04,
272 /* #5.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
273 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
274 /* #5.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */
275 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
276 /* #6, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
277 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
278 /* #7.1-2, command header bytes for merged 'Write - value' command */
279 0xCC, 0x00, 0x14, 0x04,
280 /* #7.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
281 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
282 /* #7.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */
283 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
284 /* #8, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
285 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
286 /* #9.1-3, command header bytes for merged 'Write - value' command */
287 0xCC, 0x00, 0x1C, 0x04,
288 /* #9.1, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4 */
289 0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x33,
290 /* #9.2, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
291 0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
292 /* #9.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */
293 0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A,
294 /* #10, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
295 0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
296 /* #11, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A09, size: 4 */
297 0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09
298 };
299/* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */
300
301#else
302const uint8_t dcd_data[] = {0x00};
303#endif /* XIP_BOOT_HEADER_DCD_ENABLE */
304#endif /* XIP_BOOT_HEADER_ENABLE */
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 20:21:21 +0100