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Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/boards/frdmkl27z/project_template/pin_mux.c')
-rw-r--r-- | lib/chibios-contrib/ext/mcux-sdk/boards/frdmkl27z/project_template/pin_mux.c | 766 |
1 files changed, 766 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkl27z/project_template/pin_mux.c b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkl27z/project_template/pin_mux.c new file mode 100644 index 000000000..705f8ff34 --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkl27z/project_template/pin_mux.c | |||
@@ -0,0 +1,766 @@ | |||
1 | /* | ||
2 | * Copyright 2018 NXP. | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * SPDX-License-Identifier: BSD-3-Clause | ||
6 | */ | ||
7 | |||
8 | /*********************************************************************************************************************** | ||
9 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file | ||
10 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. | ||
11 | **********************************************************************************************************************/ | ||
12 | |||
13 | /* clang-format off */ | ||
14 | /* | ||
15 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
16 | !!GlobalInfo | ||
17 | product: Pins v4.1 | ||
18 | processor: MKL27Z64xxx4 | ||
19 | package_id: MKL27Z64VLH4 | ||
20 | mcu_data: ksdk2_0 | ||
21 | processor_version: 4.0.0 | ||
22 | board: FRDM-KL27Z | ||
23 | pin_labels: | ||
24 | - {pin_num: '1', pin_signal: PTE0/CLKOUT32K/SPI1_MISO/LPUART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDA, label: 'J3[1]/CLKOUT32K', identifier: CLKOUT32K} | ||
25 | - {pin_num: '56', pin_signal: PTC11/I2C1_SDA, label: 'J2[3]/I2C1_SDA', identifier: I2C1_SDA} | ||
26 | - {pin_num: '21', pin_signal: PTE25/TPM0_CH1/I2C0_SDA, label: 'J1[8]/D3-TPM0_CH1', identifier: TPM0_CH1} | ||
27 | - {pin_num: '23', pin_signal: PTA1/LPUART0_RX/TPM2_CH0, label: 'J1[2]/J25[1]/D0-UART0_RX', identifier: DEBUG_UART0_RX} | ||
28 | - {pin_num: '24', pin_signal: PTA2/LPUART0_TX/TPM2_CH1, label: 'J1[4]/J26[1]/D1-UART0_TX', identifier: DEBUG_UART0_TX} | ||
29 | - {pin_num: '28', pin_signal: PTA12/TPM1_CH0, label: 'J1[6]/D2-TPM1_CH0', identifier: TPM1_CH0} | ||
30 | - {pin_num: '29', pin_signal: PTA13/TPM1_CH1, label: 'J1[10]/D4-TPM1_CH1/D4-LED_BLUE', identifier: LED_BLUE} | ||
31 | - {pin_num: '20', pin_signal: PTE24/TPM0_CH0/I2C0_SCL, label: 'J1[12]/D5-TPM0_CH0', identifier: TPM0_CH0} | ||
32 | - {pin_num: '54', pin_signal: CMP0_IN3/PTC9/I2C0_SDA/TPM0_CH5, label: 'J1[14]/D6-TPM0_CH5/CMP0_IN3', identifier: TPM0_CH5} | ||
33 | - {pin_num: '53', pin_signal: CMP0_IN2/PTC8/I2C0_SCL/TPM0_CH4, label: 'J1[16]/D7-TPM0_CH4/CMP0_IN2', identifier: CMP0_IN2} | ||
34 | - {pin_num: '19', pin_signal: PTE31/TPM0_CH4, label: 'J2[2]/D8-TPM0_CH4', identifier: TPM0_CH4} | ||
35 | - {pin_num: '27', pin_signal: PTA5/USB_CLKIN/TPM0_CH2, label: 'J2[4]/D9-TPM0_CH2', identifier: TPM0_CH2} | ||
36 | - {pin_num: '49', pin_signal: PTC4/LLWU_P8/SPI0_PCS0/LPUART1_TX/TPM0_CH3/SPI1_PCS0, label: 'J2[6]/D10-SPI0_CS0', identifier: SPI0_CS0} | ||
37 | - {pin_num: '51', pin_signal: CMP0_IN0/PTC6/LLWU_P10/SPI0_MOSI/EXTRG_IN/SPI0_MISO, label: 'J2[8]/D11-SPI0_MOSI', identifier: SPI0_MOSI} | ||
38 | - {pin_num: '52', pin_signal: CMP0_IN1/PTC7/SPI0_MISO/USB_SOF_OUT/SPI0_MOSI, label: 'J2[10]/D12-SPI0_MISO', identifier: SPI0_MISO} | ||
39 | - {pin_num: '50', pin_signal: PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT, label: 'J2[12]/D13-SPI0_SCK', identifier: SPI0_SCK} | ||
40 | - {pin_num: '63', pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/I2C1_SDA/SPI1_MISO/FXIO0_D6, label: 'J2[18]/J24[1]/D14-I2C1_SDA', identifier: ACCEL_I2C1_SDA;MAG_I2C1_SDA} | ||
41 | - {pin_num: '64', pin_signal: PTD7/SPI1_MISO/LPUART0_TX/I2C1_SCL/SPI1_MOSI/FXIO0_D7, label: 'J2[20]/J23[1]/D15-I2C1_SCL', identifier: ACCEL_I2C1_SCL;MAG_I2C1_SCL} | ||
42 | - {pin_num: '8', pin_signal: ADC0_DP1/ADC0_SE1/PTE16/SPI0_PCS0/UART2_TX/TPM_CLKIN0/FXIO0_D0, label: 'J4[2]/A0-ADC0_SE1', identifier: ADC0_SE1} | ||
43 | - {pin_num: '43', pin_signal: ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUT, label: 'J4[4]/A1-ADC0_SE14', identifier: USB_SOF_OUT} | ||
44 | - {pin_num: '9', pin_signal: ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/LPUART0_TX/FXIO0_D4, label: 'J4[6]/A2-ADC0_SE0', identifier: ADC0_SE0} | ||
45 | - {pin_num: '10', pin_signal: ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/LPUART0_RX/FXIO0_D5, label: 'J4[8]/A3-ADC0_SE4A'} | ||
46 | - {pin_num: '36', pin_signal: ADC0_SE9/PTB1/I2C0_SDA/TPM1_CH1/SPI1_MISO/SPI1_MOSI, label: 'J4[10]/A4-I2C0_SDA/ADC0_SE9', identifier: I2C0_SDA} | ||
47 | - {pin_num: '35', pin_signal: ADC0_SE8/PTB0/LLWU_P5/I2C0_SCL/TPM1_CH0/SPI1_MOSI/SPI1_MISO, label: 'J4[12]/A5-I2C0_SCL/ADC0_SE8', identifier: I2C0_SCL} | ||
48 | - {pin_num: '41', pin_signal: PTB18/TPM2_CH0, label: 'J2[11]/D11[1]/LED_RED', identifier: LED_RED} | ||
49 | - {pin_num: '25', pin_signal: PTA3/I2C1_SCL/TPM0_CH0/SWD_DIO, label: 'J11[2]/SWD_DIO'} | ||
50 | - {pin_num: '15', pin_signal: VREFL, label: GND} | ||
51 | - {pin_num: '14', pin_signal: VREF_OUT, label: VREFH_C15} | ||
52 | - {pin_num: '2', pin_signal: PTE1/SPI1_MOSI/LPUART1_RX/SPI1_MISO/I2C1_SCL, label: 'J3[3]'} | ||
53 | - {pin_num: '42', pin_signal: PTB19/TPM2_CH1, label: 'J2[13]/D11[4]/LED_GREEN', identifier: LED_GREEN} | ||
54 | - {pin_num: '16', pin_signal: VSSA, label: GND} | ||
55 | - {pin_num: '3', pin_signal: VDD3, label: P3V3_KL27Z} | ||
56 | - {pin_num: '4', pin_signal: VSS4, label: GND} | ||
57 | - {pin_num: '30', pin_signal: VDD36, label: P3V3_KL27Z} | ||
58 | - {pin_num: '48', pin_signal: VDD54, label: P3V3_KL27Z} | ||
59 | - {pin_num: '13', pin_signal: VDDA, label: P3V3_KL27Z} | ||
60 | - {pin_num: '7', pin_signal: USB_VDD, label: P3V3_KL27Z, identifier: USB_VDD} | ||
61 | - {pin_num: '57', pin_signal: PTD0/SPI0_PCS0/TPM0_CH0/FXIO0_D0, label: 'J1[1]'} | ||
62 | - {pin_num: '58', pin_signal: ADC0_SE5b/PTD1/SPI0_SCK/TPM0_CH1/FXIO0_D1, label: 'J1[3]'} | ||
63 | - {pin_num: '59', pin_signal: PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO/FXIO0_D2, label: 'J1[5]'} | ||
64 | - {pin_num: '60', pin_signal: PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI/FXIO0_D3, label: 'J1[7]'} | ||
65 | - {pin_num: '61', pin_signal: PTD4/LLWU_P14/SPI1_PCS0/UART2_RX/TPM0_CH4/FXIO0_D4, label: 'J1[9]/SDA_LED', identifier: SDA_LED} | ||
66 | - {pin_num: '62', pin_signal: ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5/FXIO0_D5, label: 'J1[11]/J3[2]/SDA_PTD5'} | ||
67 | - {pin_num: '5', pin_signal: USB0_DP, label: 'J10[3]', identifier: USB_DP} | ||
68 | - {pin_num: '6', pin_signal: USB0_DM, label: 'J10[2]', identifier: USB_DM} | ||
69 | - {pin_num: '22', pin_signal: PTA0/TPM0_CH5/SWD_CLK, label: 'J11[4]/KL27_SWD_CLK', identifier: TPM0_CH5} | ||
70 | - {pin_num: '26', pin_signal: PTA4/I2C1_SDA/TPM0_CH1/NMI_b, label: 'J2[5]/SW1', identifier: SW1} | ||
71 | - {pin_num: '31', pin_signal: VSS37, label: GND} | ||
72 | - {pin_num: '47', pin_signal: VSS53, label: GND} | ||
73 | - {pin_num: '55', pin_signal: PTC10/I2C1_SCL, label: 'J2[1]/I2C1_SCL', identifier: I2C1_SCL} | ||
74 | - {pin_num: '46', pin_signal: PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUT, label: 'J2[15]/U10[11]/J28[1]/INT1_ACCEL', identifier: INT1_ACCEL} | ||
75 | - {pin_num: '45', pin_signal: ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1, label: 'J3[15]/U10[9]/J27[1]/UART1_TX/INT2_ACCEL', identifier: INT2_ACCEL;INT1_MAG} | ||
76 | - {pin_num: '44', pin_signal: ADC0_SE15/PTC1/LLWU_P6/RTC_CLKIN/I2C1_SCL/TPM0_CH0, label: 'J3[13]/SW3', identifier: SW3} | ||
77 | - {pin_num: '40', pin_signal: PTB17/SPI1_MISO/LPUART0_TX/TPM_CLKIN1/SPI1_MOSI, label: 'J2[9]'} | ||
78 | - {pin_num: '39', pin_signal: PTB16/SPI1_MOSI/LPUART0_RX/TPM_CLKIN0/SPI1_MISO, label: 'J2[7]'} | ||
79 | - {pin_num: '38', pin_signal: ADC0_SE13/PTB3/I2C0_SDA/TPM2_CH1, label: 'J1[13]'} | ||
80 | - {pin_num: '37', pin_signal: ADC0_SE12/PTB2/I2C0_SCL/TPM2_CH0, label: 'J1[15]'} | ||
81 | - {pin_num: '34', pin_signal: PTA20/RESET_b, label: 'J3[6]/J11[10]/RST_K20D50_B', identifier: RESET} | ||
82 | - {pin_num: '33', pin_signal: XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1, label: XTAL_32KHZ, identifier: XTAL0} | ||
83 | - {pin_num: '32', pin_signal: EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0, label: EXTAL_32KHZ, identifier: EXTAL0} | ||
84 | - {pin_num: '18', pin_signal: ADC0_SE23/CMP0_IN4/PTE30/TPM0_CH3/TPM_CLKIN1/LPUART1_TX/LPTMR0_ALT1, label: TOUCH_B, identifier: TOUCH_B} | ||
85 | - {pin_num: '17', pin_signal: CMP0_IN5/ADC0_SE4b/PTE29/TPM0_CH2/TPM_CLKIN0, label: TOUCH_A, identifier: TOUCH_A} | ||
86 | - {pin_num: '12', pin_signal: ADC0_DM3/ADC0_SE7a/PTE23/TPM2_CH1/UART2_RX/FXIO0_D7, label: THER_B, identifier: THER_B} | ||
87 | - {pin_num: '11', pin_signal: ADC0_DP3/ADC0_SE3/PTE22/TPM2_CH0/UART2_TX/FXIO0_D6, label: THER_A, identifier: THER_A} | ||
88 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
89 | */ | ||
90 | /* clang-format on */ | ||
91 | |||
92 | #include "fsl_common.h" | ||
93 | #include "fsl_port.h" | ||
94 | #include "fsl_gpio.h" | ||
95 | #include "pin_mux.h" | ||
96 | |||
97 | /* FUNCTION ************************************************************************************************************ | ||
98 | * | ||
99 | * Function Name : BOARD_InitBootPins | ||
100 | * Description : Calls initialization functions. | ||
101 | * | ||
102 | * END ****************************************************************************************************************/ | ||
103 | void BOARD_InitBootPins(void) | ||
104 | { | ||
105 | BOARD_InitPins(); | ||
106 | BOARD_InitDEBUG_UARTPins(); | ||
107 | } | ||
108 | |||
109 | /* clang-format off */ | ||
110 | /* | ||
111 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
112 | BOARD_InitPins: | ||
113 | - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
114 | - pin_list: [] | ||
115 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
116 | */ | ||
117 | /* clang-format on */ | ||
118 | |||
119 | /* FUNCTION ************************************************************************************************************ | ||
120 | * | ||
121 | * Function Name : BOARD_InitPins | ||
122 | * Description : Configures pin routing and optionally pin electrical features. | ||
123 | * | ||
124 | * END ****************************************************************************************************************/ | ||
125 | void BOARD_InitPins(void) | ||
126 | { | ||
127 | } | ||
128 | |||
129 | /* clang-format off */ | ||
130 | /* | ||
131 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
132 | BOARD_InitLEDsPins: | ||
133 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
134 | - pin_list: | ||
135 | - {pin_num: '29', peripheral: GPIOA, signal: 'GPIO, 13', pin_signal: PTA13/TPM1_CH1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, pull_select: down, | ||
136 | pull_enable: disable} | ||
137 | - {pin_num: '41', peripheral: GPIOB, signal: 'GPIO, 18', pin_signal: PTB18/TPM2_CH0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, pull_select: down, | ||
138 | pull_enable: disable} | ||
139 | - {pin_num: '42', peripheral: GPIOB, signal: 'GPIO, 19', pin_signal: PTB19/TPM2_CH1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, pull_select: down, | ||
140 | pull_enable: disable} | ||
141 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
142 | */ | ||
143 | /* clang-format on */ | ||
144 | |||
145 | /* FUNCTION ************************************************************************************************************ | ||
146 | * | ||
147 | * Function Name : BOARD_InitLEDsPins | ||
148 | * Description : Configures pin routing and optionally pin electrical features. | ||
149 | * | ||
150 | * END ****************************************************************************************************************/ | ||
151 | void BOARD_InitLEDsPins(void) | ||
152 | { | ||
153 | /* Port A Clock Gate Control: Clock enabled */ | ||
154 | CLOCK_EnableClock(kCLOCK_PortA); | ||
155 | /* Port B Clock Gate Control: Clock enabled */ | ||
156 | CLOCK_EnableClock(kCLOCK_PortB); | ||
157 | |||
158 | gpio_pin_config_t LED_BLUE_config = { | ||
159 | .pinDirection = kGPIO_DigitalOutput, | ||
160 | .outputLogic = 1U | ||
161 | }; | ||
162 | /* Initialize GPIO functionality on pin PTA13 (pin 29) */ | ||
163 | GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_PIN, &LED_BLUE_config); | ||
164 | |||
165 | gpio_pin_config_t LED_RED_config = { | ||
166 | .pinDirection = kGPIO_DigitalOutput, | ||
167 | .outputLogic = 1U | ||
168 | }; | ||
169 | /* Initialize GPIO functionality on pin PTB18 (pin 41) */ | ||
170 | GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_PIN, &LED_RED_config); | ||
171 | |||
172 | gpio_pin_config_t LED_GREEN_config = { | ||
173 | .pinDirection = kGPIO_DigitalOutput, | ||
174 | .outputLogic = 1U | ||
175 | }; | ||
176 | /* Initialize GPIO functionality on pin PTB19 (pin 42) */ | ||
177 | GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_PIN, &LED_GREEN_config); | ||
178 | |||
179 | const port_pin_config_t LED_BLUE = {/* Internal pull-up/down resistor is disabled */ | ||
180 | kPORT_PullDisable, | ||
181 | /* Slow slew rate is configured */ | ||
182 | kPORT_SlowSlewRate, | ||
183 | /* Passive filter is disabled */ | ||
184 | kPORT_PassiveFilterDisable, | ||
185 | /* Low drive strength is configured */ | ||
186 | kPORT_LowDriveStrength, | ||
187 | /* Pin is configured as PTA13 */ | ||
188 | kPORT_MuxAsGpio}; | ||
189 | /* PORTA13 (pin 29) is configured as PTA13 */ | ||
190 | PORT_SetPinConfig(BOARD_LED_BLUE_PORT, BOARD_LED_BLUE_PIN, &LED_BLUE); | ||
191 | |||
192 | const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */ | ||
193 | kPORT_PullDisable, | ||
194 | /* Slow slew rate is configured */ | ||
195 | kPORT_SlowSlewRate, | ||
196 | /* Passive filter is disabled */ | ||
197 | kPORT_PassiveFilterDisable, | ||
198 | /* Low drive strength is configured */ | ||
199 | kPORT_LowDriveStrength, | ||
200 | /* Pin is configured as PTB18 */ | ||
201 | kPORT_MuxAsGpio}; | ||
202 | /* PORTB18 (pin 41) is configured as PTB18 */ | ||
203 | PORT_SetPinConfig(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, &LED_RED); | ||
204 | |||
205 | const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */ | ||
206 | kPORT_PullDisable, | ||
207 | /* Slow slew rate is configured */ | ||
208 | kPORT_SlowSlewRate, | ||
209 | /* Passive filter is disabled */ | ||
210 | kPORT_PassiveFilterDisable, | ||
211 | /* Low drive strength is configured */ | ||
212 | kPORT_LowDriveStrength, | ||
213 | /* Pin is configured as PTB19 */ | ||
214 | kPORT_MuxAsGpio}; | ||
215 | /* PORTB19 (pin 42) is configured as PTB19 */ | ||
216 | PORT_SetPinConfig(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, &LED_GREEN); | ||
217 | } | ||
218 | |||
219 | /* clang-format off */ | ||
220 | /* | ||
221 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
222 | BOARD_InitButtonsPins: | ||
223 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
224 | - pin_list: | ||
225 | - {pin_num: '26', peripheral: GPIOA, signal: 'GPIO, 4', pin_signal: PTA4/I2C1_SDA/TPM0_CH1/NMI_b, direction: INPUT, slew_rate: fast, pull_select: up, pull_enable: enable, | ||
226 | passive_filter: disable} | ||
227 | - {pin_num: '44', peripheral: GPIOC, signal: 'GPIO, 1', pin_signal: ADC0_SE15/PTC1/LLWU_P6/RTC_CLKIN/I2C1_SCL/TPM0_CH0, direction: INPUT, slew_rate: fast, pull_select: up, | ||
228 | pull_enable: enable} | ||
229 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
230 | */ | ||
231 | /* clang-format on */ | ||
232 | |||
233 | /* FUNCTION ************************************************************************************************************ | ||
234 | * | ||
235 | * Function Name : BOARD_InitButtonsPins | ||
236 | * Description : Configures pin routing and optionally pin electrical features. | ||
237 | * | ||
238 | * END ****************************************************************************************************************/ | ||
239 | void BOARD_InitButtonsPins(void) | ||
240 | { | ||
241 | /* Port A Clock Gate Control: Clock enabled */ | ||
242 | CLOCK_EnableClock(kCLOCK_PortA); | ||
243 | /* Port C Clock Gate Control: Clock enabled */ | ||
244 | CLOCK_EnableClock(kCLOCK_PortC); | ||
245 | |||
246 | gpio_pin_config_t SW1_config = { | ||
247 | .pinDirection = kGPIO_DigitalInput, | ||
248 | .outputLogic = 0U | ||
249 | }; | ||
250 | /* Initialize GPIO functionality on pin PTA4 (pin 26) */ | ||
251 | GPIO_PinInit(BOARD_SW1_GPIO, BOARD_SW1_PIN, &SW1_config); | ||
252 | |||
253 | gpio_pin_config_t SW3_config = { | ||
254 | .pinDirection = kGPIO_DigitalInput, | ||
255 | .outputLogic = 0U | ||
256 | }; | ||
257 | /* Initialize GPIO functionality on pin PTC1 (pin 44) */ | ||
258 | GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config); | ||
259 | |||
260 | const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */ | ||
261 | kPORT_PullUp, | ||
262 | /* Fast slew rate is configured */ | ||
263 | kPORT_FastSlewRate, | ||
264 | /* Passive filter is disabled */ | ||
265 | kPORT_PassiveFilterDisable, | ||
266 | /* Low drive strength is configured */ | ||
267 | kPORT_LowDriveStrength, | ||
268 | /* Pin is configured as PTA4 */ | ||
269 | kPORT_MuxAsGpio}; | ||
270 | /* PORTA4 (pin 26) is configured as PTA4 */ | ||
271 | PORT_SetPinConfig(BOARD_SW1_PORT, BOARD_SW1_PIN, &SW1); | ||
272 | |||
273 | const port_pin_config_t SW3 = {/* Internal pull-up resistor is enabled */ | ||
274 | kPORT_PullUp, | ||
275 | /* Fast slew rate is configured */ | ||
276 | kPORT_FastSlewRate, | ||
277 | /* Passive filter is disabled */ | ||
278 | kPORT_PassiveFilterDisable, | ||
279 | /* Low drive strength is configured */ | ||
280 | kPORT_LowDriveStrength, | ||
281 | /* Pin is configured as PTC1 */ | ||
282 | kPORT_MuxAsGpio}; | ||
283 | /* PORTC1 (pin 44) is configured as PTC1 */ | ||
284 | PORT_SetPinConfig(BOARD_SW3_PORT, BOARD_SW3_PIN, &SW3); | ||
285 | } | ||
286 | |||
287 | /* clang-format off */ | ||
288 | /* | ||
289 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
290 | BOARD_InitTSIPins: | ||
291 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
292 | - pin_list: | ||
293 | - {pin_num: '17', peripheral: GPIOE, signal: 'GPIO, 29', pin_signal: CMP0_IN5/ADC0_SE4b/PTE29/TPM0_CH2/TPM_CLKIN0, direction: INPUT, slew_rate: slow, pull_select: up, | ||
294 | pull_enable: disable} | ||
295 | - {pin_num: '18', peripheral: GPIOE, signal: 'GPIO, 30', pin_signal: ADC0_SE23/CMP0_IN4/PTE30/TPM0_CH3/TPM_CLKIN1/LPUART1_TX/LPTMR0_ALT1, direction: INPUT, slew_rate: slow, | ||
296 | pull_select: up, pull_enable: disable} | ||
297 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
298 | */ | ||
299 | /* clang-format on */ | ||
300 | |||
301 | /* FUNCTION ************************************************************************************************************ | ||
302 | * | ||
303 | * Function Name : BOARD_InitTSIPins | ||
304 | * Description : Configures pin routing and optionally pin electrical features. | ||
305 | * | ||
306 | * END ****************************************************************************************************************/ | ||
307 | void BOARD_InitTSIPins(void) | ||
308 | { | ||
309 | /* Port E Clock Gate Control: Clock enabled */ | ||
310 | CLOCK_EnableClock(kCLOCK_PortE); | ||
311 | |||
312 | gpio_pin_config_t TOUCH_A_config = { | ||
313 | .pinDirection = kGPIO_DigitalInput, | ||
314 | .outputLogic = 0U | ||
315 | }; | ||
316 | /* Initialize GPIO functionality on pin PTE29 (pin 17) */ | ||
317 | GPIO_PinInit(BOARD_TOUCH_A_GPIO, BOARD_TOUCH_A_PIN, &TOUCH_A_config); | ||
318 | |||
319 | gpio_pin_config_t TOUCH_B_config = { | ||
320 | .pinDirection = kGPIO_DigitalInput, | ||
321 | .outputLogic = 0U | ||
322 | }; | ||
323 | /* Initialize GPIO functionality on pin PTE30 (pin 18) */ | ||
324 | GPIO_PinInit(BOARD_TOUCH_B_GPIO, BOARD_TOUCH_B_PIN, &TOUCH_B_config); | ||
325 | |||
326 | /* PORTE29 (pin 17) is configured as PTE29 */ | ||
327 | PORT_SetPinMux(BOARD_TOUCH_A_PORT, BOARD_TOUCH_A_PIN, kPORT_MuxAsGpio); | ||
328 | |||
329 | PORTE->PCR[29] = ((PORTE->PCR[29] & | ||
330 | /* Mask bits to zero which are setting */ | ||
331 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
332 | |||
333 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
334 | * corresponding PE field is set. */ | ||
335 | | PORT_PCR_PS(kPORT_PullUp) | ||
336 | |||
337 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
338 | * pin. */ | ||
339 | | PORT_PCR_PE(kPORT_PullDisable) | ||
340 | |||
341 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
342 | * configured as a digital output. */ | ||
343 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
344 | |||
345 | /* PORTE30 (pin 18) is configured as PTE30 */ | ||
346 | PORT_SetPinMux(BOARD_TOUCH_B_PORT, BOARD_TOUCH_B_PIN, kPORT_MuxAsGpio); | ||
347 | |||
348 | PORTE->PCR[30] = ((PORTE->PCR[30] & | ||
349 | /* Mask bits to zero which are setting */ | ||
350 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
351 | |||
352 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
353 | * corresponding PE field is set. */ | ||
354 | | PORT_PCR_PS(kPORT_PullUp) | ||
355 | |||
356 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
357 | * pin. */ | ||
358 | | PORT_PCR_PE(kPORT_PullDisable) | ||
359 | |||
360 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
361 | * configured as a digital output. */ | ||
362 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
363 | } | ||
364 | |||
365 | /* clang-format off */ | ||
366 | /* | ||
367 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
368 | BOARD_InitUSBPins: | ||
369 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
370 | - pin_list: | ||
371 | - {pin_num: '5', peripheral: USB0, signal: DP, pin_signal: USB0_DP} | ||
372 | - {pin_num: '6', peripheral: USB0, signal: DM, pin_signal: USB0_DM} | ||
373 | - {pin_num: '27', peripheral: USB0, signal: CLKIN, pin_signal: PTA5/USB_CLKIN/TPM0_CH2, slew_rate: fast, pull_select: up, pull_enable: disable} | ||
374 | - {pin_num: '7', peripheral: USB0, signal: VDD, pin_signal: USB_VDD} | ||
375 | - {pin_num: '43', peripheral: USB0, signal: SOF_OUT, pin_signal: ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUT, slew_rate: fast, pull_select: up, pull_enable: disable} | ||
376 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
377 | */ | ||
378 | /* clang-format on */ | ||
379 | |||
380 | /* FUNCTION ************************************************************************************************************ | ||
381 | * | ||
382 | * Function Name : BOARD_InitUSBPins | ||
383 | * Description : Configures pin routing and optionally pin electrical features. | ||
384 | * | ||
385 | * END ****************************************************************************************************************/ | ||
386 | void BOARD_InitUSBPins(void) | ||
387 | { | ||
388 | /* Port A Clock Gate Control: Clock enabled */ | ||
389 | CLOCK_EnableClock(kCLOCK_PortA); | ||
390 | /* Port C Clock Gate Control: Clock enabled */ | ||
391 | CLOCK_EnableClock(kCLOCK_PortC); | ||
392 | |||
393 | /* PORTA5 (pin 27) is configured as USB_CLKIN */ | ||
394 | PORT_SetPinMux(BOARD_TPM0_CH2_PORT, BOARD_TPM0_CH2_PIN, kPORT_MuxAlt2); | ||
395 | |||
396 | PORTA->PCR[5] = ((PORTA->PCR[5] & | ||
397 | /* Mask bits to zero which are setting */ | ||
398 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
399 | |||
400 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
401 | * corresponding PE field is set. */ | ||
402 | | PORT_PCR_PS(kPORT_PullUp) | ||
403 | |||
404 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
405 | | PORT_PCR_PE(kPORT_PullDisable) | ||
406 | |||
407 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
408 | * configured as a digital output. */ | ||
409 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
410 | |||
411 | /* PORTC0 (pin 43) is configured as USB_SOF_OUT */ | ||
412 | PORT_SetPinMux(BOARD_USB_SOF_OUT_PORT, BOARD_USB_SOF_OUT_PIN, kPORT_MuxAlt4); | ||
413 | |||
414 | PORTC->PCR[0] = ((PORTC->PCR[0] & | ||
415 | /* Mask bits to zero which are setting */ | ||
416 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
417 | |||
418 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
419 | * corresponding PE field is set. */ | ||
420 | | PORT_PCR_PS(kPORT_PullUp) | ||
421 | |||
422 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
423 | | PORT_PCR_PE(kPORT_PullDisable) | ||
424 | |||
425 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
426 | * configured as a digital output. */ | ||
427 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
428 | } | ||
429 | |||
430 | /* clang-format off */ | ||
431 | /* | ||
432 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
433 | BOARD_InitACCEL_I2CPins: | ||
434 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
435 | - pin_list: | ||
436 | - {pin_num: '46', peripheral: GPIOC, signal: 'GPIO, 3', pin_signal: PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUT, direction: INPUT, drive_strength: low, pull_select: up, | ||
437 | pull_enable: disable} | ||
438 | - {pin_num: '45', peripheral: GPIOC, signal: 'GPIO, 2', pin_signal: ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1, identifier: INT2_ACCEL, direction: INPUT, slew_rate: fast, | ||
439 | pull_select: up, pull_enable: disable} | ||
440 | - {pin_num: '63', peripheral: I2C1, signal: SDA, pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/I2C1_SDA/SPI1_MISO/FXIO0_D6, identifier: ACCEL_I2C1_SDA} | ||
441 | - {pin_num: '64', peripheral: I2C1, signal: SCL, pin_signal: PTD7/SPI1_MISO/LPUART0_TX/I2C1_SCL/SPI1_MOSI/FXIO0_D7, identifier: ACCEL_I2C1_SCL} | ||
442 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
443 | */ | ||
444 | /* clang-format on */ | ||
445 | |||
446 | /* FUNCTION ************************************************************************************************************ | ||
447 | * | ||
448 | * Function Name : BOARD_InitACCEL_I2CPins | ||
449 | * Description : Configures pin routing and optionally pin electrical features. | ||
450 | * | ||
451 | * END ****************************************************************************************************************/ | ||
452 | void BOARD_InitACCEL_I2CPins(void) | ||
453 | { | ||
454 | /* Port C Clock Gate Control: Clock enabled */ | ||
455 | CLOCK_EnableClock(kCLOCK_PortC); | ||
456 | /* Port D Clock Gate Control: Clock enabled */ | ||
457 | CLOCK_EnableClock(kCLOCK_PortD); | ||
458 | |||
459 | gpio_pin_config_t INT2_ACCEL_config = { | ||
460 | .pinDirection = kGPIO_DigitalInput, | ||
461 | .outputLogic = 0U | ||
462 | }; | ||
463 | /* Initialize GPIO functionality on pin PTC2 (pin 45) */ | ||
464 | GPIO_PinInit(BOARD_INT2_ACCEL_GPIO, BOARD_INT2_ACCEL_PIN, &INT2_ACCEL_config); | ||
465 | |||
466 | gpio_pin_config_t INT1_ACCEL_config = { | ||
467 | .pinDirection = kGPIO_DigitalInput, | ||
468 | .outputLogic = 0U | ||
469 | }; | ||
470 | /* Initialize GPIO functionality on pin PTC3 (pin 46) */ | ||
471 | GPIO_PinInit(BOARD_INT1_ACCEL_GPIO, BOARD_INT1_ACCEL_PIN, &INT1_ACCEL_config); | ||
472 | |||
473 | /* PORTC2 (pin 45) is configured as PTC2 */ | ||
474 | PORT_SetPinMux(BOARD_INT2_ACCEL_PORT, BOARD_INT2_ACCEL_PIN, kPORT_MuxAsGpio); | ||
475 | |||
476 | PORTC->PCR[2] = ((PORTC->PCR[2] & | ||
477 | /* Mask bits to zero which are setting */ | ||
478 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
479 | |||
480 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
481 | * corresponding PE field is set. */ | ||
482 | | PORT_PCR_PS(kPORT_PullUp) | ||
483 | |||
484 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
485 | | PORT_PCR_PE(kPORT_PullDisable) | ||
486 | |||
487 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
488 | * configured as a digital output. */ | ||
489 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
490 | |||
491 | /* PORTC3 (pin 46) is configured as PTC3 */ | ||
492 | PORT_SetPinMux(BOARD_INT1_ACCEL_PORT, BOARD_INT1_ACCEL_PIN, kPORT_MuxAsGpio); | ||
493 | |||
494 | PORTC->PCR[3] = ((PORTC->PCR[3] & | ||
495 | /* Mask bits to zero which are setting */ | ||
496 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_ISF_MASK))) | ||
497 | |||
498 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
499 | * corresponding PE field is set. */ | ||
500 | | PORT_PCR_PS(kPORT_PullUp) | ||
501 | |||
502 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
503 | | PORT_PCR_PE(kPORT_PullDisable) | ||
504 | |||
505 | /* Drive Strength Enable: Low drive strength is configured on the corresponding pin, if pin | ||
506 | * is configured as a digital output. */ | ||
507 | | PORT_PCR_DSE(kPORT_LowDriveStrength)); | ||
508 | |||
509 | /* PORTD6 (pin 63) is configured as I2C1_SDA */ | ||
510 | PORT_SetPinMux(BOARD_ACCEL_I2C1_SDA_PORT, BOARD_ACCEL_I2C1_SDA_PIN, kPORT_MuxAlt4); | ||
511 | |||
512 | /* PORTD7 (pin 64) is configured as I2C1_SCL */ | ||
513 | PORT_SetPinMux(BOARD_ACCEL_I2C1_SCL_PORT, BOARD_ACCEL_I2C1_SCL_PIN, kPORT_MuxAlt4); | ||
514 | } | ||
515 | |||
516 | /* clang-format off */ | ||
517 | /* | ||
518 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
519 | BOARD_InitMAGNET_I2CPins: | ||
520 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
521 | - pin_list: | ||
522 | - {pin_num: '64', peripheral: I2C1, signal: SCL, pin_signal: PTD7/SPI1_MISO/LPUART0_TX/I2C1_SCL/SPI1_MOSI/FXIO0_D7, identifier: MAG_I2C1_SCL, slew_rate: fast, drive_strength: low, | ||
523 | pull_select: up, pull_enable: enable} | ||
524 | - {pin_num: '63', peripheral: I2C1, signal: SDA, pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/I2C1_SDA/SPI1_MISO/FXIO0_D6, identifier: MAG_I2C1_SDA, | ||
525 | slew_rate: fast, drive_strength: low, pull_select: up, pull_enable: enable} | ||
526 | - {pin_num: '45', peripheral: GPIOC, signal: 'GPIO, 2', pin_signal: ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1, identifier: INT1_MAG, direction: INPUT, slew_rate: fast, pull_select: up, | ||
527 | pull_enable: disable} | ||
528 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
529 | */ | ||
530 | /* clang-format on */ | ||
531 | |||
532 | /* FUNCTION ************************************************************************************************************ | ||
533 | * | ||
534 | * Function Name : BOARD_InitMAGNET_I2CPins | ||
535 | * Description : Configures pin routing and optionally pin electrical features. | ||
536 | * | ||
537 | * END ****************************************************************************************************************/ | ||
538 | void BOARD_InitMAGNET_I2CPins(void) | ||
539 | { | ||
540 | /* Port C Clock Gate Control: Clock enabled */ | ||
541 | CLOCK_EnableClock(kCLOCK_PortC); | ||
542 | /* Port D Clock Gate Control: Clock enabled */ | ||
543 | CLOCK_EnableClock(kCLOCK_PortD); | ||
544 | |||
545 | gpio_pin_config_t INT1_MAG_config = { | ||
546 | .pinDirection = kGPIO_DigitalInput, | ||
547 | .outputLogic = 0U | ||
548 | }; | ||
549 | /* Initialize GPIO functionality on pin PTC2 (pin 45) */ | ||
550 | GPIO_PinInit(BOARD_INT1_MAG_GPIO, BOARD_INT1_MAG_PIN, &INT1_MAG_config); | ||
551 | |||
552 | /* PORTC2 (pin 45) is configured as PTC2 */ | ||
553 | PORT_SetPinMux(BOARD_INT1_MAG_PORT, BOARD_INT1_MAG_PIN, kPORT_MuxAsGpio); | ||
554 | |||
555 | PORTC->PCR[2] = ((PORTC->PCR[2] & | ||
556 | /* Mask bits to zero which are setting */ | ||
557 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
558 | |||
559 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
560 | * corresponding PE field is set. */ | ||
561 | | PORT_PCR_PS(kPORT_PullUp) | ||
562 | |||
563 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
564 | | PORT_PCR_PE(kPORT_PullDisable) | ||
565 | |||
566 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
567 | * configured as a digital output. */ | ||
568 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
569 | |||
570 | const port_pin_config_t MAG_I2C1_SDA = {/* Internal pull-up resistor is enabled */ | ||
571 | kPORT_PullUp, | ||
572 | /* Fast slew rate is configured */ | ||
573 | kPORT_FastSlewRate, | ||
574 | /* Passive filter is disabled */ | ||
575 | kPORT_PassiveFilterDisable, | ||
576 | /* Low drive strength is configured */ | ||
577 | kPORT_LowDriveStrength, | ||
578 | /* Pin is configured as I2C1_SDA */ | ||
579 | kPORT_MuxAlt4}; | ||
580 | /* PORTD6 (pin 63) is configured as I2C1_SDA */ | ||
581 | PORT_SetPinConfig(BOARD_MAG_I2C1_SDA_PORT, BOARD_MAG_I2C1_SDA_PIN, &MAG_I2C1_SDA); | ||
582 | |||
583 | const port_pin_config_t MAG_I2C1_SCL = {/* Internal pull-up resistor is enabled */ | ||
584 | kPORT_PullUp, | ||
585 | /* Fast slew rate is configured */ | ||
586 | kPORT_FastSlewRate, | ||
587 | /* Passive filter is disabled */ | ||
588 | kPORT_PassiveFilterDisable, | ||
589 | /* Low drive strength is configured */ | ||
590 | kPORT_LowDriveStrength, | ||
591 | /* Pin is configured as I2C1_SCL */ | ||
592 | kPORT_MuxAlt4}; | ||
593 | /* PORTD7 (pin 64) is configured as I2C1_SCL */ | ||
594 | PORT_SetPinConfig(BOARD_MAG_I2C1_SCL_PORT, BOARD_MAG_I2C1_SCL_PIN, &MAG_I2C1_SCL); | ||
595 | } | ||
596 | |||
597 | /* clang-format off */ | ||
598 | /* | ||
599 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
600 | BOARD_InitDEBUG_UARTPins: | ||
601 | - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
602 | - pin_list: | ||
603 | - {pin_num: '23', peripheral: LPUART0, signal: RX, pin_signal: PTA1/LPUART0_RX/TPM2_CH0, slew_rate: fast, pull_select: down, pull_enable: disable} | ||
604 | - {pin_num: '24', peripheral: LPUART0, signal: TX, pin_signal: PTA2/LPUART0_TX/TPM2_CH1, direction: OUTPUT, slew_rate: fast, pull_select: down, pull_enable: disable} | ||
605 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
606 | */ | ||
607 | /* clang-format on */ | ||
608 | |||
609 | /* FUNCTION ************************************************************************************************************ | ||
610 | * | ||
611 | * Function Name : BOARD_InitDEBUG_UARTPins | ||
612 | * Description : Configures pin routing and optionally pin electrical features. | ||
613 | * | ||
614 | * END ****************************************************************************************************************/ | ||
615 | void BOARD_InitDEBUG_UARTPins(void) | ||
616 | { | ||
617 | /* Port A Clock Gate Control: Clock enabled */ | ||
618 | CLOCK_EnableClock(kCLOCK_PortA); | ||
619 | |||
620 | const port_pin_config_t DEBUG_UART0_RX = {/* Internal pull-up/down resistor is disabled */ | ||
621 | kPORT_PullDisable, | ||
622 | /* Fast slew rate is configured */ | ||
623 | kPORT_FastSlewRate, | ||
624 | /* Passive filter is disabled */ | ||
625 | kPORT_PassiveFilterDisable, | ||
626 | /* Low drive strength is configured */ | ||
627 | kPORT_LowDriveStrength, | ||
628 | /* Pin is configured as LPUART0_RX */ | ||
629 | kPORT_MuxAlt2}; | ||
630 | /* PORTA1 (pin 23) is configured as LPUART0_RX */ | ||
631 | PORT_SetPinConfig(BOARD_DEBUG_UART0_RX_PORT, BOARD_DEBUG_UART0_RX_PIN, &DEBUG_UART0_RX); | ||
632 | |||
633 | const port_pin_config_t DEBUG_UART0_TX = {/* Internal pull-up/down resistor is disabled */ | ||
634 | kPORT_PullDisable, | ||
635 | /* Fast slew rate is configured */ | ||
636 | kPORT_FastSlewRate, | ||
637 | /* Passive filter is disabled */ | ||
638 | kPORT_PassiveFilterDisable, | ||
639 | /* Low drive strength is configured */ | ||
640 | kPORT_LowDriveStrength, | ||
641 | /* Pin is configured as LPUART0_TX */ | ||
642 | kPORT_MuxAlt2}; | ||
643 | /* PORTA2 (pin 24) is configured as LPUART0_TX */ | ||
644 | PORT_SetPinConfig(BOARD_DEBUG_UART0_TX_PORT, BOARD_DEBUG_UART0_TX_PIN, &DEBUG_UART0_TX); | ||
645 | |||
646 | SIM->SOPT5 = ((SIM->SOPT5 & | ||
647 | /* Mask bits to zero which are setting */ | ||
648 | (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) | ||
649 | |||
650 | /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ | ||
651 | | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) | ||
652 | |||
653 | /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ | ||
654 | | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); | ||
655 | } | ||
656 | |||
657 | /* clang-format off */ | ||
658 | /* | ||
659 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
660 | BOARD_InitTHERPins: | ||
661 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
662 | - pin_list: | ||
663 | - {pin_num: '11', peripheral: GPIOE, signal: 'GPIO, 22', pin_signal: ADC0_DP3/ADC0_SE3/PTE22/TPM2_CH0/UART2_TX/FXIO0_D6, direction: INPUT, slew_rate: slow, pull_select: up, | ||
664 | pull_enable: disable} | ||
665 | - {pin_num: '12', peripheral: GPIOE, signal: 'GPIO, 23', pin_signal: ADC0_DM3/ADC0_SE7a/PTE23/TPM2_CH1/UART2_RX/FXIO0_D7, direction: INPUT, slew_rate: slow, pull_select: up, | ||
666 | pull_enable: disable} | ||
667 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
668 | */ | ||
669 | /* clang-format on */ | ||
670 | |||
671 | /* FUNCTION ************************************************************************************************************ | ||
672 | * | ||
673 | * Function Name : BOARD_InitTHERPins | ||
674 | * Description : Configures pin routing and optionally pin electrical features. | ||
675 | * | ||
676 | * END ****************************************************************************************************************/ | ||
677 | void BOARD_InitTHERPins(void) | ||
678 | { | ||
679 | /* Port E Clock Gate Control: Clock enabled */ | ||
680 | CLOCK_EnableClock(kCLOCK_PortE); | ||
681 | |||
682 | gpio_pin_config_t THER_A_config = { | ||
683 | .pinDirection = kGPIO_DigitalInput, | ||
684 | .outputLogic = 0U | ||
685 | }; | ||
686 | /* Initialize GPIO functionality on pin PTE22 (pin 11) */ | ||
687 | GPIO_PinInit(BOARD_THER_A_GPIO, BOARD_THER_A_PIN, &THER_A_config); | ||
688 | |||
689 | gpio_pin_config_t THER_B_config = { | ||
690 | .pinDirection = kGPIO_DigitalInput, | ||
691 | .outputLogic = 0U | ||
692 | }; | ||
693 | /* Initialize GPIO functionality on pin PTE23 (pin 12) */ | ||
694 | GPIO_PinInit(BOARD_THER_B_GPIO, BOARD_THER_B_PIN, &THER_B_config); | ||
695 | |||
696 | /* PORTE22 (pin 11) is configured as PTE22 */ | ||
697 | PORT_SetPinMux(BOARD_THER_A_PORT, BOARD_THER_A_PIN, kPORT_MuxAsGpio); | ||
698 | |||
699 | PORTE->PCR[22] = ((PORTE->PCR[22] & | ||
700 | /* Mask bits to zero which are setting */ | ||
701 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
702 | |||
703 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
704 | * corresponding PE field is set. */ | ||
705 | | PORT_PCR_PS(kPORT_PullUp) | ||
706 | |||
707 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
708 | * pin. */ | ||
709 | | PORT_PCR_PE(kPORT_PullDisable) | ||
710 | |||
711 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
712 | * configured as a digital output. */ | ||
713 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
714 | |||
715 | /* PORTE23 (pin 12) is configured as PTE23 */ | ||
716 | PORT_SetPinMux(BOARD_THER_B_PORT, BOARD_THER_B_PIN, kPORT_MuxAsGpio); | ||
717 | |||
718 | PORTE->PCR[23] = ((PORTE->PCR[23] & | ||
719 | /* Mask bits to zero which are setting */ | ||
720 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
721 | |||
722 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
723 | * corresponding PE field is set. */ | ||
724 | | PORT_PCR_PS(kPORT_PullUp) | ||
725 | |||
726 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
727 | * pin. */ | ||
728 | | PORT_PCR_PE(kPORT_PullDisable) | ||
729 | |||
730 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
731 | * configured as a digital output. */ | ||
732 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
733 | } | ||
734 | |||
735 | /* clang-format off */ | ||
736 | /* | ||
737 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
738 | BOARD_InitOSCPins: | ||
739 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
740 | - pin_list: | ||
741 | - {pin_num: '32', peripheral: OSC0, signal: EXTAL0, pin_signal: EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0, slew_rate: no_init, pull_select: no_init, pull_enable: no_init} | ||
742 | - {pin_num: '33', peripheral: OSC0, signal: XTAL0, pin_signal: XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1, slew_rate: no_init, pull_select: no_init, pull_enable: no_init} | ||
743 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
744 | */ | ||
745 | /* clang-format on */ | ||
746 | |||
747 | /* FUNCTION ************************************************************************************************************ | ||
748 | * | ||
749 | * Function Name : BOARD_InitOSCPins | ||
750 | * Description : Configures pin routing and optionally pin electrical features. | ||
751 | * | ||
752 | * END ****************************************************************************************************************/ | ||
753 | void BOARD_InitOSCPins(void) | ||
754 | { | ||
755 | /* Port A Clock Gate Control: Clock enabled */ | ||
756 | CLOCK_EnableClock(kCLOCK_PortA); | ||
757 | |||
758 | /* PORTA18 (pin 32) is configured as EXTAL0 */ | ||
759 | PORT_SetPinMux(BOARD_EXTAL0_PORT, BOARD_EXTAL0_PIN, kPORT_PinDisabledOrAnalog); | ||
760 | |||
761 | /* PORTA19 (pin 33) is configured as XTAL0 */ | ||
762 | PORT_SetPinMux(BOARD_XTAL0_PORT, BOARD_XTAL0_PIN, kPORT_PinDisabledOrAnalog); | ||
763 | } | ||
764 | /*********************************************************************************************************************** | ||
765 | * EOF | ||
766 | **********************************************************************************************************************/ | ||