1 files changed, 628 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.c b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.c
new file mode 100644
index 000000000..79d25f151
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.c
@@ -0,0 +1,628 @@
+/*
+ * Copyright 2018 NXP.
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v4.1
+processor: MKV11Z128xxx7
+package_id: MKV11Z128VLH7
+mcu_data: ksdk2_0
+processor_version: 4.0.0
+board: FRDM-KV11Z
+pin_labels:
+- {pin_num: '1', pin_signal: ADC1_SE12/PTE0/UART1_TX, label: TP18}
+- {pin_num: '2', pin_signal: ADC1_SE13/PTE1/LLWU_P0/UART1_RX, label: TP19}
+- {pin_num: '11', pin_signal: ADC0_SE12/PTE22, label: TP22}
+- {pin_num: '12', pin_signal: ADC0_SE13/PTE23, label: TP23}
+- {pin_num: '19', pin_signal: ADC0_SE14/CMP0_IN4/PTE31, label: TP24}
+- {pin_num: '27', pin_signal: PTA5/FTM0_CH2/FTM5_FLT0, label: TP25}
+- {pin_num: '28', pin_signal: PTA12/CAN0_TX/FTM1_CH0/FTM1_QD_PHA, label: TP26}
+- {pin_num: '42', pin_signal: PTB19/CAN0_RX/FTM3_CH3, label: TP20}
+- {pin_num: '41', pin_signal: PTB18/CAN0_TX/FTM3_CH2, label: TP21}
+- {pin_num: '55', pin_signal: ADC1_SE16/PTC10/FTM5_CH0/FTM5_QD_PHA, label: TP17}
+- {pin_num: '56', pin_signal: ADC1_SE17/PTC11/LLWU_P11/FTM5_CH1/FTM5_QD_PHB, label: TP16}
+- {pin_num: '13', pin_signal: VDDA, label: VDDA}
+- {pin_num: '14', pin_signal: VREFH, label: 'J2[16]/AREF/VREFH'}
+- {pin_num: '15', pin_signal: VREFL, label: VREFL}
+- {pin_num: '16', pin_signal: VSSA, label: VSSA}
+- {pin_num: '32', pin_signal: EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0/FTM3_CH2, label: 'Y2[1]', identifier: EXTAL}
+- {pin_num: '33', pin_signal: XTAL0/PTA19/FTM0_FLT0/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1, label: 'Y2[2]', identifier: XTAL}
+- {pin_num: '3', pin_signal: VDD3, label: 'J3[4]/J3[8]/J13[1]/P3V3/P3V3_KV11/VDD'}
+- {pin_num: '30', pin_signal: VDD30, label: 'J3[4]/J3[8]/J13[1]/P3V3/P3V3_KV11/VDD'}
+- {pin_num: '48', pin_signal: VDD48, label: 'J3[4]/J3[8]/J13[1]/P3V3/P3V3_KV11/VDD'}
+- {pin_num: '4', pin_signal: VSS4, label: 'J2[14]/J3[12]/J3[14]/J13[3]/J13[5]/GND/VSS'}
+- {pin_num: '31', pin_signal: VSS31, label: 'J2[14]/J3[12]/J3[14]/J13[3]/J13[5]/GND/VSS'}
+- {pin_num: '47', pin_signal: VSS47, label: 'J2[14]/J3[12]/J3[14]/J13[3]/J13[5]/GND/VSS'}
+- {pin_num: '5', pin_signal: ADC0_SE1/ADC0_DP1/ADC1_SE0/PTE16/SPI0_PCS0/UART1_TX/FTM_CLKIN0/FTM0_FLT3, label: 'J4[4]/PTE16'}
+- {pin_num: '6', pin_signal: ADC0_DM1/ADC0_SE5/ADC1_SE5/PTE17/LLWU_P19/SPI0_SCK/UART1_RX/FTM_CLKIN1/LPTMR0_ALT3, label: 'J2[7]/PTE17-ADC0_SE5'}
+- {pin_num: '7', pin_signal: ADC0_SE6/ADC1_SE1/ADC1_DP1/PTE18/LLWU_P20/SPI0_SOUT/UART1_CTS_b/I2C0_SDA/SPI0_SIN, label: 'J2[1]/PTE18-ADC0_SE6'}
+- {pin_num: '8', pin_signal: ADC0_SE7/ADC1_SE7/ADC1_DM1/PTE19/SPI0_SIN/UART1_RTS_b/I2C0_SCL/SPI0_SOUT, label: 'J2[5]/PTE19-ADC0_SE7'}
+- {pin_num: '9', pin_signal: ADC0_SE0/ADC0_DP0/PTE20/FTM1_CH0/UART0_TX, label: 'J4[6]/ADC0_DP0/THER_A', identifier: ADC0_DP_THER}
+- {pin_num: '10', pin_signal: ADC0_SE4/ADC0_DM0/PTE21/FTM1_CH1/UART0_RX, label: 'J4[8]/ADC0_DM0/THER_B', identifier: ADC0_DM_THER}
+- {pin_num: '17', pin_signal: CMP1_IN5/CMP0_IN5/PTE29/FTM0_CH2/FTM_CLKIN0, label: 'J1[13]/J1[14]/LD1[4]/PTE29', identifier: LED_GREEN}
+- {pin_num: '18', pin_signal: ADC1_SE4/CMP1_IN4/DAC0_OUT/PTE30/FTM0_CH3/FTM_CLKIN1, label: 'J2[9]/PTE30- ADC1_ SE4'}
+- {pin_num: '20', pin_signal: PTE24/CAN0_TX/FTM0_CH0/I2C0_SCL/EWM_OUT_b, label: 'J1[1]/J1[8]/U9[1]/PTE24', identifier: CAN_TX}
+- {pin_num: '21', pin_signal: PTE25/LLWU_P21/CAN0_RX/FTM0_CH1/I2C0_SDA/EWM_IN, label: 'J1[5]/J1[12]/LD1[3]/U9[4]/PTE25', identifier: LED_BLUE;CAN_RX}
+- {pin_num: '22', pin_signal: PTA0/UART0_CTS_b/FTM0_CH5/EWM_IN/SWD_CLK, label: 'J13[4]/U8[4]/SWD_ CLK_ KV11'}
+- {pin_num: '23', pin_signal: PTA1/UART0_RX/FTM2_CH0/CMP0_OUT/FTM2_QD_PHA/FTM1_CH1/FTM4_CH0, label: 'J3[3]/PTA1- FRDM- MC- ENC_ A'}
+- {pin_num: '24', pin_signal: PTA2/UART0_TX/FTM2_CH1/CMP1_OUT/FTM2_QD_PHB/FTM1_CH0/FTM4_CH1, label: 'J3[1]/PTA2- FRDM- MC- ENC_ B'}
+- {pin_num: '25', pin_signal: PTA3/UART0_RTS_b/FTM0_CH0/FTM2_FLT0/EWM_OUT_b/SWD_DIO, label: 'J13[2]/U7[4]/SWD_ DIO_ TGTMCU'}
+- {pin_num: '26', pin_signal: PTA4/LLWU_P3/FTM0_CH1/FTM4_FLT0/FTM0_FLT3/NMI_b, label: 'J2[4]/PTA4', identifier: SW3}
+- {pin_num: '29', pin_signal: PTA13/LLWU_P4/CAN0_RX/FTM1_CH1/FTM1_QD_PHB, label: 'U9[8]/PTA13', identifier: CAN_S}
+- {pin_num: '34', pin_signal: PTA20/RESET_b, label: 'J3[6]/J10[3]/J13[10]/RST_TGTMCU_B'}
+- {pin_num: '35', pin_signal: ADC0_SE8/ADC1_SE8/PTB0/LLWU_P5/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/UART0_RX, label: 'J1[10]/J1[11]/PTB0', identifier: SW2}
+- {pin_num: '36', pin_signal: ADC0_SE9/ADC1_SE9/PTB1/I2C0_SDA/FTM1_CH1/FTM0_FLT2/EWM_IN/FTM1_QD_PHB/UART0_TX, label: 'J2[3]/PTB1-ADC0_SE9'}
+- {pin_num: '37', pin_signal: ADC0_SE10/ADC1_SE10/ADC1_DM2/PTB2/I2C0_SCL/UART0_RTS_b/FTM0_FLT1/FTM0_FLT3, label: 'J2[15]/J2[20]/J4[12]/U10[9]/PTB2', identifier: ACCEL_INT2}
+- {pin_num: '38', pin_signal: ADC1_SE2/ADC1_DP2/PTB3/I2C0_SDA/UART0_CTS_b/FTM0_FLT0, label: 'J2[11]/J2[18]/J4[10]/U10[11]/PTB3', identifier: ACCEL_INT1}
+- {pin_num: '39', pin_signal: PTB16/UART0_RX/FTM_CLKIN2/CAN0_TX/EWM_IN, label: 'J1[6]/U3[4]/UART0_RX_TGTMCU', identifier: DEBUG_UART_RX}
+- {pin_num: '40', pin_signal: PTB17/UART0_TX/FTM_CLKIN1/CAN0_RX/EWM_OUT_b, label: 'U5[1]/UART0_TX_TGTMCU', identifier: DEBUG_UART_TX}
+- {pin_num: '43', pin_signal: ADC1_SE11/PTC0/SPI0_PCS4/PDB_EXTRG0/CMP0_OUT/FTM0_FLT0/SPI0_PCS0, label: 'J4[2]/PTC0'}
+- {pin_num: '44', pin_signal: ADC1_SE3/PTC1/LLWU_P6/SPI0_PCS3/UART1_RTS_b/FTM0_CH0/FTM2_CH0, label: 'J3[15]/PTC1-FRDM-MC-PWM_AT'}
+- {pin_num: '45', pin_signal: ADC0_SE11/CMP1_IN0/PTC2/SPI0_PCS2/UART1_CTS_b/FTM0_CH1/FTM2_CH1, label: 'J3[13]/PTC2-FRDM-MC-PWM_AB'}
+- {pin_num: '46', pin_signal: CMP1_IN1/PTC3/LLWU_P7/SPI0_PCS1/UART1_RX/FTM0_CH2/CLKOUT/FTM3_FLT0, label: 'J3[11]/PTC3-FRDM-MC-PWM_BT'}
+- {pin_num: '49', pin_signal: PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT, label: 'J3[9]/PTC4- FRDM- MC- PWM_ BB'}
+- {pin_num: '50', pin_signal: PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT/FTM0_CH2, label: 'J2[12]/J2[17]/PTC5'}
+- {pin_num: '51', pin_signal: CMP0_IN0/PTC6/LLWU_P10/SPI0_SOUT/PDB_EXTRG1/UART0_RX/I2C0_SCL, label: 'J2[8]/J2[13]/U10[4]/I2C0_SCL/SPI0_SOUT/PTC6', identifier: ACCEL_SCL}
+- {pin_num: '52', pin_signal: CMP0_IN1/PTC7/SPI0_SIN/UART0_TX/I2C0_SDA, label: 'J1[15]/J1[16]/U10[6]/I2C0_SDA/PTC7', identifier: ACCEL_SDA}
+- {pin_num: '53', pin_signal: ADC1_SE14/CMP0_IN2/PTC8/FTM3_CH4, label: 'J4[9]/PTC8'}
+- {pin_num: '54', pin_signal: ADC1_SE15/CMP0_IN3/PTC9/FTM3_CH5, label: 'J4[11]/PTC9'}
+- {pin_num: '57', pin_signal: PTD0/LLWU_P12/SPI0_PCS0/UART0_CTS_b/FTM0_CH0/UART1_RX/FTM3_CH0, label: 'J1[2]/J1[7]/J4[1]/PTD0'}
+- {pin_num: '58', pin_signal: ADC0_SE2/PTD1/SPI0_SCK/UART0_RTS_b/FTM0_CH1/UART1_TX/FTM3_CH1, label: 'J1[4]/J1[9]/J4[3]/U10[16]/PTD1', identifier: ACCEL_RST}
+- {pin_num: '59', pin_signal: PTD2/LLWU_P13/SPI0_SOUT/UART0_RX/FTM0_CH2/FTM3_CH2/I2C0_SCL, label: 'J2[2]/J4[5]/PTD2'}
+- {pin_num: '60', pin_signal: PTD3/SPI0_SIN/UART0_TX/FTM0_CH3/FTM3_CH3/I2C0_SDA, label: 'J2[10]/J2[19]/J4[7]/SPI0_SIN/PTD3'}
+- {pin_num: '61', pin_signal: PTD4/LLWU_P14/SPI0_PCS1/UART0_RTS_b/FTM0_CH4/FTM2_CH0/EWM_IN/SPI0_PCS0, label: 'J3[7]/PTD4- FRDM- MC- PWM_ CT'}
+- {pin_num: '62', pin_signal: ADC0_SE3/PTD5/SPI0_PCS2/UART0_CTS_b/FTM0_CH5/FTM2_CH1/EWM_OUT_b/SPI0_SCK, label: 'J3[5]/PTD5- FRDM- MC- PWM_ CB'}
+- {pin_num: '63', pin_signal: ADC1_SE6/PTD6/LLWU_P15/FTM4_CH0/UART0_RX/FTM0_CH0/FTM1_CH0/FTM0_FLT0/SPI0_SOUT, label: 'J2[6]/LD1[1]/PTD6', identifier: LED_RED}
+- {pin_num: '64', pin_signal: PTD7/FTM4_CH1/UART0_TX/FTM0_CH1/FTM1_CH1/FTM0_FLT1/SPI0_SIN, label: 'J1[3]/PTD7- FRDM- MC- ENC_ I'}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+#include "fsl_common.h"
+#include "fsl_port.h"
+#include "fsl_gpio.h"
+#include "pin_mux.h"
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitPins();
+    BOARD_InitDEBUG_UARTPins();
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitPins(void)
+{
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitButtonsPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '35', peripheral: GPIOB, signal: 'GPIO, 0', pin_signal: ADC0_SE8/ADC1_SE8/PTB0/LLWU_P5/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/UART0_RX, direction: INPUT, slew_rate: slow,
+    drive_strength: low, pull_select: up, pull_enable: enable}
+  - {pin_num: '26', peripheral: GPIOA, signal: 'GPIO, 4', pin_signal: PTA4/LLWU_P3/FTM0_CH1/FTM4_FLT0/FTM0_FLT3/NMI_b, direction: INPUT, slew_rate: slow, pull_select: up,
+    pull_enable: enable, passive_filter: enable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitButtonsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitButtonsPins(void)
+{
+    /* Port A Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortA);
+    /* Port B Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortB);
+    gpio_pin_config_t SW3_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTA4 (pin 26)  */
+    GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config);
+    gpio_pin_config_t SW2_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTB0 (pin 35)  */
+    GPIO_PinInit(BOARD_SW2_GPIO, BOARD_SW2_PIN, &SW2_config);
+    const port_pin_config_t SW3 = {/* Internal pull-up resistor is enabled */
+                                   kPORT_PullUp,
+                                   /* Slow slew rate is configured */
+                                   kPORT_SlowSlewRate,
+                                   /* Passive filter is enabled */
+                                   kPORT_PassiveFilterEnable,
+                                   /* Low drive strength is configured */
+                                   kPORT_LowDriveStrength,
+                                   /* Pin is configured as PTA4 */
+                                   kPORT_MuxAsGpio};
+    /* PORTA4 (pin 26) is configured as PTA4 */
+    PORT_SetPinConfig(BOARD_SW3_PORT, BOARD_SW3_PIN, &SW3);
+    const port_pin_config_t SW2 = {/* Internal pull-up resistor is enabled */
+                                   kPORT_PullUp,
+                                   /* Slow slew rate is configured */
+                                   kPORT_SlowSlewRate,
+                                   /* Passive filter is disabled */
+                                   kPORT_PassiveFilterDisable,
+                                   /* Low drive strength is configured */
+                                   kPORT_LowDriveStrength,
+                                   /* Pin is configured as PTB0 */
+                                   kPORT_MuxAsGpio};
+    /* PORTB0 (pin 35) is configured as PTB0 */
+    PORT_SetPinConfig(BOARD_SW2_PORT, BOARD_SW2_PIN, &SW2);
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '63', peripheral: GPIOD, signal: 'GPIO, 6', pin_signal: ADC1_SE6/PTD6/LLWU_P15/FTM4_CH0/UART0_RX/FTM0_CH0/FTM1_CH0/FTM0_FLT0/SPI0_SOUT, direction: OUTPUT,
+    gpio_init_state: 'true', slew_rate: slow, drive_strength: low, pull_select: down, pull_enable: disable}
+  - {pin_num: '17', peripheral: GPIOE, signal: 'GPIO, 29', pin_signal: CMP1_IN5/CMP0_IN5/PTE29/FTM0_CH2/FTM_CLKIN0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow,
+    pull_select: down, pull_enable: disable}
+  - {pin_num: '21', peripheral: GPIOE, signal: 'GPIO, 25', pin_signal: PTE25/LLWU_P21/CAN0_RX/FTM0_CH1/I2C0_SDA/EWM_IN, identifier: LED_BLUE, direction: OUTPUT, gpio_init_state: 'true',
+    slew_rate: slow, pull_select: down, pull_enable: disable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitLEDsPins(void)
+{
+    /* Port D Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortD);
+    /* Port E Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortE);
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PTD6 (pin 63)  */
+    GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_PIN, &LED_RED_config);
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PTE25 (pin 21)  */
+    GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_PIN, &LED_BLUE_config);
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PTE29 (pin 17)  */
+    GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_PIN, &LED_GREEN_config);
+    const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */
+                                       kPORT_PullDisable,
+                                       /* Slow slew rate is configured */
+                                       kPORT_SlowSlewRate,
+                                       /* Passive filter is disabled */
+                                       kPORT_PassiveFilterDisable,
+                                       /* Low drive strength is configured */
+                                       kPORT_LowDriveStrength,
+                                       /* Pin is configured as PTD6 */
+                                       kPORT_MuxAsGpio};
+    /* PORTD6 (pin 63) is configured as PTD6 */
+    PORT_SetPinConfig(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, &LED_RED);
+    const port_pin_config_t LED_BLUE = {/* Internal pull-up/down resistor is disabled */
+                                        kPORT_PullDisable,
+                                        /* Slow slew rate is configured */
+                                        kPORT_SlowSlewRate,
+                                        /* Passive filter is disabled */
+                                        kPORT_PassiveFilterDisable,
+                                        /* Low drive strength is configured */
+                                        kPORT_LowDriveStrength,
+                                        /* Pin is configured as PTE25 */
+                                        kPORT_MuxAsGpio};
+    /* PORTE25 (pin 21) is configured as PTE25 */
+    PORT_SetPinConfig(BOARD_LED_BLUE_PORT, BOARD_LED_BLUE_PIN, &LED_BLUE);
+    const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */
+                                         kPORT_PullDisable,
+                                         /* Slow slew rate is configured */
+                                         kPORT_SlowSlewRate,
+                                         /* Passive filter is disabled */
+                                         kPORT_PassiveFilterDisable,
+                                         /* Low drive strength is configured */
+                                         kPORT_LowDriveStrength,
+                                         /* Pin is configured as PTE29 */
+                                         kPORT_MuxAsGpio};
+    /* PORTE29 (pin 17) is configured as PTE29 */
+    PORT_SetPinConfig(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, &LED_GREEN);
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '40', peripheral: UART0, signal: TX, pin_signal: PTB17/UART0_TX/FTM_CLKIN1/CAN0_RX/EWM_OUT_b, direction: OUTPUT, slew_rate: fast, open_drain: disable,
+    pull_select: down, pull_enable: disable}
+  - {pin_num: '39', peripheral: UART0, signal: RX, pin_signal: PTB16/UART0_RX/FTM_CLKIN2/CAN0_TX/EWM_IN, slew_rate: fast, pull_select: down, pull_enable: disable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Port B Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortB);
+    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
+                                             kPORT_PullDisable,
+                                             /* Fast slew rate is configured */
+                                             kPORT_FastSlewRate,
+                                             /* Passive filter is disabled */
+                                             kPORT_PassiveFilterDisable,
+                                             /* Low drive strength is configured */
+                                             kPORT_LowDriveStrength,
+                                             /* Pin is configured as UART0_RX */
+                                             kPORT_MuxAlt3};
+    /* PORTB16 (pin 39) is configured as UART0_RX */
+    PORT_SetPinConfig(BOARD_DEBUG_UART_RX_PORT, BOARD_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
+    const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up/down resistor is disabled */
+                                             kPORT_PullDisable,
+                                             /* Fast slew rate is configured */
+                                             kPORT_FastSlewRate,
+                                             /* Passive filter is disabled */
+                                             kPORT_PassiveFilterDisable,
+                                             /* Low drive strength is configured */
+                                             kPORT_LowDriveStrength,
+                                             /* Pin is configured as UART0_TX */
+                                             kPORT_MuxAlt3};
+    /* PORTB17 (pin 40) is configured as UART0_TX */
+    PORT_SetPinConfig(BOARD_DEBUG_UART_TX_PORT, BOARD_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
+    SIM->SOPT5 = ((SIM->SOPT5 &
+                   /* Mask bits to zero which are setting */
+                   (~(SIM_SOPT5_UART0TXSRC_MASK | SIM_SOPT5_UART0RXSRC_MASK | SIM_SOPT5_UART0ODE_MASK)))
+                  /* UART 0 Transmit Data Source Select: UART0_TX pin. */
+                  | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX)
+                  /* UART 0 Receive Data Source Select: UART0_RX pin. */
+                  | SIM_SOPT5_UART0RXSRC(SOPT5_UART0RXSRC_UART_RX)
+                  /* UART0 Open Drain Enable: Open drain is disabled on UART0. */
+                  | SIM_SOPT5_UART0ODE(SOPT5_UART0ODE_DISABLED));
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitOSCPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '32', peripheral: OSC0, signal: EXTAL0, pin_signal: EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0/FTM3_CH2, slew_rate: no_init, pull_select: no_init, pull_enable: no_init}
+  - {pin_num: '33', peripheral: OSC0, signal: XTAL0, pin_signal: XTAL0/PTA19/FTM0_FLT0/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1, slew_rate: no_init, pull_select: no_init,
+    pull_enable: no_init}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitOSCPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitOSCPins(void)
+{
+    /* Port A Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortA);
+    /* PORTA18 (pin 32) is configured as EXTAL0 */
+    PORT_SetPinMux(BOARD_EXTAL_PORT, BOARD_EXTAL_PIN, kPORT_PinDisabledOrAnalog);
+    /* PORTA19 (pin 33) is configured as XTAL0 */
+    PORT_SetPinMux(BOARD_XTAL_PORT, BOARD_XTAL_PIN, kPORT_PinDisabledOrAnalog);
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitACCELPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '51', peripheral: I2C0, signal: SCL, pin_signal: CMP0_IN0/PTC6/LLWU_P10/SPI0_SOUT/PDB_EXTRG1/UART0_RX/I2C0_SCL, pull_select: down, pull_enable: disable}
+  - {pin_num: '52', peripheral: I2C0, signal: SDA, pin_signal: CMP0_IN1/PTC7/SPI0_SIN/UART0_TX/I2C0_SDA, pull_select: down, pull_enable: disable}
+  - {pin_num: '58', peripheral: GPIOD, signal: 'GPIO, 1', pin_signal: ADC0_SE2/PTD1/SPI0_SCK/UART0_RTS_b/FTM0_CH1/UART1_TX/FTM3_CH1, direction: OUTPUT, gpio_init_state: 'false',
+    slew_rate: slow, pull_select: down, pull_enable: disable}
+  - {pin_num: '38', peripheral: GPIOB, signal: 'GPIO, 3', pin_signal: ADC1_SE2/ADC1_DP2/PTB3/I2C0_SDA/UART0_CTS_b/FTM0_FLT0, direction: INPUT, slew_rate: fast, pull_select: up,
+    pull_enable: enable}
+  - {pin_num: '37', peripheral: GPIOB, signal: 'GPIO, 2', pin_signal: ADC0_SE10/ADC1_SE10/ADC1_DM2/PTB2/I2C0_SCL/UART0_RTS_b/FTM0_FLT1/FTM0_FLT3, direction: INPUT,
+    slew_rate: fast, pull_select: up, pull_enable: enable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitACCELPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitACCELPins(void)
+{
+    /* Port B Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortB);
+    /* Port C Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortC);
+    /* Port D Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortD);
+    gpio_pin_config_t ACCEL_INT2_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTB2 (pin 37)  */
+    GPIO_PinInit(BOARD_ACCEL_INT2_GPIO, BOARD_ACCEL_INT2_PIN, &ACCEL_INT2_config);
+    gpio_pin_config_t ACCEL_INT1_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTB3 (pin 38)  */
+    GPIO_PinInit(BOARD_ACCEL_INT1_GPIO, BOARD_ACCEL_INT1_PIN, &ACCEL_INT1_config);
+    gpio_pin_config_t ACCEL_RST_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTD1 (pin 58)  */
+    GPIO_PinInit(BOARD_ACCEL_RST_GPIO, BOARD_ACCEL_RST_PIN, &ACCEL_RST_config);
+    const port_pin_config_t ACCEL_INT2 = {/* Internal pull-up resistor is enabled */
+                                          kPORT_PullUp,
+                                          /* Fast slew rate is configured */
+                                          kPORT_FastSlewRate,
+                                          /* Passive filter is disabled */
+                                          kPORT_PassiveFilterDisable,
+                                          /* Low drive strength is configured */
+                                          kPORT_LowDriveStrength,
+                                          /* Pin is configured as PTB2 */
+                                          kPORT_MuxAsGpio};
+    /* PORTB2 (pin 37) is configured as PTB2 */
+    PORT_SetPinConfig(BOARD_ACCEL_INT2_PORT, BOARD_ACCEL_INT2_PIN, &ACCEL_INT2);
+    const port_pin_config_t ACCEL_INT1 = {/* Internal pull-up resistor is enabled */
+                                          kPORT_PullUp,
+                                          /* Fast slew rate is configured */
+                                          kPORT_FastSlewRate,
+                                          /* Passive filter is disabled */
+                                          kPORT_PassiveFilterDisable,
+                                          /* Low drive strength is configured */
+                                          kPORT_LowDriveStrength,
+                                          /* Pin is configured as PTB3 */
+                                          kPORT_MuxAsGpio};
+    /* PORTB3 (pin 38) is configured as PTB3 */
+    PORT_SetPinConfig(BOARD_ACCEL_INT1_PORT, BOARD_ACCEL_INT1_PIN, &ACCEL_INT1);
+    const port_pin_config_t ACCEL_SCL = {/* Internal pull-up/down resistor is disabled */
+                                         kPORT_PullDisable,
+                                         /* Fast slew rate is configured */
+                                         kPORT_FastSlewRate,
+                                         /* Passive filter is disabled */
+                                         kPORT_PassiveFilterDisable,
+                                         /* Low drive strength is configured */
+                                         kPORT_LowDriveStrength,
+                                         /* Pin is configured as I2C0_SCL */
+                                         kPORT_MuxAlt7};
+    /* PORTC6 (pin 51) is configured as I2C0_SCL */
+    PORT_SetPinConfig(BOARD_ACCEL_SCL_PORT, BOARD_ACCEL_SCL_PIN, &ACCEL_SCL);
+    const port_pin_config_t ACCEL_SDA = {/* Internal pull-up/down resistor is disabled */
+                                         kPORT_PullDisable,
+                                         /* Fast slew rate is configured */
+                                         kPORT_FastSlewRate,
+                                         /* Passive filter is disabled */
+                                         kPORT_PassiveFilterDisable,
+                                         /* Low drive strength is configured */
+                                         kPORT_LowDriveStrength,
+                                         /* Pin is configured as I2C0_SDA */
+                                         kPORT_MuxAlt7};
+    /* PORTC7 (pin 52) is configured as I2C0_SDA */
+    PORT_SetPinConfig(BOARD_ACCEL_SDA_PORT, BOARD_ACCEL_SDA_PIN, &ACCEL_SDA);
+    const port_pin_config_t ACCEL_RST = {/* Internal pull-up/down resistor is disabled */
+                                         kPORT_PullDisable,
+                                         /* Slow slew rate is configured */
+                                         kPORT_SlowSlewRate,
+                                         /* Passive filter is disabled */
+                                         kPORT_PassiveFilterDisable,
+                                         /* Low drive strength is configured */
+                                         kPORT_LowDriveStrength,
+                                         /* Pin is configured as PTD1 */
+                                         kPORT_MuxAsGpio};
+    /* PORTD1 (pin 58) is configured as PTD1 */
+    PORT_SetPinConfig(BOARD_ACCEL_RST_PORT, BOARD_ACCEL_RST_PIN, &ACCEL_RST);
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitThermistorPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '9', peripheral: ADC0, signal: 'DP, 0', pin_signal: ADC0_SE0/ADC0_DP0/PTE20/FTM1_CH0/UART0_TX, slew_rate: slow, pull_select: down, pull_enable: disable}
+  - {pin_num: '10', peripheral: ADC0, signal: 'DM, 0', pin_signal: ADC0_SE4/ADC0_DM0/PTE21/FTM1_CH1/UART0_RX, slew_rate: slow, pull_select: down, pull_enable: disable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitThermistorPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitThermistorPins(void)
+{
+    /* Port E Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortE);
+    const port_pin_config_t ADC0_DP_THER = {/* Internal pull-up/down resistor is disabled */
+                                            kPORT_PullDisable,
+                                            /* Slow slew rate is configured */
+                                            kPORT_SlowSlewRate,
+                                            /* Passive filter is disabled */
+                                            kPORT_PassiveFilterDisable,
+                                            /* Low drive strength is configured */
+                                            kPORT_LowDriveStrength,
+                                            /* Pin is configured as ADC0_DP0 */
+                                            kPORT_PinDisabledOrAnalog};
+    /* PORTE20 (pin 9) is configured as ADC0_DP0 */
+    PORT_SetPinConfig(BOARD_ADC0_DP_THER_PORT, BOARD_ADC0_DP_THER_PIN, &ADC0_DP_THER);
+    const port_pin_config_t ADC0_DM_THER = {/* Internal pull-up/down resistor is disabled */
+                                            kPORT_PullDisable,
+                                            /* Slow slew rate is configured */
+                                            kPORT_SlowSlewRate,
+                                            /* Passive filter is disabled */
+                                            kPORT_PassiveFilterDisable,
+                                            /* Low drive strength is configured */
+                                            kPORT_LowDriveStrength,
+                                            /* Pin is configured as ADC0_DM0 */
+                                            kPORT_PinDisabledOrAnalog};
+    /* PORTE21 (pin 10) is configured as ADC0_DM0 */
+    PORT_SetPinConfig(BOARD_ADC0_DM_THER_PORT, BOARD_ADC0_DM_THER_PIN, &ADC0_DM_THER);
+}
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitCANPins:
+- options: {prefix: BOARD_, coreID: core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '20', peripheral: CAN0, signal: TX, pin_signal: PTE24/CAN0_TX/FTM0_CH0/I2C0_SCL/EWM_OUT_b, slew_rate: fast, pull_select: down, pull_enable: disable}
+  - {pin_num: '21', peripheral: CAN0, signal: RX, pin_signal: PTE25/LLWU_P21/CAN0_RX/FTM0_CH1/I2C0_SDA/EWM_IN, identifier: CAN_RX, slew_rate: fast, pull_select: down,
+    pull_enable: disable}
+  - {pin_num: '29', peripheral: GPIOA, signal: 'GPIO, 13', pin_signal: PTA13/LLWU_P4/CAN0_RX/FTM1_CH1/FTM1_QD_PHB, direction: OUTPUT, gpio_init_state: 'false', slew_rate: slow,
+    pull_select: down, pull_enable: disable}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitCANPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitCANPins(void)
+{
+    /* Port A Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortA);
+    /* Port E Clock Gate Control: Clock enabled */
+    CLOCK_EnableClock(kCLOCK_PortE);
+    gpio_pin_config_t CAN_S_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PTA13 (pin 29)  */
+    GPIO_PinInit(BOARD_CAN_S_GPIO, BOARD_CAN_S_PIN, &CAN_S_config);
+    const port_pin_config_t CAN_S = {/* Internal pull-up/down resistor is disabled */
+                                     kPORT_PullDisable,
+                                     /* Slow slew rate is configured */
+                                     kPORT_SlowSlewRate,
+                                     /* Passive filter is disabled */
+                                     kPORT_PassiveFilterDisable,
+                                     /* Low drive strength is configured */
+                                     kPORT_LowDriveStrength,
+                                     /* Pin is configured as PTA13 */
+                                     kPORT_MuxAsGpio};
+    /* PORTA13 (pin 29) is configured as PTA13 */
+    PORT_SetPinConfig(BOARD_CAN_S_PORT, BOARD_CAN_S_PIN, &CAN_S);
+    const port_pin_config_t CAN_TX = {/* Internal pull-up/down resistor is disabled */
+                                      kPORT_PullDisable,
+                                      /* Fast slew rate is configured */
+                                      kPORT_FastSlewRate,
+                                      /* Passive filter is disabled */
+                                      kPORT_PassiveFilterDisable,
+                                      /* Low drive strength is configured */
+                                      kPORT_LowDriveStrength,
+                                      /* Pin is configured as CAN0_TX */
+                                      kPORT_MuxAlt2};
+    /* PORTE24 (pin 20) is configured as CAN0_TX */
+    PORT_SetPinConfig(BOARD_CAN_TX_PORT, BOARD_CAN_TX_PIN, &CAN_TX);
+    const port_pin_config_t CAN_RX = {/* Internal pull-up/down resistor is disabled */
+                                      kPORT_PullDisable,
+                                      /* Fast slew rate is configured */
+                                      kPORT_FastSlewRate,
+                                      /* Passive filter is disabled */
+                                      kPORT_PassiveFilterDisable,
+                                      /* Low drive strength is configured */
+                                      kPORT_LowDriveStrength,
+                                      /* Pin is configured as CAN0_RX */
+                                      kPORT_MuxAlt2};
+    /* PORTE25 (pin 21) is configured as CAN0_RX */
+    PORT_SetPinConfig(BOARD_CAN_RX_PORT, BOARD_CAN_RX_PIN, &CAN_RX);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/