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Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.h')
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1 files changed, 221 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.h new file mode 100644 index 000000000..7f8d4375f --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv11z/project_template/pin_mux.h | |||
@@ -0,0 +1,221 @@ | |||
1 | /* | ||
2 | * Copyright 2018 NXP. | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * SPDX-License-Identifier: BSD-3-Clause | ||
6 | */ | ||
7 | |||
8 | /*********************************************************************************************************************** | ||
9 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file | ||
10 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. | ||
11 | **********************************************************************************************************************/ | ||
12 | |||
13 | #ifndef _PIN_MUX_H_ | ||
14 | #define _PIN_MUX_H_ | ||
15 | |||
16 | /*! | ||
17 | * @addtogroup pin_mux | ||
18 | * @{ | ||
19 | */ | ||
20 | |||
21 | /*********************************************************************************************************************** | ||
22 | * API | ||
23 | **********************************************************************************************************************/ | ||
24 | |||
25 | #if defined(__cplusplus) | ||
26 | extern "C" { | ||
27 | #endif | ||
28 | |||
29 | /*! | ||
30 | * @brief Calls initialization functions. | ||
31 | * | ||
32 | */ | ||
33 | void BOARD_InitBootPins(void); | ||
34 | |||
35 | /*! | ||
36 | * @brief Configures pin routing and optionally pin electrical features. | ||
37 | * | ||
38 | */ | ||
39 | void BOARD_InitPins(void); | ||
40 | |||
41 | /*! @name PORTB0 (number 35), J1[10]/J1[11]/PTB0 | ||
42 | @{ */ | ||
43 | #define BOARD_SW2_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ | ||
44 | #define BOARD_SW2_PORT PORTB /*!<@brief PORT device name: PORTB */ | ||
45 | #define BOARD_SW2_PIN 0U /*!<@brief PORTB pin index: 0 */ | ||
46 | /* @} */ | ||
47 | |||
48 | /*! @name PORTA4 (number 26), J2[4]/PTA4 | ||
49 | @{ */ | ||
50 | #define BOARD_SW3_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ | ||
51 | #define BOARD_SW3_PORT PORTA /*!<@brief PORT device name: PORTA */ | ||
52 | #define BOARD_SW3_PIN 4U /*!<@brief PORTA pin index: 4 */ | ||
53 | /* @} */ | ||
54 | |||
55 | /*! | ||
56 | * @brief Configures pin routing and optionally pin electrical features. | ||
57 | * | ||
58 | */ | ||
59 | void BOARD_InitButtonsPins(void); | ||
60 | |||
61 | /*! @name PORTD6 (number 63), J2[6]/LD1[1]/PTD6 | ||
62 | @{ */ | ||
63 | #define BOARD_LED_RED_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ | ||
64 | #define BOARD_LED_RED_PORT PORTD /*!<@brief PORT device name: PORTD */ | ||
65 | #define BOARD_LED_RED_PIN 6U /*!<@brief PORTD pin index: 6 */ | ||
66 | /* @} */ | ||
67 | |||
68 | /*! @name PORTE29 (number 17), J1[13]/J1[14]/LD1[4]/PTE29 | ||
69 | @{ */ | ||
70 | #define BOARD_LED_GREEN_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */ | ||
71 | #define BOARD_LED_GREEN_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
72 | #define BOARD_LED_GREEN_PIN 29U /*!<@brief PORTE pin index: 29 */ | ||
73 | /* @} */ | ||
74 | |||
75 | /*! @name PORTE25 (number 21), J1[5]/J1[12]/LD1[3]/U9[4]/PTE25 | ||
76 | @{ */ | ||
77 | #define BOARD_LED_BLUE_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */ | ||
78 | #define BOARD_LED_BLUE_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
79 | #define BOARD_LED_BLUE_PIN 25U /*!<@brief PORTE pin index: 25 */ | ||
80 | /* @} */ | ||
81 | |||
82 | /*! | ||
83 | * @brief Configures pin routing and optionally pin electrical features. | ||
84 | * | ||
85 | */ | ||
86 | void BOARD_InitLEDsPins(void); | ||
87 | |||
88 | #define SOPT5_UART0ODE_DISABLED 0x00u /*!<@brief UART0 Open Drain Enable: Open drain is disabled on UART0 */ | ||
89 | #define SOPT5_UART0RXSRC_UART_RX 0x00u /*!<@brief UART 0 Receive Data Source Select: UART0_RX pin */ | ||
90 | #define SOPT5_UART0TXSRC_UART_TX 0x00u /*!<@brief UART 0 Transmit Data Source Select: UART0_TX pin */ | ||
91 | |||
92 | /*! @name PORTB17 (number 40), U5[1]/UART0_TX_TGTMCU | ||
93 | @{ */ | ||
94 | #define BOARD_DEBUG_UART_TX_PORT PORTB /*!<@brief PORT device name: PORTB */ | ||
95 | #define BOARD_DEBUG_UART_TX_PIN 17U /*!<@brief PORTB pin index: 17 */ | ||
96 | /* @} */ | ||
97 | |||
98 | /*! @name PORTB16 (number 39), J1[6]/U3[4]/UART0_RX_TGTMCU | ||
99 | @{ */ | ||
100 | #define BOARD_DEBUG_UART_RX_PORT PORTB /*!<@brief PORT device name: PORTB */ | ||
101 | #define BOARD_DEBUG_UART_RX_PIN 16U /*!<@brief PORTB pin index: 16 */ | ||
102 | /* @} */ | ||
103 | |||
104 | /*! | ||
105 | * @brief Configures pin routing and optionally pin electrical features. | ||
106 | * | ||
107 | */ | ||
108 | void BOARD_InitDEBUG_UARTPins(void); | ||
109 | |||
110 | /*! @name PORTA18 (number 32), Y2[1] | ||
111 | @{ */ | ||
112 | #define BOARD_EXTAL_PORT PORTA /*!<@brief PORT device name: PORTA */ | ||
113 | #define BOARD_EXTAL_PIN 18U /*!<@brief PORTA pin index: 18 */ | ||
114 | /* @} */ | ||
115 | |||
116 | /*! @name PORTA19 (number 33), Y2[2] | ||
117 | @{ */ | ||
118 | #define BOARD_XTAL_PORT PORTA /*!<@brief PORT device name: PORTA */ | ||
119 | #define BOARD_XTAL_PIN 19U /*!<@brief PORTA pin index: 19 */ | ||
120 | /* @} */ | ||
121 | |||
122 | /*! | ||
123 | * @brief Configures pin routing and optionally pin electrical features. | ||
124 | * | ||
125 | */ | ||
126 | void BOARD_InitOSCPins(void); | ||
127 | |||
128 | /*! @name PORTC6 (number 51), J2[8]/J2[13]/U10[4]/I2C0_SCL/SPI0_SOUT/PTC6 | ||
129 | @{ */ | ||
130 | #define BOARD_ACCEL_SCL_PORT PORTC /*!<@brief PORT device name: PORTC */ | ||
131 | #define BOARD_ACCEL_SCL_PIN 6U /*!<@brief PORTC pin index: 6 */ | ||
132 | /* @} */ | ||
133 | |||
134 | /*! @name PORTC7 (number 52), J1[15]/J1[16]/U10[6]/I2C0_SDA/PTC7 | ||
135 | @{ */ | ||
136 | #define BOARD_ACCEL_SDA_PORT PORTC /*!<@brief PORT device name: PORTC */ | ||
137 | #define BOARD_ACCEL_SDA_PIN 7U /*!<@brief PORTC pin index: 7 */ | ||
138 | /* @} */ | ||
139 | |||
140 | /*! @name PORTD1 (number 58), J1[4]/J1[9]/J4[3]/U10[16]/PTD1 | ||
141 | @{ */ | ||
142 | #define BOARD_ACCEL_RST_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ | ||
143 | #define BOARD_ACCEL_RST_PORT PORTD /*!<@brief PORT device name: PORTD */ | ||
144 | #define BOARD_ACCEL_RST_PIN 1U /*!<@brief PORTD pin index: 1 */ | ||
145 | /* @} */ | ||
146 | |||
147 | /*! @name PORTB3 (number 38), J2[11]/J2[18]/J4[10]/U10[11]/PTB3 | ||
148 | @{ */ | ||
149 | #define BOARD_ACCEL_INT1_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ | ||
150 | #define BOARD_ACCEL_INT1_PORT PORTB /*!<@brief PORT device name: PORTB */ | ||
151 | #define BOARD_ACCEL_INT1_PIN 3U /*!<@brief PORTB pin index: 3 */ | ||
152 | /* @} */ | ||
153 | |||
154 | /*! @name PORTB2 (number 37), J2[15]/J2[20]/J4[12]/U10[9]/PTB2 | ||
155 | @{ */ | ||
156 | #define BOARD_ACCEL_INT2_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ | ||
157 | #define BOARD_ACCEL_INT2_PORT PORTB /*!<@brief PORT device name: PORTB */ | ||
158 | #define BOARD_ACCEL_INT2_PIN 2U /*!<@brief PORTB pin index: 2 */ | ||
159 | /* @} */ | ||
160 | |||
161 | /*! | ||
162 | * @brief Configures pin routing and optionally pin electrical features. | ||
163 | * | ||
164 | */ | ||
165 | void BOARD_InitACCELPins(void); | ||
166 | |||
167 | /*! @name PORTE20 (number 9), J4[6]/ADC0_DP0/THER_A | ||
168 | @{ */ | ||
169 | #define BOARD_ADC0_DP_THER_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
170 | #define BOARD_ADC0_DP_THER_PIN 20U /*!<@brief PORTE pin index: 20 */ | ||
171 | /* @} */ | ||
172 | |||
173 | /*! @name PORTE21 (number 10), J4[8]/ADC0_DM0/THER_B | ||
174 | @{ */ | ||
175 | #define BOARD_ADC0_DM_THER_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
176 | #define BOARD_ADC0_DM_THER_PIN 21U /*!<@brief PORTE pin index: 21 */ | ||
177 | /* @} */ | ||
178 | |||
179 | /*! | ||
180 | * @brief Configures pin routing and optionally pin electrical features. | ||
181 | * | ||
182 | */ | ||
183 | void BOARD_InitThermistorPins(void); | ||
184 | |||
185 | /*! @name PORTE24 (number 20), J1[1]/J1[8]/U9[1]/PTE24 | ||
186 | @{ */ | ||
187 | #define BOARD_CAN_TX_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
188 | #define BOARD_CAN_TX_PIN 24U /*!<@brief PORTE pin index: 24 */ | ||
189 | /* @} */ | ||
190 | |||
191 | /*! @name PORTE25 (number 21), J1[5]/J1[12]/LD1[3]/U9[4]/PTE25 | ||
192 | @{ */ | ||
193 | #define BOARD_CAN_RX_PORT PORTE /*!<@brief PORT device name: PORTE */ | ||
194 | #define BOARD_CAN_RX_PIN 25U /*!<@brief PORTE pin index: 25 */ | ||
195 | /* @} */ | ||
196 | |||
197 | /*! @name PORTA13 (number 29), U9[8]/PTA13 | ||
198 | @{ */ | ||
199 | #define BOARD_CAN_S_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ | ||
200 | #define BOARD_CAN_S_PORT PORTA /*!<@brief PORT device name: PORTA */ | ||
201 | #define BOARD_CAN_S_PIN 13U /*!<@brief PORTA pin index: 13 */ | ||
202 | /* @} */ | ||
203 | |||
204 | /*! | ||
205 | * @brief Configures pin routing and optionally pin electrical features. | ||
206 | * | ||
207 | */ | ||
208 | void BOARD_InitCANPins(void); | ||
209 | |||
210 | #if defined(__cplusplus) | ||
211 | } | ||
212 | #endif | ||
213 | |||
214 | /*! | ||
215 | * @} | ||
216 | */ | ||
217 | #endif /* _PIN_MUX_H_ */ | ||
218 | |||
219 | /*********************************************************************************************************************** | ||
220 | * EOF | ||
221 | **********************************************************************************************************************/ | ||