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diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv31f/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmkv31f/project_template/pin_mux.h
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1/*
2 * Copyright 2018-2019 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _PIN_MUX_H_
9#define _PIN_MUX_H_
10
11/*!
12 * @addtogroup pin_mux
13 * @{
14 */
15
16/***********************************************************************************************************************
17 * API
18 **********************************************************************************************************************/
19
20#if defined(__cplusplus)
21extern "C" {
22#endif
23
24/*!
25 * @brief Calls initialization functions.
26 *
27 */
28void BOARD_InitBootPins(void);
29
30/*! @name PORTA2 (number 36), J9[6]/TRACE_SWO
31 @{ */
32#define BOARD_TRACE_SWO_PORT PORTA /*!<@brief PORT device name: PORTA */
33#define BOARD_TRACE_SWO_PIN 2U /*!<@brief PORTA pin index: 2 */
34 /* @} */
35
36/*!
37 * @brief Configures pin routing and optionally pin electrical features.
38 *
39 */
40void BOARD_InitPins(void);
41
42/*! @name PORTE4 (number 5), SW3
43 @{ */
44#define BOARD_SW3_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
45#define BOARD_SW3_PORT PORTE /*!<@brief PORT device name: PORTE */
46#define BOARD_SW3_PIN 4U /*!<@brief PORTE pin index: 4 */
47 /* @} */
48
49/*! @name PORTA4 (number 38), SW2/NMI_b
50 @{ */
51#define BOARD_SW2_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */
52#define BOARD_SW2_PORT PORTA /*!<@brief PORT device name: PORTA */
53#define BOARD_SW2_PIN 4U /*!<@brief PORTA pin index: 4 */
54 /* @} */
55
56/*!
57 * @brief Configures pin routing and optionally pin electrical features.
58 *
59 */
60void BOARD_InitBUTTONsPins(void);
61
62#define PORT_DFER_DFE_1_MASK 0x02u /*!<@brief Digital Filter Enable Mask for item 1. */
63#define PORT_DFER_DFE_7_MASK 0x80u /*!<@brief Digital Filter Enable Mask for item 7. */
64
65/*! @name PORTE25 (number 32), D4[3]/LEDRGB_BLUE
66 @{ */
67#define BOARD_LED_BLUE_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
68#define BOARD_LED_BLUE_PORT PORTE /*!<@brief PORT device name: PORTE */
69#define BOARD_LED_BLUE_PIN 25U /*!<@brief PORTE pin index: 25 */
70 /* @} */
71
72/*! @name PORTD1 (number 94), D4[1]/LEDRGB_RED
73 @{ */
74#define BOARD_LED_RED_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
75#define BOARD_LED_RED_PORT PORTD /*!<@brief PORT device name: PORTD */
76#define BOARD_LED_RED_PIN 1U /*!<@brief PORTD pin index: 1 */
77 /* @} */
78
79/*! @name PORTD7 (number 100), D4[4]/LEDRGB_GREEN
80 @{ */
81#define BOARD_LED_GREEN_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
82#define BOARD_LED_GREEN_PORT PORTD /*!<@brief PORT device name: PORTD */
83#define BOARD_LED_GREEN_PIN 7U /*!<@brief PORTD pin index: 7 */
84 /* @} */
85
86/*!
87 * @brief Configures pin routing and optionally pin electrical features.
88 *
89 */
90void BOARD_InitLEDsPins(void);
91
92#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!<@brief UART 0 transmit data source select: UART0_TX pin */
93
94/*! @name PORTB16 (number 62), U7[4]/UART0_RX_TGTMCU
95 @{ */
96#define BOARD_DEBUG_UART_RX_PORT PORTB /*!<@brief PORT device name: PORTB */
97#define BOARD_DEBUG_UART_RX_PIN 16U /*!<@brief PORTB pin index: 16 */
98 /* @} */
99
100/*! @name PORTB17 (number 63), U10[1]/UART0_TX_TGTMCU
101 @{ */
102#define BOARD_DEBUG_UART_TX_PORT PORTB /*!<@brief PORT device name: PORTB */
103#define BOARD_DEBUG_UART_TX_PIN 17U /*!<@brief PORTB pin index: 17 */
104 /* @} */
105
106/*!
107 * @brief Configures pin routing and optionally pin electrical features.
108 *
109 */
110void BOARD_InitDEBUG_UARTPins(void);
111
112/*! @name ADC1_DP1 (number 16), RT1/THER_A
113 @{ */
114/* @} */
115
116/*! @name ADC1_DM1 (number 17), RT1/THER_B
117 @{ */
118/* @} */
119
120/*!
121 * @brief Configures pin routing and optionally pin electrical features.
122 *
123 */
124void BOARD_InitTHERPins(void);
125
126#define PORT_DFER_DFE_0_MASK 0x01u /*!<@brief Digital Filter Enable Mask for item 0. */
127#define PORT_DFER_DFE_2_MASK 0x04u /*!<@brief Digital Filter Enable Mask for item 2. */
128#define PORT_DFER_DFE_3_MASK 0x08u /*!<@brief Digital Filter Enable Mask for item 3. */
129
130/*! @name PORTD2 (number 95), U8[4]/I2C0_SCL
131 @{ */
132#define BOARD_ACCEL_SCL_PORT PORTD /*!<@brief PORT device name: PORTD */
133#define BOARD_ACCEL_SCL_PIN 2U /*!<@brief PORTD pin index: 2 */
134 /* @} */
135
136/*! @name PORTD3 (number 96), U8[6]/I2C0_SDA
137 @{ */
138#define BOARD_ACCEL_SDA_PORT PORTD /*!<@brief PORT device name: PORTD */
139#define BOARD_ACCEL_SDA_PIN 3U /*!<@brief PORTD pin index: 3 */
140 /* @} */
141
142/*! @name PORTC18 (number 92), U8[9]/Sensor_INT2
143 @{ */
144#define BOARD_ACCEL_INT2_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */
145#define BOARD_ACCEL_INT2_PORT PORTC /*!<@brief PORT device name: PORTC */
146#define BOARD_ACCEL_INT2_PIN 18U /*!<@brief PORTC pin index: 18 */
147 /* @} */
148
149/*! @name PORTD0 (number 93), U8[11]/INT1
150 @{ */
151#define BOARD_ACCEL_INT1_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
152#define BOARD_ACCEL_INT1_PORT PORTD /*!<@brief PORT device name: PORTD */
153#define BOARD_ACCEL_INT1_PIN 0U /*!<@brief PORTD pin index: 0 */
154 /* @} */
155
156/*!
157 * @brief Configures pin routing and optionally pin electrical features.
158 *
159 */
160void BOARD_InitACCELPins(void);
161
162/*! @name PORTA18 (number 50), X501[1]/EXTAL0
163 @{ */
164#define BOARD_EXTAL0_PORT PORTA /*!<@brief PORT device name: PORTA */
165#define BOARD_EXTAL0_PIN 18U /*!<@brief PORTA pin index: 18 */
166 /* @} */
167
168/*! @name PORTA19 (number 51), X501[3]/XTAL0
169 @{ */
170#define BOARD_XTAL0_PORT PORTA /*!<@brief PORT device name: PORTA */
171#define BOARD_XTAL0_PIN 19U /*!<@brief PORTA pin index: 19 */
172 /* @} */
173
174/*!
175 * @brief Configures pin routing and optionally pin electrical features.
176 *
177 */
178void BOARD_InitOSCPins(void);
179
180#if defined(__cplusplus)
181}
182#endif
183
184/*!
185 * @}
186 */
187#endif /* _PIN_MUX_H_ */
188
189/***********************************************************************************************************************
190 * EOF
191 **********************************************************************************************************************/