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diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/hvpkv11z75m/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/hvpkv11z75m/project_template/pin_mux.h
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1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#ifndef _PIN_MUX_H_
14#define _PIN_MUX_H_
15
16/*!
17 * @addtogroup pin_mux
18 * @{
19 */
20
21/***********************************************************************************************************************
22 * API
23 **********************************************************************************************************************/
24
25#if defined(__cplusplus)
26extern "C" {
27#endif
28
29/*!
30 * @brief Calls initialization functions.
31 *
32 */
33void BOARD_InitBootPins(void);
34
35/*!
36 * @brief FTM0 Fault 0 Select: FTM0_FLT0 pin */
37#define SOPT4_FTM0FLT0_FTM 0x00u
38/*!
39 * @brief FTM0 channel 0 output PWM/OCMP mode source select: FTM0CH0 pin is the output of FTM0 channel 0 PWM/OCMP */
40#define SOPT8_FTM0OCH0SRC_NO_MODULATION 0x00u
41/*!
42 * @brief FTM0 channel 1 output PWM/OCMP mode source select: FTM0CH1 pin is the output of FTM0 channel 1 PWM/OCMP */
43#define SOPT8_FTM0OCH1SRC_NO_MODULATION 0x00u
44/*!
45 * @brief FTM0 channel 2 output PWM/OCMP mode source select: FTM0CH2 pin is the output of FTM0 channel 2 PWM/OCMP */
46#define SOPT8_FTM0OCH2SRC_NO_MODULATION 0x00u
47/*!
48 * @brief FTM0 channel 3 output PWM/OCMP mode source select: FTM0CH3 pin is the output of FTM0 channel 3 PWM/OCMP */
49#define SOPT8_FTM0OCH3SRC_NO_MODULATION 0x00u
50/*!
51 * @brief FTM0 channel 4 output PWM/OCMP mode source select: FTM0CH4 pin is the output of FTM0 channel 4 PWM/OCMP */
52#define SOPT8_FTM0OCH4SRC_NO_MODULATION 0x00u
53/*!
54 * @brief FTM0 channel 5 output PWM/OCMP mode source select: FTM0CH5 pin is the output of FTM0 channel 5 PWM/OCMP */
55#define SOPT8_FTM0OCH5SRC_NO_MODULATION 0x00u
56
57/*! @name PORTE24 (number 15), MB_J11[A14]/MB_U12[18]/MB_PWM_AT/J4[A14]/PWM0
58 @{ */
59#define MB_PWM_AT_PORT PORTE /*!<@brief PORT device name: PORTE */
60#define MB_PWM_AT_PIN 24U /*!<@brief PORTE pin index: 24 */
61 /* @} */
62
63/*! @name PORTC4 (number 37), MB_J11[A17]/MB_U12[13]/MB_PWM_BB/J4[A17]/PWM3
64 @{ */
65#define MB_PWM_BB_PORT PORTC /*!<@brief PORT device name: PORTC */
66#define MB_PWM_BB_PIN 4U /*!<@brief PORTC pin index: 4 */
67 /* @} */
68
69/*! @name PORTC5 (number 38), MB_J11[A16]/MB_U12[19]/MB_PWM_BT/J4[A16]/PWM2
70 @{ */
71#define MB_PWM_BT_PORT PORTC /*!<@brief PORT device name: PORTC */
72#define MB_PWM_BT_PIN 5U /*!<@brief PORTC pin index: 5 */
73 /* @} */
74
75/*! @name PORTD4 (number 45), MB_J11[A18]/MB_U12[20]/MB_PWM_CT/J4[A18]/PWM4
76 @{ */
77#define MB_PWM_CT_PORT PORTD /*!<@brief PORT device name: PORTD */
78#define MB_PWM_CT_PIN 4U /*!<@brief PORTD pin index: 4 */
79 /* @} */
80
81/*! @name PORTD5 (number 46), MB_J11[A19]/MB_U12[14]/MB_PWM_CB/J4[A19]/PWM5
82 @{ */
83#define MB_PWM_CB_PORT PORTD /*!<@brief PORT device name: PORTD */
84#define MB_PWM_CB_PIN 5U /*!<@brief PORTD pin index: 5 */
85 /* @} */
86
87/*! @name PORTE25 (number 16), MB_J11[A15]/MB_U12[12]/MB_PWM_AB/J4[A15]/PWM1
88 @{ */
89#define MB_PWM_AB_PORT PORTE /*!<@brief PORT device name: PORTE */
90#define MB_PWM_AB_PIN 25U /*!<@brief PORTE pin index: 25 */
91 /* @} */
92
93/*! @name PORTC0 (number 33), MB_J11[A25]/MB_U12[11]/MB_TP28/MB_FAULT/MB_FAULT_1/MB_PFC_overcurrent/J4[A25]/FAULT_1
94 @{ */
95#define MB_FAULT_1_PORT PORTC /*!<@brief PORT device name: PORTC */
96#define MB_FAULT_1_PIN 0U /*!<@brief PORTC pin index: 0 */
97 /* @} */
98
99/*!
100 * @brief Configures pin routing and optionally pin electrical features.
101 *
102 */
103void MB_InitMC_PWMPins(void);
104
105/*!
106 * @brief FTM0 channel 0 output PWM/OCMP mode source select: FTM0CH0 pin is the output of FTM0 channel 0 PWM/OCMP */
107#define SOPT8_FTM0OCH0SRC_NO_MODULATION 0x00u
108/*!
109 * @brief FTM0 channel 1 output PWM/OCMP mode source select: FTM0CH1 pin is the output of FTM0 channel 1 PWM/OCMP */
110#define SOPT8_FTM0OCH1SRC_NO_MODULATION 0x00u
111
112/*! @name PORTC7 (number 40), MB_J11[B21]/MB_PFC_zc_2/J4[B21]/MB_TP_27
113 @{ */
114#define MB_PFC_ZC_2_PORT PORTC /*!<@brief PORT device name: PORTC */
115#define MB_PFC_ZC_2_PIN 7U /*!<@brief PORTC pin index: 7 */
116 /* @} */
117
118/*! @name PORTA18 (number 24), MB_J11[B28]/MB_Q3[1]/MB_Relay/J4[B28]/Relay
119 @{ */
120#define MB_RELAY_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */
121#define MB_RELAY_PORT PORTA /*!<@brief PORT device name: PORTA */
122#define MB_RELAY_PIN 18U /*!<@brief PORTA pin index: 18 */
123 /* @} */
124
125/*! @name PORTD7 (number 48), MB_J11[A23]/MB_U14[2]/MB_TP12/MB_PWM_PFC1/J4[A23]/PWM9
126 @{ */
127#define MB_PWM_PFC1_PORT PORTD /*!<@brief PORT device name: PORTD */
128#define MB_PWM_PFC1_PIN 7U /*!<@brief PORTD pin index: 7 */
129 /* @} */
130
131/*! @name PORTD6 (number 47), MB_J11[A22]/MB_U14[4]/MB_TP15/MB_PWM_PFC2/J4[A22]/PWM8
132 @{ */
133#define MB_PWM_PFC2_PORT PORTD /*!<@brief PORT device name: PORTD */
134#define MB_PWM_PFC2_PIN 6U /*!<@brief PORTD pin index: 6 */
135 /* @} */
136
137/*!
138 * @brief Configures pin routing and optionally pin electrical features.
139 *
140 */
141void MB_InitPFCPins(void);
142
143/*! @name PORTE18 (number 5), MB_J11[B3]/MB_U8B[7]/MB_TP34/MB_I_sense_DCB/J4[B3]/I_dcb
144 @{ */
145#define MB_I_DCB_PORT PORTE /*!<@brief PORT device name: PORTE */
146#define MB_I_DCB_PIN 18U /*!<@brief PORTE pin index: 18 */
147 /* @} */
148
149/*! @name PORTE21 (number 8), MB_J11[B4]/MB_TP31/MB_V_sense_DCB/MB_DCB_Pos/J4[B4]/U_dcb
150 @{ */
151#define MB_U_DCB_PORT PORTE /*!<@brief PORT device name: PORTE */
152#define MB_U_DCB_PIN 21U /*!<@brief PORTE pin index: 21 */
153 /* @} */
154
155/*! @name PORTC1 (number 34), MB_J11[B9]/MB_U12[2]/MB_TP38/MB_IPM_temp/J4[B9]/Temp_IPM
156 @{ */
157#define MB_TEMP_IPM_PORT PORTC /*!<@brief PORT device name: PORTC */
158#define MB_TEMP_IPM_PIN 1U /*!<@brief PORTC pin index: 1 */
159 /* @} */
160
161/*! @name PORTB1 (number 28), MB_J11[A4]/MB_U11B[7]/MB_TP40/MB_I_sense_B/J4[A4]/I_phB
162 @{ */
163#define MB_I_PH_B_PORT PORTB /*!<@brief PORT device name: PORTB */
164#define MB_I_PH_B_PIN 1U /*!<@brief PORTB pin index: 1 */
165 /* @} */
166
167/*! @name PORTE20 (number 7), MB_J11[A5]/MB_U8A[1]/MB_TP37/MB_I_sense_C/J4[A5]/I_phC
168 @{ */
169#define MB_I_PH_C_2_PORT PORTE /*!<@brief PORT device name: PORTE */
170#define MB_I_PH_C_2_PIN 20U /*!<@brief PORTE pin index: 20 */
171 /* @} */
172
173/*! @name PORTE30 (number 14), MB_J11[A3]/MB_U11A[1]/MB_TP45/MB_I_sense_A/J4[A3]/I_phA
174 @{ */
175#define MB_I_PH_A_PORT PORTE /*!<@brief PORT device name: PORTE */
176#define MB_I_PH_A_PIN 30U /*!<@brief PORTE pin index: 30 */
177 /* @} */
178
179/*! @name PORTE19 (number 6), MB_J11[A5]/MB_U8A[1]/MB_TP37/MB_I_sense_C/J4[A5]/I_phC
180 @{ */
181#define MB_I_PH_C_PORT PORTE /*!<@brief PORT device name: PORTE */
182#define MB_I_PH_C_PIN 19U /*!<@brief PORTE pin index: 19 */
183 /* @} */
184
185/*! @name PORTC6 (number 39), MB_J11[A6]/MB_TP16/MB_TACHO/J4[A6]/TACHO
186 @{ */
187#define MB_TACHO_PORT PORTC /*!<@brief PORT device name: PORTC */
188#define MB_TACHO_PIN 6U /*!<@brief PORTC pin index: 6 */
189 /* @} */
190
191/*! @name PORTB3 (number 30), MB_J11[A7]/MB_TP18/MB_Vin/J4[A7]/V_in
192 @{ */
193#define MB_V_IN_PORT PORTB /*!<@brief PORT device name: PORTB */
194#define MB_V_IN_PIN 3U /*!<@brief PORTB pin index: 3 */
195 /* @} */
196
197/*! @name PORTC2 (number 35), MB_J11[A8]/MB_U2B[7]/MB_TP14/MB_Ipfc1/J4[A8]/I_pfc1
198 @{ */
199#define MB_I_PFC1_PORT PORTC /*!<@brief PORT device name: PORTC */
200#define MB_I_PFC1_PIN 2U /*!<@brief PORTC pin index: 2 */
201 /* @} */
202
203/*! @name PORTE17 (number 4), MB_J11[A9]/MB_U2A[1]/MB_TP5/MB_Ipfc2/J4[A9]/I_pfc2
204 @{ */
205#define MB_I_PFC2_PORT PORTE /*!<@brief PORT device name: PORTE */
206#define MB_I_PFC2_PIN 17U /*!<@brief PORTE pin index: 17 */
207 /* @} */
208
209/*!
210 * @brief Configures pin routing and optionally pin electrical features.
211 *
212 */
213void MB_InitANA_SENSPins(void);
214
215/*! @name PORTB0 (number 27), MB_J11[B6]/MB_TP44/MB_BEMF_sense_A/MB_Phase_A/J4[B6]/BEMF_A
216 @{ */
217#define MB_BEMF_A_PORT PORTB /*!<@brief PORT device name: PORTB */
218#define MB_BEMF_A_PIN 0U /*!<@brief PORTB pin index: 0 */
219 /* @} */
220
221/*! @name PORTB2 (number 29), MB_J11[B7]/MB_TP43/MB_BEMF_sense_B/MB_Phase_B/J4[B7]/BEMF_B
222 @{ */
223#define MB_BEMF_B_PORT PORTB /*!<@brief PORT device name: PORTB */
224#define MB_BEMF_B_PIN 2U /*!<@brief PORTB pin index: 2 */
225 /* @} */
226
227/*! @name PORTE16 (number 3), MB_J11[B8]/MB_TP41/MB_BEMF_sense_C/MB_Phase_C/J4[B8]/BEMF_C
228 @{ */
229#define MB_BEMF_C_PORT PORTE /*!<@brief PORT device name: PORTE */
230#define MB_BEMF_C_PIN 16U /*!<@brief PORTE pin index: 16 */
231 /* @} */
232
233/*!
234 * @brief Configures pin routing and optionally pin electrical features.
235 *
236 */
237void MB_InitBEMFPins(void);
238
239/*! @name PORTE29 (number 13), MB_J9[5]/MB_J11[B16]/MB_TP19/MB_ENC_Index/J4[B16]/TM2
240 @{ */
241#define MB_ENC_INDEX_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
242#define MB_ENC_INDEX_PORT PORTE /*!<@brief PORT device name: PORTE */
243#define MB_ENC_INDEX_PIN 29U /*!<@brief PORTE pin index: 29 */
244 /* @} */
245
246/*! @name PORTA1 (number 18), MB_J9[3]/MB_J11[B14]/MB_TP13/MB_ENC_PhaseA/J4[B14]/TM0
247 @{ */
248#define MB_ENC_PHASE_A_PORT PORTA /*!<@brief PORT device name: PORTA */
249#define MB_ENC_PHASE_A_PIN 1U /*!<@brief PORTA pin index: 1 */
250 /* @} */
251
252/*! @name PORTA2 (number 19), MB_J9[4]/MB_J11[B15]/MB_TP17/MB_ENC_PhaseB/J4[B15]/TM1
253 @{ */
254#define MB_ENC_PHASE_B_PORT PORTA /*!<@brief PORT device name: PORTA */
255#define MB_ENC_PHASE_B_PIN 2U /*!<@brief PORTA pin index: 2 */
256 /* @} */
257
258/*!
259 * @brief Configures pin routing and optionally pin electrical features.
260 *
261 */
262void MB_InitENCPins(void);
263
264#define SOPT5_UART0RXSRC_UART_RX 0x00u /*!<@brief UART 0 Receive Data Source Select: UART0_RX pin */
265#define SOPT5_UART0TXSRC_UART_TX 0x00u /*!<@brief UART 0 Transmit Data Source Select: UART0_TX pin */
266
267/*! @name PORTB17 (number 32), MB_J1[3]/MB_J11[B26]/MB_U1[13]/MB_U3[25]/MB_TP3/MB_TP7/MB_TxD/J4[B26]/TxD
268 @{ */
269#define MB_TXD_PORT PORTB /*!<@brief PORT device name: PORTB */
270#define MB_TXD_PIN 17U /*!<@brief PORTB pin index: 17 */
271 /* @} */
272
273/*! @name PORTB16 (number 31), MB_J3[2]/MB_J11[B27]/MB_U1[12]/MB_U3[26]/MB_TP2/MB_TP10/MB_RxD/J4[B27]/RxD
274 @{ */
275#define MB_RXD_PORT PORTB /*!<@brief PORT device name: PORTB */
276#define MB_RXD_PIN 16U /*!<@brief PORTB pin index: 16 */
277 /* @} */
278
279/*!
280 * @brief Configures pin routing and optionally pin electrical features.
281 *
282 */
283void MB_InitUSB_UARTPins(void);
284
285#define SOPT5_UART1RXSRC_UART_RX 0x00u /*!<@brief UART 1 Receive Data Source Select: UART1_RX pin */
286#define SOPT5_UART1TXSRC_UART_TX 0x00u /*!<@brief UART 1 Transmit Data Source Select: UART1_TX pin */
287
288/*! @name PORTD1 (number 42), MB_J1[1]/MB_J2[3]/MB_J11[A31]/MB_TxD_1/MB_TxD_EXT/U6[13]/J4[A31]/TxD_1/UART1_TX_TGTMCU
289 @{ */
290#define MB_TXD_1_PORT PORTD /*!<@brief PORT device name: PORTD */
291#define MB_TXD_1_PIN 1U /*!<@brief PORTD pin index: 1 */
292 /* @} */
293
294/*! @name PORTD0 (number 41), MB_J2[4]/MB_J3[4]/MB_J11[A32]/MB_RxD_1/MB_RxD_EXT/U6[14]/J4[A32]/RxD1/UART1_TGT_MCU
295 @{ */
296#define MB_RXD_1_PORT PORTD /*!<@brief PORT device name: PORTD */
297#define MB_RXD_1_PIN 0U /*!<@brief PORTD pin index: 0 */
298 /* @} */
299
300/*!
301 * @brief Configures pin routing and optionally pin electrical features.
302 *
303 */
304void MB_InitEXT_UARTPins(void);
305
306/*! @name PORTD3 (number 44), MB_J11[B25]/MB_U9[2]/MB_TP_35/MB_MCU_BRAKE/J4[B25]/MCU_BRAKE
307 @{ */
308#define MB_MCU_BRAKE_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
309#define MB_MCU_BRAKE_PORT PORTD /*!<@brief PORT device name: PORTD */
310#define MB_MCU_BRAKE_PIN 3U /*!<@brief PORTD pin index: 3 */
311 /* @} */
312
313/*!
314 * @brief Configures pin routing and optionally pin electrical features.
315 *
316 */
317void MB_InitBRAKEPins(void);
318
319/*!
320 * @brief Enable alternative conversion triggers for ADC0.: PDB0 CH0 triggers ADC0 */
321#define SOPT7_ADC0ALTTRGEN_PDB0 0x00u
322/*!
323 * @brief Enable alternative conversion triggers for ADC1.: PDB0 CH1 triggers ADC1 */
324#define SOPT7_ADC1ALTTRGEN_PDB0 0x00u
325
326/*! @name PORTA19 (number 25), MB_J11[A26]/MB_U9[2]/MB_TP35/MB_FAULT_2/MB_Over-voltage_FAULT/J4[A26]/FAULT_2
327 @{ */
328#define MB_FAULT_2_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */
329#define MB_FAULT_2_PORT PORTA /*!<@brief PORT device name: PORTA */
330#define MB_FAULT_2_PIN 19U /*!<@brief PORTA pin index: 19 */
331 /* @} */
332
333/*!
334 * @brief Configures pin routing and optionally pin electrical features.
335 *
336 */
337void MB_InitMISCPins(void);
338
339/*!
340 * @brief Configures pin routing and optionally pin electrical features.
341 *
342 */
343void BOARD_InitPins(void);
344
345#define SOPT5_UART1RXSRC_UART_RX 0x00u /*!<@brief UART 1 Receive Data Source Select: UART1_RX pin */
346#define SOPT5_UART1TXSRC_UART_TX 0x00u /*!<@brief UART 1 Transmit Data Source Select: UART1_TX pin */
347
348/*! @name PORTD0 (number 41), MB_J2[4]/MB_J3[4]/MB_J11[A32]/MB_RxD_1/MB_RxD_EXT/U6[14]/J4[A32]/RxD1/UART1_TGT_MCU
349 @{ */
350#define BOARD_UART_RX_TGTMCU_PORT PORTD /*!<@brief PORT device name: PORTD */
351#define BOARD_UART_RX_TGTMCU_PIN 0U /*!<@brief PORTD pin index: 0 */
352 /* @} */
353
354/*! @name PORTD1 (number 42), MB_J1[1]/MB_J2[3]/MB_J11[A31]/MB_TxD_1/MB_TxD_EXT/U6[13]/J4[A31]/TxD_1/UART1_TX_TGTMCU
355 @{ */
356#define BOARD_UART_TX_TGTMCU_PORT PORTD /*!<@brief PORT device name: PORTD */
357#define BOARD_UART_TX_TGTMCU_PIN 1U /*!<@brief PORTD pin index: 1 */
358 /* @} */
359
360/*!
361 * @brief Configures pin routing and optionally pin electrical features.
362 *
363 */
364void BOARD_InitDEBUG_UARTPins(void);
365
366/*! @name PORTC3 (number 36), USER_LED_2
367 @{ */
368#define BOARD_LED_RED_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */
369#define BOARD_LED_RED_PORT PORTC /*!<@brief PORT device name: PORTC */
370#define BOARD_LED_RED_PIN 3U /*!<@brief PORTC pin index: 3 */
371 /* @} */
372
373/*! @name PORTD2 (number 43), MB_J11[B20]/MB_U9[4]/MB_USER_LED/J4[B20]/USER_LED
374 @{ */
375#define BOARD_LED_GREEN_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
376#define BOARD_LED_GREEN_PORT PORTD /*!<@brief PORT device name: PORTD */
377#define BOARD_LED_GREEN_PIN 2U /*!<@brief PORTD pin index: 2 */
378 /* @} */
379
380/*!
381 * @brief Configures pin routing and optionally pin electrical features.
382 *
383 */
384void BOARD_InitLEDsPins(void);
385
386#if defined(__cplusplus)
387}
388#endif
389
390/*!
391 * @}
392 */
393#endif /* _PIN_MUX_H_ */
394
395/***********************************************************************************************************************
396 * EOF
397 **********************************************************************************************************************/
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 03:23:05 +0100