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diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso802/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso802/project_template/pin_mux.h
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1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#ifndef _PIN_MUX_H_
14#define _PIN_MUX_H_
15
16/***********************************************************************************************************************
17 * Definitions
18 **********************************************************************************************************************/
19
20/*! @brief Direction type */
21typedef enum _pin_mux_direction
22{
23 kPIN_MUX_DirectionInput = 0U, /* Input direction */
24 kPIN_MUX_DirectionOutput = 1U, /* Output direction */
25 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
26} pin_mux_direction_t;
27
28/*!
29 * @addtogroup pin_mux
30 * @{
31 */
32
33/***********************************************************************************************************************
34 * API
35 **********************************************************************************************************************/
36
37#if defined(__cplusplus)
38extern "C" {
39#endif
40
41/*!
42 * @brief Calls initialization functions.
43 *
44 */
45void BOARD_InitBootPins(void);
46
47/*!
48 * @brief Configures pin routing and optionally pin electrical features.
49 *
50 */
51void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
52
53#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
54#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
55#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
56#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
57
58/*! @name PIO0_8 (number 14), CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1
59 @{ */
60/*!
61 * @brief Device name: GPIO */
62#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
63/*!
64 * @brief GPIO signal: PIO0 */
65#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
66/*!
67 * @brief GPIO device name: GPIO */
68#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
69/*!
70 * @brief PIO0 pin index: 8 */
71#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 8U
72/*!
73 * @brief PORT device name: 0U */
74#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
75/*!
76 * @brief 0U pin index: 8 */
77#define BOARD_INITLEDSPINS_LED_BLUE_PIN 8U
78/*!
79 * @brief GPIO PIO0 channel: 8 */
80#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 8
81/*!
82 * @brief Pin name */
83#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_8
84/*!
85 * @brief Label */
86#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1"
87/*!
88 * @brief Identifier name */
89#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
90/*!
91 * @brief Direction */
92#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
93/* @} */
94
95/*! @name PIO0_9 (number 13), CN5[8]/CN6[1]/CN3[28]/LD21/LD22/LD5/PIO0_9_TXD_GPIO1_LED2
96 @{ */
97/*!
98 * @brief Device name: GPIO */
99#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
100/*!
101 * @brief GPIO signal: PIO0 */
102#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
103/*!
104 * @brief GPIO device name: GPIO */
105#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
106/*!
107 * @brief PIO0 pin index: 9 */
108#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 9U
109/*!
110 * @brief PORT device name: 0U */
111#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
112/*!
113 * @brief 0U pin index: 9 */
114#define BOARD_INITLEDSPINS_LED_RED_PIN 9U
115/*!
116 * @brief GPIO PIO0 channel: 9 */
117#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 9
118/*!
119 * @brief Pin name */
120#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_9
121/*!
122 * @brief Label */
123#define BOARD_INITLEDSPINS_LED_RED_LABEL "CN5[8]/CN6[1]/CN3[28]/LD21/LD22/LD5/PIO0_9_TXD_GPIO1_LED2"
124/*!
125 * @brief Identifier name */
126#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
127/*!
128 * @brief Direction */
129#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
130/* @} */
131
132/*! @name PIO0_12 (number 4), CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3
133 @{ */
134/*!
135 * @brief Device name: GPIO */
136#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
137/*!
138 * @brief GPIO signal: PIO0 */
139#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
140/*!
141 * @brief GPIO device name: GPIO */
142#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
143/*!
144 * @brief PIO0 pin index: 12 */
145#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 12U
146/*!
147 * @brief PORT device name: 0U */
148#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
149/*!
150 * @brief 0U pin index: 12 */
151#define BOARD_INITLEDSPINS_LED_GREEN_PIN 12U
152/*!
153 * @brief GPIO PIO0 channel: 12 */
154#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 12
155/*!
156 * @brief Pin name */
157#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_12
158/*!
159 * @brief Label */
160#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3"
161/*!
162 * @brief Identifier name */
163#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
164/*!
165 * @brief Direction */
166#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
167/* @} */
168
169/*!
170 * @brief Configures pin routing and optionally pin electrical features.
171 *
172 */
173void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
174
175#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
176#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
177#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
178#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
179
180/*! @name PIO0_4 (number 6), CN4[6]/CN3[32]/PIO0_4_TXD_SCK
181 @{ */
182/*!
183 * @brief Device name: USART0 */
184#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
185/*!
186 * @brief USART0 signal: TXD */
187#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
188/*!
189 * @brief PORT device name: 0U */
190#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
191/*!
192 * @brief 0U pin index: 4 */
193#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 4U
194/*!
195 * @brief Pin name */
196#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_4
197/*!
198 * @brief Label */
199#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "CN4[6]/CN3[32]/PIO0_4_TXD_SCK"
200/*!
201 * @brief Identifier name */
202#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
203/* @} */
204
205/*! @name PIO0_0 (number 19), CN5[2]/CN3[31]/PIO0_0_RXD
206 @{ */
207/*!
208 * @brief Device name: USART0 */
209#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
210/*!
211 * @brief USART0 signal: RXD */
212#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
213/*!
214 * @brief PORT device name: 0U */
215#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
216/*!
217 * @brief 0U pin index: 0 */
218#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 0U
219/*!
220 * @brief Pin name */
221#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_0
222/*!
223 * @brief Label */
224#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "CN5[2]/CN3[31]/PIO0_0_RXD"
225/*!
226 * @brief Identifier name */
227#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
228/* @} */
229
230/*!
231 * @brief Configures pin routing and optionally pin electrical features.
232 *
233 */
234void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
235
236#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
237#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
238#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
239#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
240
241/*! @name SWCLK (number 7), CN2[4]/CN4[7]/U3[16]/PIO0_3_SWCLK
242 @{ */
243/*!
244 * @brief Device name: SWD */
245#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PERIPHERAL SWD
246/*!
247 * @brief SWD signal: SWCLK */
248#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_SIGNAL SWCLK
249/*!
250 * @brief Pin name */
251#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN_NAME SWCLK
252/*!
253 * @brief Label */
254#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_LABEL "CN2[4]/CN4[7]/U3[16]/PIO0_3_SWCLK"
255/*!
256 * @brief Identifier name */
257#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_NAME "DEBUG_SWD_SWCLK"
258/* @} */
259
260/*! @name SWDIO (number 8), CN2[2]/CN4[8]/U3[17]/PIO0_2_SWDIO
261 @{ */
262/*!
263 * @brief Device name: SWD */
264#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
265/*!
266 * @brief SWD signal: SWDIO */
267#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
268/*!
269 * @brief Pin name */
270#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
271/*!
272 * @brief Label */
273#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "CN2[2]/CN4[8]/U3[17]/PIO0_2_SWDIO"
274/*!
275 * @brief Identifier name */
276#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
277/* @} */
278
279/*! @name RESETN (number 5), CN4[5]/CN2[10]/CN3[3]/U3[3]/U3[8]/PB2/PIO0_5_nRST
280 @{ */
281/*!
282 * @brief Device name: SYSCON */
283#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
284/*!
285 * @brief SYSCON signal: RESETN */
286#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
287/*!
288 * @brief Pin name */
289#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
290/*!
291 * @brief Label */
292#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "CN4[5]/CN2[10]/CN3[3]/U3[3]/U3[8]/PB2/PIO0_5_nRST"
293/*!
294 * @brief Identifier name */
295#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
296/* @} */
297
298/*!
299 * @brief Configures pin routing and optionally pin electrical features.
300 *
301 */
302void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
303
304#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
305#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
306#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
307#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
308
309/*! @name PIO0_16 (number 1), CN4[1]/CN3[15]/CN7[1]/U7[2]/PIO0_16_SCL
310 @{ */
311/*!
312 * @brief Device name: I2C0 */
313#define BOARD_INITI2CPINS_I2C_SCL_PERIPHERAL I2C0
314/*!
315 * @brief I2C0 signal: SCL */
316#define BOARD_INITI2CPINS_I2C_SCL_SIGNAL SCL
317/*!
318 * @brief PORT device name: 0U */
319#define BOARD_INITI2CPINS_I2C_SCL_PORT 0U
320/*!
321 * @brief 0U pin index: 16 */
322#define BOARD_INITI2CPINS_I2C_SCL_PIN 16U
323/*!
324 * @brief Pin name */
325#define BOARD_INITI2CPINS_I2C_SCL_PIN_NAME PIO0_16
326/*!
327 * @brief Label */
328#define BOARD_INITI2CPINS_I2C_SCL_LABEL "CN4[1]/CN3[15]/CN7[1]/U7[2]/PIO0_16_SCL"
329/*!
330 * @brief Identifier name */
331#define BOARD_INITI2CPINS_I2C_SCL_NAME "I2C_SCL"
332/* @} */
333
334/*! @name PIO0_10 (number 10), CN4[10]/CN3[16]/CN7[2]/U7[1]/PIO0_10_SDA
335 @{ */
336/*!
337 * @brief Device name: I2C0 */
338#define BOARD_INITI2CPINS_I2C_SDA_PERIPHERAL I2C0
339/*!
340 * @brief I2C0 signal: SDA */
341#define BOARD_INITI2CPINS_I2C_SDA_SIGNAL SDA
342/*!
343 * @brief PORT device name: 0U */
344#define BOARD_INITI2CPINS_I2C_SDA_PORT 0U
345/*!
346 * @brief 0U pin index: 10 */
347#define BOARD_INITI2CPINS_I2C_SDA_PIN 10U
348/*!
349 * @brief Pin name */
350#define BOARD_INITI2CPINS_I2C_SDA_PIN_NAME PIO0_10
351/*!
352 * @brief Label */
353#define BOARD_INITI2CPINS_I2C_SDA_LABEL "CN4[10]/CN3[16]/CN7[2]/U7[1]/PIO0_10_SDA"
354/*!
355 * @brief Identifier name */
356#define BOARD_INITI2CPINS_I2C_SDA_NAME "I2C_SDA"
357/* @} */
358
359/*!
360 * @brief Configures pin routing and optionally pin electrical features.
361 *
362 */
363void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */
364
365#define IOCON_PIO_HYS_EN 0x20u /*!<@brief Enable hysteresis */
366#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
367#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
368#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
369
370/*! @name PIO0_8 (number 14), CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1
371 @{ */
372/*!
373 * @brief Device name: GPIO */
374#define BOARD_INITBUTTONSPINS_User_PB3_PERIPHERAL GPIO
375/*!
376 * @brief GPIO signal: PIO0 */
377#define BOARD_INITBUTTONSPINS_User_PB3_SIGNAL PIO0
378/*!
379 * @brief GPIO device name: GPIO */
380#define BOARD_INITBUTTONSPINS_User_PB3_GPIO GPIO
381/*!
382 * @brief PIO0 pin index: 8 */
383#define BOARD_INITBUTTONSPINS_User_PB3_GPIO_PIN 8U
384/*!
385 * @brief PORT device name: 0U */
386#define BOARD_INITBUTTONSPINS_User_PB3_PORT 0U
387/*!
388 * @brief 0U pin index: 8 */
389#define BOARD_INITBUTTONSPINS_User_PB3_PIN 8U
390/*!
391 * @brief GPIO PIO0 channel: 8 */
392#define BOARD_INITBUTTONSPINS_User_PB3_CHANNEL 8
393/*!
394 * @brief Pin name */
395#define BOARD_INITBUTTONSPINS_User_PB3_PIN_NAME PIO0_8
396/*!
397 * @brief Label */
398#define BOARD_INITBUTTONSPINS_User_PB3_LABEL "CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1"
399/*!
400 * @brief Identifier name */
401#define BOARD_INITBUTTONSPINS_User_PB3_NAME "User_PB3"
402/*!
403 * @brief Direction */
404#define BOARD_INITBUTTONSPINS_User_PB3_DIRECTION kPIN_MUX_DirectionInput
405/* @} */
406
407/*! @name PIO0_12 (number 4), CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3
408 @{ */
409/*!
410 * @brief Device name: GPIO */
411#define BOARD_INITBUTTONSPINS_ISP_PB1_PERIPHERAL GPIO
412/*!
413 * @brief GPIO signal: PIO0 */
414#define BOARD_INITBUTTONSPINS_ISP_PB1_SIGNAL PIO0
415/*!
416 * @brief GPIO device name: GPIO */
417#define BOARD_INITBUTTONSPINS_ISP_PB1_GPIO GPIO
418/*!
419 * @brief PIO0 pin index: 12 */
420#define BOARD_INITBUTTONSPINS_ISP_PB1_GPIO_PIN 12U
421/*!
422 * @brief PORT device name: 0U */
423#define BOARD_INITBUTTONSPINS_ISP_PB1_PORT 0U
424/*!
425 * @brief 0U pin index: 12 */
426#define BOARD_INITBUTTONSPINS_ISP_PB1_PIN 12U
427/*!
428 * @brief GPIO PIO0 channel: 12 */
429#define BOARD_INITBUTTONSPINS_ISP_PB1_CHANNEL 12
430/*!
431 * @brief Pin name */
432#define BOARD_INITBUTTONSPINS_ISP_PB1_PIN_NAME PIO0_12
433/*!
434 * @brief Label */
435#define BOARD_INITBUTTONSPINS_ISP_PB1_LABEL "CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3"
436/*!
437 * @brief Identifier name */
438#define BOARD_INITBUTTONSPINS_ISP_PB1_NAME "ISP_PB1"
439/*!
440 * @brief Direction */
441#define BOARD_INITBUTTONSPINS_ISP_PB1_DIRECTION kPIN_MUX_DirectionInput
442/* @} */
443
444/*!
445 * @brief Configures pin routing and optionally pin electrical features.
446 *
447 */
448void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */
449
450#if defined(__cplusplus)
451}
452#endif
453
454/*!
455 * @}
456 */
457#endif /* _PIN_MUX_H_ */
458
459/***********************************************************************************************************************
460 * EOF
461 **********************************************************************************************************************/
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 01:04:27 +0100