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1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#ifndef _PIN_MUX_H_
14#define _PIN_MUX_H_
15
16/***********************************************************************************************************************
17 * Definitions
18 **********************************************************************************************************************/
19
20/*! @brief Direction type */
21typedef enum _pin_mux_direction
22{
23 kPIN_MUX_DirectionInput = 0U, /* Input direction */
24 kPIN_MUX_DirectionOutput = 1U, /* Output direction */
25 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
26} pin_mux_direction_t;
27
28/*!
29 * @addtogroup pin_mux
30 * @{
31 */
32
33/***********************************************************************************************************************
34 * API
35 **********************************************************************************************************************/
36
37#if defined(__cplusplus)
38extern "C" {
39#endif
40
41/*!
42 * @brief Calls initialization functions.
43 *
44 */
45void BOARD_InitBootPins(void);
46
47/*!
48 * @brief Configures pin routing and optionally pin electrical features.
49 *
50 */
51void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
52
53#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
54#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
55#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
56#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
57#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
58#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
59
60/*! @name PIO0_16 (number 10), P1[14]/J1[9]/P2[44]/D1[3]/PIO0_16-BLUE
61 @{ */
62/*!
63 * @brief Device name: GPIO */
64#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
65/*!
66 * @brief GPIO signal: PIO0 */
67#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
68/*!
69 * @brief GPIO device name: GPIO */
70#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
71/*!
72 * @brief PIO0 pin index: 16 */
73#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 16U
74/*!
75 * @brief PORT device name: 0U */
76#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
77/*!
78 * @brief 0U pin index: 16 */
79#define BOARD_INITLEDSPINS_LED_BLUE_PIN 16U
80/*!
81 * @brief GPIO PIO0 channel: 16 */
82#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 16
83/*!
84 * @brief Pin name */
85#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_16
86/*!
87 * @brief Label */
88#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "P1[14]/J1[9]/P2[44]/D1[3]/PIO0_16-BLUE"
89/*!
90 * @brief Identifier name */
91#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
92/*!
93 * @brief Direction */
94#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
95/* @} */
96
97/*! @name PIO0_17 (number 1), P1[12]/J1[10]/P2[43]/D1[4]/PIO0_17-GREEN
98 @{ */
99/*!
100 * @brief Device name: GPIO */
101#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
102/*!
103 * @brief GPIO signal: PIO0 */
104#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
105/*!
106 * @brief GPIO device name: GPIO */
107#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
108/*!
109 * @brief PIO0 pin index: 17 */
110#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 17U
111/*!
112 * @brief PORT device name: 0U */
113#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
114/*!
115 * @brief 0U pin index: 17 */
116#define BOARD_INITLEDSPINS_LED_GREEN_PIN 17U
117/*!
118 * @brief GPIO PIO0 channel: 17 */
119#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 17
120/*!
121 * @brief Pin name */
122#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_17
123/*!
124 * @brief Label */
125#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "P1[12]/J1[10]/P2[43]/D1[4]/PIO0_17-GREEN"
126/*!
127 * @brief Identifier name */
128#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
129/*!
130 * @brief Direction */
131#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
132/* @} */
133
134/*! @name PIO0_7 (number 17), P1[13]/J2[1]/P2[45]/D1[1]/PIO0_7-RED
135 @{ */
136/*!
137 * @brief Device name: GPIO */
138#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
139/*!
140 * @brief GPIO signal: PIO0 */
141#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
142/*!
143 * @brief GPIO device name: GPIO */
144#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
145/*!
146 * @brief PIO0 pin index: 7 */
147#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 7U
148/*!
149 * @brief PORT device name: 0U */
150#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
151/*!
152 * @brief 0U pin index: 7 */
153#define BOARD_INITLEDSPINS_LED_RED_PIN 7U
154/*!
155 * @brief GPIO PIO0 channel: 7 */
156#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 7
157/*!
158 * @brief Pin name */
159#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_7
160/*!
161 * @brief Label */
162#define BOARD_INITLEDSPINS_LED_RED_LABEL "P1[13]/J2[1]/P2[45]/D1[1]/PIO0_7-RED"
163/*!
164 * @brief Identifier name */
165#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
166/*!
167 * @brief Direction */
168#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
169/* @} */
170
171/*!
172 * @brief Configures pin routing and optionally pin electrical features.
173 *
174 */
175void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
176
177#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
178#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
179#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
180#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
181#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
182#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
183
184/*! @name PIO0_6 (number 18), P2[13]/J2[6]/TARGET_TX-PIO0_6
185 @{ */
186/*!
187 * @brief Device name: USART0 */
188#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
189/*!
190 * @brief USART0 signal: TXD */
191#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
192/*!
193 * @brief PORT device name: 0U */
194#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
195/*!
196 * @brief 0U pin index: 6 */
197#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 6U
198/*!
199 * @brief Pin name */
200#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_6
201/*!
202 * @brief Label */
203#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "P2[13]/J2[6]/TARGET_TX-PIO0_6"
204/*!
205 * @brief Identifier name */
206#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
207/* @} */
208
209/*! @name PIO0_1 (number 12), U4[13]/TARGET_RX-PIO0_1
210 @{ */
211/*!
212 * @brief Device name: USART0 */
213#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
214/*!
215 * @brief USART0 signal: RXD */
216#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
217/*!
218 * @brief PORT device name: 0U */
219#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
220/*!
221 * @brief 0U pin index: 1 */
222#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 1U
223/*!
224 * @brief Pin name */
225#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_1
226/*!
227 * @brief Label */
228#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "U4[13]/TARGET_RX-PIO0_1"
229/*!
230 * @brief Identifier name */
231#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
232/* @} */
233
234/*!
235 * @brief Configures pin routing and optionally pin electrical features.
236 *
237 */
238void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
239
240#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
241#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
242#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
243#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
244#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
245#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
246
247/*! @name SWCLK (number 6), P3[4]/P2[24]/U2[16]/TARGET_SWCLK-PIO0_3
248 @{ */
249/*!
250 * @brief Device name: SWD */
251#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PERIPHERAL SWD
252/*!
253 * @brief SWD signal: SWCLK */
254#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_SIGNAL SWCLK
255/*!
256 * @brief Pin name */
257#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN_NAME SWCLK
258/*!
259 * @brief Label */
260#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_LABEL "P3[4]/P2[24]/U2[16]/TARGET_SWCLK-PIO0_3"
261/*!
262 * @brief Identifier name */
263#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_NAME "DEBUG_SWD_SWCLK"
264/* @} */
265
266/*! @name SWDIO (number 7), P3[2]/P2[19]/U2[17]/TARGET_SWDIO-PIO0_2
267 @{ */
268/*!
269 * @brief Device name: SWD */
270#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
271/*!
272 * @brief SWD signal: SWDIO */
273#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
274/*!
275 * @brief Pin name */
276#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
277/*!
278 * @brief Label */
279#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "P3[2]/P2[19]/U2[17]/TARGET_SWDIO-PIO0_2"
280/*!
281 * @brief Identifier name */
282#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
283/* @} */
284
285/*! @name RESETN (number 4), P3[10]/U4[3]/J8[3]/P2[4]/U2[3]/SW1[1]/TARGET_nRESET-PIO0_5
286 @{ */
287/*!
288 * @brief Device name: SYSCON */
289#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
290/*!
291 * @brief SYSCON signal: RESETN */
292#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
293/*!
294 * @brief Pin name */
295#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
296/*!
297 * @brief Label */
298#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "P3[10]/U4[3]/J8[3]/P2[4]/U2[3]/SW1[1]/TARGET_nRESET-PIO0_5"
299/*!
300 * @brief Identifier name */
301#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
302/* @} */
303
304/*!
305 * @brief Configures pin routing and optionally pin electrical features.
306 *
307 */
308void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
309
310#if defined(__cplusplus)
311}
312#endif
313
314/*!
315 * @}
316 */
317#endif /* _PIN_MUX_H_ */
318
319/***********************************************************************************************************************
320 * EOF
321 **********************************************************************************************************************/
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 08:00:17 +0100