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-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.c41
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.h141
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.c146
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.h92
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.c41
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.h141
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.c144
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.h87
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.c23
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.h23
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.c405
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.h408
12 files changed, 1692 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.c
new file mode 100644
index 000000000..6041f4d71
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2018 NXP
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#include <stdint.h>
9#include "fsl_common.h"
10#include "clock_config.h"
11#include "board.h"
12#include "fsl_debug_console.h"
13
14/*******************************************************************************
15 * Variables
16 ******************************************************************************/
17
18/* Clock rate on the CLKIN pin */
19const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
20
21/*******************************************************************************
22 * Code
23 ******************************************************************************/
24/* Initialize debug console. */
25status_t BOARD_InitDebugConsole(void)
26{
27#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
28 status_t result;
29 /* Enable clock of uart0. */
30 CLOCK_EnableClock(kCLOCK_Uart0);
31 /* Ser DIV of uart0. */
32 CLOCK_SetClkDivider(kCLOCK_DivUsartClk, 1U);
33 RESET_PeripheralReset(BOARD_DEBUG_USART_RST);
34 result = DbgConsole_Init(BOARD_DEBUG_USART_INSTANCE, BOARD_DEBUG_USART_BAUDRATE, BOARD_DEBUG_USART_TYPE,
35 BOARD_DEBUG_USART_CLK_FREQ);
36 assert(kStatus_Success == result);
37 return result;
38#else
39 return kStatus_Success;
40#endif
41}
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.h
new file mode 100644
index 000000000..d2c91b99c
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/board.h
@@ -0,0 +1,141 @@
1/*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2018 NXP
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _BOARD_H_
9#define _BOARD_H_
10
11#include "clock_config.h"
12#include "fsl_common.h"
13#include "fsl_gpio.h"
14
15/*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18/*! @brief The board name */
19#define BOARD_NAME "LPCXPRESSO824MAX"
20
21#define BOARD_EXTCLKINRATE (0)
22
23/*! @brief The UART to use for debug messages. */
24#define BOARD_DEBUG_USART_TYPE kSerialPort_Uart
25#define BOARD_DEBUG_USART_BASEADDR (uint32_t) USART0
26#define BOARD_DEBUG_USART_INSTANCE 0U
27#define BOARD_DEBUG_USART_CLK_FREQ CLOCK_GetMainClkFreq()
28#define BOARD_DEBUG_USART_CLK_ATTACH kUART0_Clk_From_MainClk
29#define BOARD_DEBUG_USART_RST kUART0_RST_N_SHIFT_RSTn
30#define BOARD_USART_IRQ USART0_IRQn
31#define BOARD_USART_IRQ_HANDLER USART0_IRQHandler
32
33#ifndef BOARD_DEBUG_USART_BAUDRATE
34#define BOARD_DEBUG_USART_BAUDRATE 9600
35#endif /* BOARD_DEBUG_UART_BAUDRATE */
36
37/*! @brief Board led mapping */
38#define LOGIC_LED_ON 0U
39#define LOGIC_LED_OFF 1U
40
41#ifndef BOARD_SW1_GPIO
42#define BOARD_SW1_GPIO GPIO
43#endif
44#define BOARD_SW1_GPIO_PORT 0U
45#ifndef BOARD_SW1_GPIO_PIN
46#define BOARD_SW1_GPIO_PIN 4U
47#endif
48#define BOARD_SW1_NAME "SW1"
49#define BOARD_SW1_IRQ PIN_INT0_IRQn
50#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
51
52/* LED_GREEN */
53#ifndef BOARD_LED_GREEN_GPIO
54#define BOARD_LED_GREEN_GPIO GPIO
55#endif
56#define BOARD_LED_GREEN_GPIO_PORT 0U
57#ifndef BOARD_LED_GREEN_GPIO_PIN
58#define BOARD_LED_GREEN_GPIO_PIN 16U
59#endif
60
61#define LED_GREEN_INIT(output) \
62 GPIO_PortInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT); \
63 GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
64 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
65#define LED_GREEN_ON() \
66 GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
67 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN \ \ \ \
68 */
69#define LED_GREEN_OFF() \
70 GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
71 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN \ \ \ \
72 */
73#define LED_GREEN_TOGGLE() \
74 GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
75 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
76
77/* LED_BLUE */
78#ifndef BOARD_LED_BLUE_GPIO
79#define BOARD_LED_BLUE_GPIO GPIO
80#endif
81#define BOARD_LED_BLUE_GPIO_PORT 0U
82#ifndef BOARD_LED_BLUE_GPIO_PIN
83#define BOARD_LED_BLUE_GPIO_PIN 27U
84#endif
85
86#define LED_BLUE_INIT(output) \
87 GPIO_PortInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT); \
88 GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
89 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
90#define LED_BLUE_ON() \
91 GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
92 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE \ \ \ \
93 */
94#define LED_BLUE_OFF() \
95 GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
96 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE \ \ \ \
97 */
98#define LED_BLUE_TOGGLE() \
99 GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
100 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
101
102/* LED_RED */
103#ifndef BOARD_LED_RED_GPIO
104#define BOARD_LED_RED_GPIO GPIO
105#endif
106#define BOARD_LED_RED_GPIO_PORT 0U
107#ifndef BOARD_LED_RED_GPIO_PIN
108#define BOARD_LED_RED_GPIO_PIN 12U
109#endif
110
111#define LED_RED_INIT(output) \
112 GPIO_PortInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT); \
113 GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, \
114 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
115#define LED_RED_ON() \
116 GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
117 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED \ \ \ \
118 */
119#define LED_RED_OFF() \
120 GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
121 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED \ \ \ \
122 */
123#define LED_RED_TOGGLE() \
124 GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
125 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
126
127#if defined(__cplusplus)
128extern "C" {
129#endif /* __cplusplus */
130
131/*******************************************************************************
132 * API
133 ******************************************************************************/
134
135status_t BOARD_InitDebugConsole(void);
136
137#if defined(__cplusplus)
138}
139#endif /* __cplusplus */
140
141#endif /* _BOARD_H_ */
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.c
new file mode 100644
index 000000000..1d864a794
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.c
@@ -0,0 +1,146 @@
1/*
2 * Copyright 2018,2019 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8/*
9 * How to set up clock using clock driver functions:
10 *
11 * 1. Setup clock sources.
12 *
13 * 2. Set up all dividers.
14 *
15 * 3. Set up all selectors to provide selected clocks.
16 */
17
18/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
19!!GlobalInfo
20product: Clocks v7.0
21processor: LPC824
22package_id: LPC824M201JHI33
23mcu_data: ksdk2_0
24processor_version: 0.7.1
25board: LPCXpresso824
26 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
27
28#include "fsl_power.h"
29#include "fsl_clock.h"
30#include "clock_config.h"
31
32/*******************************************************************************
33 * Definitions
34 ******************************************************************************/
35
36/*******************************************************************************
37 * Variables
38 ******************************************************************************/
39/* System clock frequency. */
40extern uint32_t SystemCoreClock;
41
42/*******************************************************************************
43 ************************ BOARD_InitBootClocks function ************************
44 ******************************************************************************/
45void BOARD_InitBootClocks(void)
46{
47 BOARD_BootClockIRC12M();
48}
49
50/*******************************************************************************
51 ******************** Configuration BOARD_BootClockIRC12M **********************
52 ******************************************************************************/
53/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
54!!Configuration
55name: BOARD_BootClockIRC12M
56called_from_default_init: true
57outputs:
58- {id: ADC_clock.outFreq, value: 12 MHz}
59- {id: I2C0_clock.outFreq, value: 12 MHz}
60- {id: I2C1_clock.outFreq, value: 12 MHz}
61- {id: I2C2_clock.outFreq, value: 12 MHz}
62- {id: I2C3_clock.outFreq, value: 12 MHz}
63- {id: LowPower_clock.outFreq, value: 10 kHz}
64- {id: SPI0_clock.outFreq, value: 12 MHz}
65- {id: SPI1_clock.outFreq, value: 12 MHz}
66- {id: SYSPLL_clock.outFreq, value: 12 MHz}
67- {id: System_clock.outFreq, value: 12 MHz}
68- {id: divto750k_clock.outFreq, value: 750 kHz}
69settings:
70- {id: SYSCON.M_MULT.scale, value: '1', locked: true}
71- {id: SYSCON.N_DIV.scale, value: '1', locked: true}
72 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
73
74/*******************************************************************************
75 * Variables for BOARD_BootClockIRC12M configuration
76 ******************************************************************************/
77/*******************************************************************************
78 * Code for BOARD_BootClockIRC12M configuration
79 ******************************************************************************/
80void BOARD_BootClockIRC12M(void)
81{
82 /*!< Set up the clock sources */
83 /*!< Set up IRC */
84 POWER_DisablePD(kPDRUNCFG_PD_IRC_OUT); /*!< Ensure IRC OUT is on */
85 POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
86 POWER_DisablePD(kPDRUNCFG_PD_SYSOSC); /*!< Ensure SYSOSC is on */
87 CLOCK_Select(kSYSPLL_From_Irc); /*!< set IRC to pll select */
88 clock_sys_pll_t config;
89 config.src = kCLOCK_SysPllSrcIrc; /*!< set pll src */
90 config.targetFreq = 12000000U; /*!< set pll target freq */
91 CLOCK_InitSystemPll(&config); /*!< set parameters */
92 CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcIrc); /*!< select irc for main clock */
93 CLOCK_Select(kCLKOUT_From_Irc); /*!< select IRC for CLKOUT */
94 CLOCK_SetCoreSysClkDiv(1U);
95 /*!< Set SystemCoreClock variable. */
96 SystemCoreClock = BOARD_BOOTCLOCKIRC12M_CORE_CLOCK;
97}
98
99/*******************************************************************************
100 ******************** Configuration BOARD_BootClockPll24M **********************
101 ******************************************************************************/
102/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
103!!Configuration
104name: BOARD_BootClockPll24M
105outputs:
106- {id: ADC_clock.outFreq, value: 24 MHz}
107- {id: I2C0_clock.outFreq, value: 24 MHz}
108- {id: I2C1_clock.outFreq, value: 24 MHz}
109- {id: I2C2_clock.outFreq, value: 24 MHz}
110- {id: I2C3_clock.outFreq, value: 24 MHz}
111- {id: LowPower_clock.outFreq, value: 10 kHz}
112- {id: SPI0_clock.outFreq, value: 24 MHz}
113- {id: SPI1_clock.outFreq, value: 24 MHz}
114- {id: SYSPLL_clock.outFreq, value: 24 MHz}
115- {id: System_clock.outFreq, value: 24 MHz}
116- {id: divto750k_clock.outFreq, value: 750 kHz}
117settings:
118- {id: SYSCON.MAINCLKSEL.sel, value: SYSCON.PLL}
119- {id: SYSCON.M_MULT.scale, value: '2', locked: true}
120- {id: SYSCON.N_DIV.scale, value: '1', locked: true}
121 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
122
123/*******************************************************************************
124 * Variables for BOARD_BootClockPll24M configuration
125 ******************************************************************************/
126/*******************************************************************************
127 * Code for BOARD_BootClockPll24M configuration
128 ******************************************************************************/
129void BOARD_BootClockPll24M(void)
130{
131 /*!< Set up the clock sources */
132 /*!< Set up IRC */
133 POWER_DisablePD(kPDRUNCFG_PD_IRC_OUT); /*!< Ensure IRC OUT is on */
134 POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
135 POWER_DisablePD(kPDRUNCFG_PD_SYSOSC); /*!< Ensure SYSOSC is on */
136 CLOCK_Select(kSYSPLL_From_Irc); /*!< set IRC to pll select */
137 clock_sys_pll_t config;
138 config.src = kCLOCK_SysPllSrcIrc; /*!< set pll src */
139 config.targetFreq = 24000000U; /*!< set pll target freq */
140 CLOCK_InitSystemPll(&config); /*!< set parameters */
141 CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcSysPll); /*!< select syspll for main clock */
142 CLOCK_Select(kCLKOUT_From_Irc); /*!< select IRC for CLKOUT */
143 CLOCK_SetCoreSysClkDiv(1U);
144 /*!< Set SystemCoreClock variable. */
145 SystemCoreClock = BOARD_BOOTCLOCKPLL24M_CORE_CLOCK;
146}
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.h
new file mode 100644
index 000000000..c5351de51
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/clock_config.h
@@ -0,0 +1,92 @@
1/*
2 * Copyright 2018,2019 NXP
3 * All rights reserved.
4 *
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#ifndef _CLOCK_CONFIG_H_
14#define _CLOCK_CONFIG_H_
15
16#include "fsl_common.h"
17
18/*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21#define BOARD_XTAL0_CLK_HZ 12000000U /*!< Board xtal0 frequency in Hz */
22#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
23
24/*******************************************************************************
25 ************************ BOARD_InitBootClocks function ************************
26 ******************************************************************************/
27
28#if defined(__cplusplus)
29extern "C" {
30#endif /* __cplusplus*/
31
32/*!
33 * @brief This function executes default configuration of clocks.
34 *
35 */
36void BOARD_InitBootClocks(void);
37
38#if defined(__cplusplus)
39}
40#endif /* __cplusplus*/
41
42/*******************************************************************************
43 ******************** Configuration BOARD_BootClockIRC12M **********************
44 ******************************************************************************/
45/*******************************************************************************
46 * Definitions for BOARD_BootClockIRC12M configuration
47 ******************************************************************************/
48#define BOARD_BOOTCLOCKIRC12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
49
50/*******************************************************************************
51 * API for BOARD_BootClockIRC12M configuration
52 ******************************************************************************/
53#if defined(__cplusplus)
54extern "C" {
55#endif /* __cplusplus*/
56
57/*!
58 * @brief This function executes configuration of clocks.
59 *
60 */
61void BOARD_BootClockIRC12M(void);
62
63#if defined(__cplusplus)
64}
65#endif /* __cplusplus*/
66
67/*******************************************************************************
68 ******************** Configuration BOARD_BootClockPll24M **********************
69 ******************************************************************************/
70/*******************************************************************************
71 * Definitions for BOARD_BootClockPll24M configuration
72 ******************************************************************************/
73#define BOARD_BOOTCLOCKPLL24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */
74
75/*******************************************************************************
76 * API for BOARD_BootClockPll24M configuration
77 ******************************************************************************/
78#if defined(__cplusplus)
79extern "C" {
80#endif /* __cplusplus*/
81
82/*!
83 * @brief This function executes configuration of clocks.
84 *
85 */
86void BOARD_BootClockPll24M(void);
87
88#if defined(__cplusplus)
89}
90#endif /* __cplusplus*/
91
92#endif /* _CLOCK_CONFIG_H_ */
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.c
new file mode 100644
index 000000000..6041f4d71
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.c
@@ -0,0 +1,41 @@
1/*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2018 NXP
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#include <stdint.h>
9#include "fsl_common.h"
10#include "clock_config.h"
11#include "board.h"
12#include "fsl_debug_console.h"
13
14/*******************************************************************************
15 * Variables
16 ******************************************************************************/
17
18/* Clock rate on the CLKIN pin */
19const uint32_t ExtClockIn = BOARD_EXTCLKINRATE;
20
21/*******************************************************************************
22 * Code
23 ******************************************************************************/
24/* Initialize debug console. */
25status_t BOARD_InitDebugConsole(void)
26{
27#if ((SDK_DEBUGCONSOLE == DEBUGCONSOLE_REDIRECT_TO_SDK) || defined(SDK_DEBUGCONSOLE_UART))
28 status_t result;
29 /* Enable clock of uart0. */
30 CLOCK_EnableClock(kCLOCK_Uart0);
31 /* Ser DIV of uart0. */
32 CLOCK_SetClkDivider(kCLOCK_DivUsartClk, 1U);
33 RESET_PeripheralReset(BOARD_DEBUG_USART_RST);
34 result = DbgConsole_Init(BOARD_DEBUG_USART_INSTANCE, BOARD_DEBUG_USART_BAUDRATE, BOARD_DEBUG_USART_TYPE,
35 BOARD_DEBUG_USART_CLK_FREQ);
36 assert(kStatus_Success == result);
37 return result;
38#else
39 return kStatus_Success;
40#endif
41}
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.h
new file mode 100644
index 000000000..d2c91b99c
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/board.h
@@ -0,0 +1,141 @@
1/*
2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
3 * Copyright 2016-2018 NXP
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _BOARD_H_
9#define _BOARD_H_
10
11#include "clock_config.h"
12#include "fsl_common.h"
13#include "fsl_gpio.h"
14
15/*******************************************************************************
16 * Definitions
17 ******************************************************************************/
18/*! @brief The board name */
19#define BOARD_NAME "LPCXPRESSO824MAX"
20
21#define BOARD_EXTCLKINRATE (0)
22
23/*! @brief The UART to use for debug messages. */
24#define BOARD_DEBUG_USART_TYPE kSerialPort_Uart
25#define BOARD_DEBUG_USART_BASEADDR (uint32_t) USART0
26#define BOARD_DEBUG_USART_INSTANCE 0U
27#define BOARD_DEBUG_USART_CLK_FREQ CLOCK_GetMainClkFreq()
28#define BOARD_DEBUG_USART_CLK_ATTACH kUART0_Clk_From_MainClk
29#define BOARD_DEBUG_USART_RST kUART0_RST_N_SHIFT_RSTn
30#define BOARD_USART_IRQ USART0_IRQn
31#define BOARD_USART_IRQ_HANDLER USART0_IRQHandler
32
33#ifndef BOARD_DEBUG_USART_BAUDRATE
34#define BOARD_DEBUG_USART_BAUDRATE 9600
35#endif /* BOARD_DEBUG_UART_BAUDRATE */
36
37/*! @brief Board led mapping */
38#define LOGIC_LED_ON 0U
39#define LOGIC_LED_OFF 1U
40
41#ifndef BOARD_SW1_GPIO
42#define BOARD_SW1_GPIO GPIO
43#endif
44#define BOARD_SW1_GPIO_PORT 0U
45#ifndef BOARD_SW1_GPIO_PIN
46#define BOARD_SW1_GPIO_PIN 4U
47#endif
48#define BOARD_SW1_NAME "SW1"
49#define BOARD_SW1_IRQ PIN_INT0_IRQn
50#define BOARD_SW1_IRQ_HANDLER PIN_INT0_IRQHandler
51
52/* LED_GREEN */
53#ifndef BOARD_LED_GREEN_GPIO
54#define BOARD_LED_GREEN_GPIO GPIO
55#endif
56#define BOARD_LED_GREEN_GPIO_PORT 0U
57#ifndef BOARD_LED_GREEN_GPIO_PIN
58#define BOARD_LED_GREEN_GPIO_PIN 16U
59#endif
60
61#define LED_GREEN_INIT(output) \
62 GPIO_PortInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT); \
63 GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN, \
64 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
65#define LED_GREEN_ON() \
66 GPIO_PortClear(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
67 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN \ \ \ \
68 */
69#define LED_GREEN_OFF() \
70 GPIO_PortSet(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
71 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN \ \ \ \
72 */
73#define LED_GREEN_TOGGLE() \
74 GPIO_PortToggle(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PORT, \
75 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
76
77/* LED_BLUE */
78#ifndef BOARD_LED_BLUE_GPIO
79#define BOARD_LED_BLUE_GPIO GPIO
80#endif
81#define BOARD_LED_BLUE_GPIO_PORT 0U
82#ifndef BOARD_LED_BLUE_GPIO_PIN
83#define BOARD_LED_BLUE_GPIO_PIN 27U
84#endif
85
86#define LED_BLUE_INIT(output) \
87 GPIO_PortInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT); \
88 GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
89 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
90#define LED_BLUE_ON() \
91 GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
92 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE \ \ \ \
93 */
94#define LED_BLUE_OFF() \
95 GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
96 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE \ \ \ \
97 */
98#define LED_BLUE_TOGGLE() \
99 GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
100 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
101
102/* LED_RED */
103#ifndef BOARD_LED_RED_GPIO
104#define BOARD_LED_RED_GPIO GPIO
105#endif
106#define BOARD_LED_RED_GPIO_PORT 0U
107#ifndef BOARD_LED_RED_GPIO_PIN
108#define BOARD_LED_RED_GPIO_PIN 12U
109#endif
110
111#define LED_RED_INIT(output) \
112 GPIO_PortInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT); \
113 GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN, \
114 &(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}); /*!< Enable target LED_GREEN */
115#define LED_RED_ON() \
116 GPIO_PortClear(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
117 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED \ \ \ \
118 */
119#define LED_RED_OFF() \
120 GPIO_PortSet(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
121 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED \ \ \ \
122 */
123#define LED_RED_TOGGLE() \
124 GPIO_PortToggle(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PORT, \
125 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
126
127#if defined(__cplusplus)
128extern "C" {
129#endif /* __cplusplus */
130
131/*******************************************************************************
132 * API
133 ******************************************************************************/
134
135status_t BOARD_InitDebugConsole(void);
136
137#if defined(__cplusplus)
138}
139#endif /* __cplusplus */
140
141#endif /* _BOARD_H_ */
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.c
new file mode 100644
index 000000000..4d838f171
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.c
@@ -0,0 +1,144 @@
1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/*
9 * How to set up clock using clock driver functions:
10 *
11 * 1. Setup clock sources.
12 *
13 * 2. Set up all dividers.
14 *
15 * 3. Set up all selectors to provide selected clocks.
16 */
17
18/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
19!!GlobalInfo
20product: Clocks v4.1
21processor: LPC824
22package_id: LPC824M201JHI33
23mcu_data: ksdk2_0
24processor_version: 4.0.1
25board: LPCXpresso824
26 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
27
28#include "fsl_power.h"
29#include "fsl_clock.h"
30#include "clock_config.h"
31
32/*******************************************************************************
33 * Definitions
34 ******************************************************************************/
35
36/*******************************************************************************
37 * Variables
38 ******************************************************************************/
39/* System clock frequency. */
40extern uint32_t SystemCoreClock;
41
42/*******************************************************************************
43 ************************ BOARD_InitBootClocks function ************************
44 ******************************************************************************/
45void BOARD_InitBootClocks(void)
46{
47 BOARD_BootClockIRC12M();
48}
49
50/*******************************************************************************
51 ******************** Configuration BOARD_BootClockIRC12M **********************
52 ******************************************************************************/
53/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
54!!Configuration
55name: BOARD_BootClockIRC12M
56called_from_default_init: true
57outputs:
58- {id: ADC_clock.outFreq, value: 12 MHz}
59- {id: I2C0_clock.outFreq, value: 12 MHz}
60- {id: I2C1_clock.outFreq, value: 12 MHz}
61- {id: I2C2_clock.outFreq, value: 12 MHz}
62- {id: I2C3_clock.outFreq, value: 12 MHz}
63- {id: LowPower_clock.outFreq, value: 10 kHz}
64- {id: SPI0_clock.outFreq, value: 12 MHz}
65- {id: SPI1_clock.outFreq, value: 12 MHz}
66- {id: SYSPLL_clock.outFreq, value: 12 MHz}
67- {id: System_clock.outFreq, value: 12 MHz}
68- {id: divto750k_clock.outFreq, value: 750 kHz}
69settings:
70- {id: SYSCON.M_MULT.scale, value: '1', locked: true}
71- {id: SYSCON.N_DIV.scale, value: '1', locked: true}
72 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
73
74/*******************************************************************************
75 * Variables for BOARD_BootClockIRC12M configuration
76 ******************************************************************************/
77/*******************************************************************************
78 * Code for BOARD_BootClockIRC12M configuration
79 ******************************************************************************/
80void BOARD_BootClockIRC12M(void)
81{
82 /*!< Set up the clock sources */
83 /*!< Set up IRC */
84 POWER_DisablePD(kPDRUNCFG_PD_IRC_OUT); /*!< Ensure IRC OUT is on */
85 POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
86 CLOCK_Select(kSYSPLL_From_Irc); /*!< set IRC to pll select */
87 clock_sys_pll_t config;
88 config.src = kCLOCK_SysPllSrcIrc; /*!< set pll src */
89 config.targetFreq = 12000000U; /*!< set pll target freq */
90 CLOCK_InitSystemPll(&config); /*!< set parameters */
91 CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcIrc); /*!< select irc for main clock */
92 CLOCK_Select(kCLKOUT_From_Irc); /*!< select IRC for CLKOUT */
93 CLOCK_SetCoreSysClkDiv(1U);
94 /*!< Set SystemCoreClock variable. */
95 SystemCoreClock = BOARD_BOOTCLOCKIRC12M_CORE_CLOCK;
96}
97
98/*******************************************************************************
99 ******************** Configuration BOARD_BootClockPll24M **********************
100 ******************************************************************************/
101/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
102!!Configuration
103name: BOARD_BootClockPll24M
104outputs:
105- {id: ADC_clock.outFreq, value: 24 MHz}
106- {id: I2C0_clock.outFreq, value: 24 MHz}
107- {id: I2C1_clock.outFreq, value: 24 MHz}
108- {id: I2C2_clock.outFreq, value: 24 MHz}
109- {id: I2C3_clock.outFreq, value: 24 MHz}
110- {id: LowPower_clock.outFreq, value: 10 kHz}
111- {id: SPI0_clock.outFreq, value: 24 MHz}
112- {id: SPI1_clock.outFreq, value: 24 MHz}
113- {id: SYSPLL_clock.outFreq, value: 24 MHz}
114- {id: System_clock.outFreq, value: 24 MHz}
115- {id: divto750k_clock.outFreq, value: 750 kHz}
116settings:
117- {id: SYSCON.MAINCLKSEL.sel, value: SYSCON.PLL}
118- {id: SYSCON.M_MULT.scale, value: '2', locked: true}
119- {id: SYSCON.N_DIV.scale, value: '1', locked: true}
120 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
121
122/*******************************************************************************
123 * Variables for BOARD_BootClockPll24M configuration
124 ******************************************************************************/
125/*******************************************************************************
126 * Code for BOARD_BootClockPll24M configuration
127 ******************************************************************************/
128void BOARD_BootClockPll24M(void)
129{
130 /*!< Set up the clock sources */
131 /*!< Set up IRC */
132 POWER_DisablePD(kPDRUNCFG_PD_IRC_OUT); /*!< Ensure IRC OUT is on */
133 POWER_DisablePD(kPDRUNCFG_PD_IRC); /*!< Ensure IRC is on */
134 CLOCK_Select(kSYSPLL_From_Irc); /*!< set IRC to pll select */
135 clock_sys_pll_t config;
136 config.src = kCLOCK_SysPllSrcIrc; /*!< set pll src */
137 config.targetFreq = 24000000U; /*!< set pll target freq */
138 CLOCK_InitSystemPll(&config); /*!< set parameters */
139 CLOCK_SetMainClkSrc(kCLOCK_MainClkSrcSysPll); /*!< select syspll for main clock */
140 CLOCK_Select(kCLKOUT_From_Irc); /*!< select IRC for CLKOUT */
141 CLOCK_SetCoreSysClkDiv(1U);
142 /*!< Set SystemCoreClock variable. */
143 SystemCoreClock = BOARD_BOOTCLOCKPLL24M_CORE_CLOCK;
144}
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.h
new file mode 100644
index 000000000..a540dace5
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/clock_config.h
@@ -0,0 +1,87 @@
1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _CLOCK_CONFIG_H_
9#define _CLOCK_CONFIG_H_
10
11#include "fsl_common.h"
12
13/*******************************************************************************
14 * Definitions
15 ******************************************************************************/
16#define BOARD_XTAL0_CLK_HZ 12000000U /*!< Board xtal0 frequency in Hz */
17#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
18
19/*******************************************************************************
20 ************************ BOARD_InitBootClocks function ************************
21 ******************************************************************************/
22
23#if defined(__cplusplus)
24extern "C" {
25#endif /* __cplusplus*/
26
27/*!
28 * @brief This function executes default configuration of clocks.
29 *
30 */
31void BOARD_InitBootClocks(void);
32
33#if defined(__cplusplus)
34}
35#endif /* __cplusplus*/
36
37/*******************************************************************************
38 ******************** Configuration BOARD_BootClockIRC12M **********************
39 ******************************************************************************/
40/*******************************************************************************
41 * Definitions for BOARD_BootClockIRC12M configuration
42 ******************************************************************************/
43#define BOARD_BOOTCLOCKIRC12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
44
45/*******************************************************************************
46 * API for BOARD_BootClockIRC12M configuration
47 ******************************************************************************/
48#if defined(__cplusplus)
49extern "C" {
50#endif /* __cplusplus*/
51
52/*!
53 * @brief This function executes configuration of clocks.
54 *
55 */
56void BOARD_BootClockIRC12M(void);
57
58#if defined(__cplusplus)
59}
60#endif /* __cplusplus*/
61
62/*******************************************************************************
63 ******************** Configuration BOARD_BootClockPll24M **********************
64 ******************************************************************************/
65/*******************************************************************************
66 * Definitions for BOARD_BootClockPll24M configuration
67 ******************************************************************************/
68#define BOARD_BOOTCLOCKPLL24M_CORE_CLOCK 24000000U /*!< Core clock frequency: 24000000Hz */
69
70/*******************************************************************************
71 * API for BOARD_BootClockPll24M configuration
72 ******************************************************************************/
73#if defined(__cplusplus)
74extern "C" {
75#endif /* __cplusplus*/
76
77/*!
78 * @brief This function executes configuration of clocks.
79 *
80 */
81void BOARD_BootClockPll24M(void);
82
83#if defined(__cplusplus)
84}
85#endif /* __cplusplus*/
86
87#endif /* _CLOCK_CONFIG_H_ */
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.c
new file mode 100644
index 000000000..69af4a74c
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.c
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2017-2018 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
9!!GlobalInfo
10product: Peripherals v1.0
11 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
12
13/*******************************************************************************
14 * Included files
15 ******************************************************************************/
16#include "peripherals.h"
17
18/*******************************************************************************
19 * BOARD_InitBootPeripherals function
20 ******************************************************************************/
21void BOARD_InitBootPeripherals(void)
22{
23}
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.h
new file mode 100644
index 000000000..673214777
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/peripherals.h
@@ -0,0 +1,23 @@
1/*
2 * Copyright 2017-2018 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _PERIPHERALS_H_
9#define _PERIPHERALS_H_
10
11#if defined(__cplusplus)
12extern "C" {
13#endif /*_cplusplus. */
14 /*******************************************************************************
15 * BOARD_InitBootPeripherals function
16 ******************************************************************************/
17void BOARD_InitBootPeripherals(void);
18
19#if defined(__cplusplus)
20}
21#endif /*_cplusplus. */
22
23#endif /* _PERIPHERALS_H_ */
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.c b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.c
new file mode 100644
index 000000000..d8fb06242
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.c
@@ -0,0 +1,405 @@
1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13/* clang-format off */
14/*
15 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16!!GlobalInfo
17product: Pins v4.1
18processor: LPC824
19package_id: LPC824M201JHI33
20mcu_data: ksdk2_0
21processor_version: 4.0.1
22board: LPCXpresso824
23pin_labels:
24- {pin_num: '11', pin_signal: PIO0_27, label: 'D1[3]/P3[42]/J1[9]/P0_27-BLUE', identifier: LED_BLUE}
25- {pin_num: '10', pin_signal: PIO0_16, label: 'D1[4]/P3[43]/J2[2]/P0_16-GREEN', identifier: LED_GREEN}
26- {pin_num: '2', pin_signal: PIO0_12, label: 'SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP', identifier: LED_RED;SW2}
27- {pin_num: '22', pin_signal: PIO0_7/ADC_0, label: 'P3[14]/U2[31]/TARGET_TX-P0_7', identifier: DEBUG_UART_TX}
28- {pin_num: '31', pin_signal: PIO0_18/ADC_8, label: 'P3[21]/J2[4]/U2[32]/TARGET_RX-P0_18', identifier: DEBUG_UART_RX}
29- {pin_num: '6', pin_signal: SWCLK/PIO0_3, label: 'P5[4]/U2[16]/TARGET_SWCLK', identifier: DEBUG_SWD_SWDCLK}
30- {pin_num: '7', pin_signal: SWDIO/PIO0_2, label: 'P5[2]/U2[17]/TARGET_SWDIO', identifier: DEBUG_SWD_SWDIO}
31- {pin_num: '3', pin_signal: RESETN/PIO0_5, label: 'J4[3]/P3[4]/U2[3]/P5[10]/SW3[1]/TARGET_nRESET-P0_5', identifier: DEBUG_SWD_RESETN}
32- {pin_num: '4', pin_signal: PIO0_4/ADC_11, label: 'SW1/P3[9]/J2[7]/P0_4-ISP_U_TXD-WAKEUP', identifier: SW1}
33- {pin_num: '1', pin_signal: PIO0_13/ADC_10, label: 'P4[2]/P3[46]/J1[10]/P0_13'}
34- {pin_num: '5', pin_signal: PIO0_28, label: 'P3[44]/J2[3]/P0_28-WKTCLKIN'}
35- {pin_num: '8', pin_signal: PIO0_11/I2C0_SDA, label: 'P3[40]/J1[2]/P4[8]/P0_11-I2C0_SDA'}
36- {pin_num: '9', pin_signal: PIO0_10/I2C0_SCL, label: 'P3[41]/J1[1]/P4[6]/P0_10-I2C0_SCL'}
37- {pin_num: '12', pin_signal: PIO0_26, label: 'P3[5]/J1[7]/P4[3]/P0_26-MOSI'}
38- {pin_num: '13', pin_signal: PIO0_25, label: 'P3[6]/J1[6]/P4[5]/P0_25-MISO'}
39- {pin_num: '14', pin_signal: PIO0_24, label: 'P3[7]/J1[5]/P4[7]/P0_24-SCK'}
40- {pin_num: '15', pin_signal: PIO0_15, label: 'P3[8]/J1[8]/P4[1]/P0_15-SSEL'}
41- {pin_num: '16', pin_signal: PIO0_1/ACMP_I2/CLKIN, label: 'P3[11]/P0_1-CLKIN'}
42- {pin_num: '17', pin_signal: PIO0_9/XTALOUT, label: 'P3[12]/U2[26]/P0_9-LINK_nWAKE'}
43- {pin_num: '18', pin_signal: PIO0_8/XTALIN, label: 'P3[13]/U2[27]/P0_8-LINK_nSLEEP'}
44- {pin_num: '23', pin_signal: PIO0_6/ADC_1/VDDCMP, label: 'P3[15]/J5[1]/P0_6-ADC1-VDDCMP'}
45- {pin_num: '24', pin_signal: PIO0_0/ACMP_I1, label: 'P3[10]/J2[8]/P0_0-ISP_U_RXD'}
46- {pin_num: '25', pin_signal: PIO0_14/ACMP_I3/ADC_2, label: 'P3[16]/J5[2]/P0_14-ADC2-ACMP_I3'}
47- {pin_num: '26', pin_signal: PIO0_23/ADC_3/ACMP_I4, label: 'P3[17]/J5[3]/P0_23-ADC3-ACMP_I4'}
48- {pin_num: '27', pin_signal: PIO0_22/ADC_4, label: 'P3[18]/J5[4]/P0_22-ADC4'}
49- {pin_num: '28', pin_signal: PIO0_21/ADC_5, label: 'P3[19]/J5[5]/P0_21-ADC5'}
50- {pin_num: '29', pin_signal: PIO0_20/ADC_6, label: 'P3[20]/J5[6]/P0_20-ADC6'}
51- {pin_num: '30', pin_signal: PIO0_19/ADC_7, label: 'P3[22]/J2[6]/P0_19'}
52- {pin_num: '32', pin_signal: PIO0_17/ADC_9, label: 'P4[4]/P3[47]/J2[1]/P0_17'}
53- {pin_num: '19', pin_signal: VDD, label: C11/C12/FB4/VDD}
54- {pin_num: '21', pin_signal: VREFP, label: C13/FB3/VREFP}
55- {pin_num: '20', pin_signal: VREFN, label: FB2/VREFN}
56 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
57 */
58/* clang-format on */
59
60#include "fsl_common.h"
61#include "fsl_iocon.h"
62#include "fsl_swm.h"
63#include "pin_mux.h"
64
65/* FUNCTION ************************************************************************************************************
66 *
67 * Function Name : BOARD_InitBootPins
68 * Description : Calls initialization functions.
69 *
70 * END ****************************************************************************************************************/
71void BOARD_InitBootPins(void)
72{
73 BOARD_InitPins();
74 BOARD_InitDEBUG_UARTPins();
75}
76
77/* clang-format off */
78/*
79 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
80BOARD_InitPins:
81- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
82- pin_list: []
83 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
84 */
85/* clang-format on */
86
87/* FUNCTION ************************************************************************************************************
88 *
89 * Function Name : BOARD_InitPins
90 * Description : Configures pin routing and optionally pin electrical features.
91 *
92 * END ****************************************************************************************************************/
93/* Function assigned for the Cortex-M0P */
94void BOARD_InitPins(void)
95{
96}
97
98/* clang-format off */
99/*
100 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
101BOARD_InitLEDsPins:
102- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
103- pin_list:
104 - {pin_num: '11', peripheral: GPIO, signal: 'PIO0, 27', pin_signal: PIO0_27, direction: OUTPUT, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled,
105 smode: bypass, clkdiv: div0}
106 - {pin_num: '10', peripheral: GPIO, signal: 'PIO0, 16', pin_signal: PIO0_16, direction: OUTPUT, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled,
107 smode: bypass, clkdiv: div0}
108 - {pin_num: '2', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: LED_RED, direction: OUTPUT, mode: pullUp, invert: disabled, hysteresis: disabled,
109 opendrain: disabled, smode: bypass, clkdiv: div0}
110 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
111 */
112/* clang-format on */
113
114/* FUNCTION ************************************************************************************************************
115 *
116 * Function Name : BOARD_InitLEDsPins
117 * Description : Configures pin routing and optionally pin electrical features.
118 *
119 * END ****************************************************************************************************************/
120/* Function assigned for the Cortex-M0P */
121void BOARD_InitLEDsPins(void)
122{
123 /* Enables clock for IOCON block.: 0x01u */
124 CLOCK_EnableClock(kCLOCK_Iocon);
125
126 GPIO->DIR[0] = ((GPIO->DIR[0] &
127 /* Mask bits to zero which are setting */
128 (~(GPIO_DIR_DIRP_MASK)))
129
130 /* Selects pin direction for pin PIOm_n (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins
131 * depends on the specific device and package. 0 = input. 1 = output.: 0x08011000u */
132 | GPIO_DIR_DIRP(0x08011000u));
133
134 const uint32_t pio2_config = (/* Selects pull-up function */
135 IOCON_PIO_MODE_PULLUP |
136 /* Disable hysteresis */
137 IOCON_PIO_HYS_DI |
138 /* Input not invert */
139 IOCON_PIO_INV_DI |
140 /* Disables Open-drain function */
141 IOCON_PIO_OD_DI |
142 /* Bypass input filter */
143 IOCON_PIO_SMODE_BYPASS |
144 /* IOCONCLKDIV0 */
145 IOCON_PIO_CLKDIV0);
146 /* PORT2 PIN (coords: ) is configured as */
147 IOCON_PinMuxSet(IOCON, 2, pio2_config);
148
149 const uint32_t pio21_config = (/* Selects pull-up function */
150 IOCON_PIO_MODE_PULLUP |
151 /* Disable hysteresis */
152 IOCON_PIO_HYS_DI |
153 /* Input not invert */
154 IOCON_PIO_INV_DI |
155 /* Disables Open-drain function */
156 IOCON_PIO_OD_DI |
157 /* Bypass input filter */
158 IOCON_PIO_SMODE_BYPASS |
159 /* IOCONCLKDIV0 */
160 IOCON_PIO_CLKDIV0);
161 /* PORT2 PIN1 (coords: ) is configured as */
162 IOCON_PinMuxSet(IOCON, 21, pio21_config);
163
164 const uint32_t pio9_config = (/* Selects pull-up function */
165 IOCON_PIO_MODE_PULLUP |
166 /* Disable hysteresis */
167 IOCON_PIO_HYS_DI |
168 /* Input not invert */
169 IOCON_PIO_INV_DI |
170 /* Disables Open-drain function */
171 IOCON_PIO_OD_DI |
172 /* Bypass input filter */
173 IOCON_PIO_SMODE_BYPASS |
174 /* IOCONCLKDIV0 */
175 IOCON_PIO_CLKDIV0);
176 /* PORT9 PIN (coords: ) is configured as */
177 IOCON_PinMuxSet(IOCON, 9, pio9_config);
178}
179
180/* clang-format off */
181/*
182 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
183BOARD_InitDEBUG_UARTPins:
184- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
185- pin_list:
186 - {pin_num: '22', peripheral: USART0, signal: TXD, pin_signal: PIO0_7/ADC_0, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled, smode: bypass,
187 clkdiv: div0}
188 - {pin_num: '31', peripheral: USART0, signal: RXD, pin_signal: PIO0_18/ADC_8, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled, smode: bypass,
189 clkdiv: div0}
190 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
191 */
192/* clang-format on */
193
194/* FUNCTION ************************************************************************************************************
195 *
196 * Function Name : BOARD_InitDEBUG_UARTPins
197 * Description : Configures pin routing and optionally pin electrical features.
198 *
199 * END ****************************************************************************************************************/
200/* Function assigned for the Cortex-M0P */
201void BOARD_InitDEBUG_UARTPins(void)
202{
203 /* Enables clock for IOCON block.: 0x01u */
204 CLOCK_EnableClock(kCLOCK_Iocon);
205 /* Enables clock for switch matrix.: 0x01u */
206 CLOCK_EnableClock(kCLOCK_Swm);
207
208 const uint32_t pio15_config = (/* Selects pull-up function */
209 IOCON_PIO_MODE_PULLUP |
210 /* Disable hysteresis */
211 IOCON_PIO_HYS_DI |
212 /* Input not invert */
213 IOCON_PIO_INV_DI |
214 /* Disables Open-drain function */
215 IOCON_PIO_OD_DI |
216 /* Bypass input filter */
217 IOCON_PIO_SMODE_BYPASS |
218 /* IOCONCLKDIV0 */
219 IOCON_PIO_CLKDIV0);
220 /* PORT1 PIN5 (coords: ) is configured as */
221 IOCON_PinMuxSet(IOCON, 15, pio15_config);
222
223 const uint32_t pio30_config = (/* Selects pull-up function */
224 IOCON_PIO_MODE_PULLUP |
225 /* Disable hysteresis */
226 IOCON_PIO_HYS_DI |
227 /* Input not invert */
228 IOCON_PIO_INV_DI |
229 /* Disables Open-drain function */
230 IOCON_PIO_OD_DI |
231 /* Bypass input filter */
232 IOCON_PIO_SMODE_BYPASS |
233 /* IOCONCLKDIV0 */
234 IOCON_PIO_CLKDIV0);
235 /* PORT3 PIN0 (coords: ) is configured as */
236 IOCON_PinMuxSet(IOCON, 30, pio30_config);
237
238 /* USART0_TXD connect to P0_7 */
239 SWM_SetMovablePinSelect(SWM0, kSWM_USART0_TXD, kSWM_PortPin_P0_7);
240
241 /* USART0_RXD connect to P0_18 */
242 SWM_SetMovablePinSelect(SWM0, kSWM_USART0_RXD, kSWM_PortPin_P0_18);
243
244 /* Disable clock for switch matrix. */
245 CLOCK_DisableClock(kCLOCK_Swm);
246}
247
248/* clang-format off */
249/*
250 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
251BOARD_InitSWD_DEBUGPins:
252- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
253- pin_list:
254 - {pin_num: '6', peripheral: SWD, signal: SWCLK, pin_signal: SWCLK/PIO0_3, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled, smode: bypass,
255 clkdiv: div0}
256 - {pin_num: '7', peripheral: SWD, signal: SWDIO, pin_signal: SWDIO/PIO0_2, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled, smode: bypass,
257 clkdiv: div0}
258 - {pin_num: '3', peripheral: SYSCON, signal: RESETN, pin_signal: RESETN/PIO0_5, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled, smode: bypass,
259 clkdiv: div0}
260 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
261 */
262/* clang-format on */
263
264/* FUNCTION ************************************************************************************************************
265 *
266 * Function Name : BOARD_InitSWD_DEBUGPins
267 * Description : Configures pin routing and optionally pin electrical features.
268 *
269 * END ****************************************************************************************************************/
270/* Function assigned for the Cortex-M0P */
271void BOARD_InitSWD_DEBUGPins(void)
272{
273 /* Enables clock for IOCON block.: 0x01u */
274 CLOCK_EnableClock(kCLOCK_Iocon);
275 /* Enables clock for switch matrix.: 0x01u */
276 CLOCK_EnableClock(kCLOCK_Swm);
277
278 const uint32_t pio3_config = (/* Selects pull-up function */
279 IOCON_PIO_MODE_PULLUP |
280 /* Disable hysteresis */
281 IOCON_PIO_HYS_DI |
282 /* Input not invert */
283 IOCON_PIO_INV_DI |
284 /* Disables Open-drain function */
285 IOCON_PIO_OD_DI |
286 /* Bypass input filter */
287 IOCON_PIO_SMODE_BYPASS |
288 /* IOCONCLKDIV0 */
289 IOCON_PIO_CLKDIV0);
290 /* PORT3 PIN (coords: ) is configured as */
291 IOCON_PinMuxSet(IOCON, 3, pio3_config);
292
293 const uint32_t pio5_config = (/* Selects pull-up function */
294 IOCON_PIO_MODE_PULLUP |
295 /* Disable hysteresis */
296 IOCON_PIO_HYS_DI |
297 /* Input not invert */
298 IOCON_PIO_INV_DI |
299 /* Disables Open-drain function */
300 IOCON_PIO_OD_DI |
301 /* Bypass input filter */
302 IOCON_PIO_SMODE_BYPASS |
303 /* IOCONCLKDIV0 */
304 IOCON_PIO_CLKDIV0);
305 /* PORT5 PIN (coords: ) is configured as */
306 IOCON_PinMuxSet(IOCON, 5, pio5_config);
307
308 const uint32_t pio6_config = (/* Selects pull-up function */
309 IOCON_PIO_MODE_PULLUP |
310 /* Disable hysteresis */
311 IOCON_PIO_HYS_DI |
312 /* Input not invert */
313 IOCON_PIO_INV_DI |
314 /* Disables Open-drain function */
315 IOCON_PIO_OD_DI |
316 /* Bypass input filter */
317 IOCON_PIO_SMODE_BYPASS |
318 /* IOCONCLKDIV0 */
319 IOCON_PIO_CLKDIV0);
320 /* PORT6 PIN (coords: ) is configured as */
321 IOCON_PinMuxSet(IOCON, 6, pio6_config);
322
323 /* SWCLK connect to P0_3 */
324 SWM_SetFixedPinSelect(SWM0, kSWM_SWCLK, true);
325
326 /* SWDIO connect to P0_2 */
327 SWM_SetFixedPinSelect(SWM0, kSWM_SWDIO, true);
328
329 /* RESETN connect to P0_5 */
330 SWM_SetFixedPinSelect(SWM0, kSWM_RESETN, true);
331
332 /* Disable clock for switch matrix. */
333 CLOCK_DisableClock(kCLOCK_Swm);
334}
335
336/* clang-format off */
337/*
338 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
339BOARD_InitBUTTONsPins:
340- options: {callFromInitBoot: 'false', coreID: core0, enableClock: 'true'}
341- pin_list:
342 - {pin_num: '4', peripheral: GPIO, signal: 'PIO0, 4', pin_signal: PIO0_4/ADC_11, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: disabled, opendrain: disabled,
343 smode: bypass, clkdiv: div0}
344 - {pin_num: '2', peripheral: GPIO, signal: 'PIO0, 12', pin_signal: PIO0_12, identifier: SW2, direction: INPUT, mode: pullUp, invert: disabled, hysteresis: disabled,
345 opendrain: disabled, smode: bypass, clkdiv: div0}
346 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
347 */
348/* clang-format on */
349
350/* FUNCTION ************************************************************************************************************
351 *
352 * Function Name : BOARD_InitBUTTONsPins
353 * Description : Configures pin routing and optionally pin electrical features.
354 *
355 * END ****************************************************************************************************************/
356/* Function assigned for the Cortex-M0P */
357void BOARD_InitBUTTONsPins(void)
358{
359 /* Enables clock for IOCON block.: 0x01u */
360 CLOCK_EnableClock(kCLOCK_Iocon);
361
362 GPIO->DIR[0] = ((GPIO->DIR[0] &
363 /* Mask bits to zero which are setting */
364 (~(GPIO_DIR_DIRP_MASK)))
365
366 /* Selects pin direction for pin PIOm_n (bit 0 = PIOn_0, bit 1 = PIOn_1, etc.). Supported pins
367 * depends on the specific device and package. 0 = input. 1 = output.: 0x00u */
368 | GPIO_DIR_DIRP(0x00u));
369
370 const uint32_t pio2_config = (/* Selects pull-up function */
371 IOCON_PIO_MODE_PULLUP |
372 /* Disable hysteresis */
373 IOCON_PIO_HYS_DI |
374 /* Input not invert */
375 IOCON_PIO_INV_DI |
376 /* Disables Open-drain function */
377 IOCON_PIO_OD_DI |
378 /* Bypass input filter */
379 IOCON_PIO_SMODE_BYPASS |
380 /* IOCONCLKDIV0 */
381 IOCON_PIO_CLKDIV0);
382 /* PORT2 PIN (coords: ) is configured as */
383 IOCON_PinMuxSet(IOCON, 2, pio2_config);
384
385 const uint32_t pio4_config = (/* Selects pull-up function */
386 IOCON_PIO_MODE_PULLUP |
387 /* Disable hysteresis */
388 IOCON_PIO_HYS_DI |
389 /* Input not invert */
390 IOCON_PIO_INV_DI |
391 /* Disables Open-drain function */
392 IOCON_PIO_OD_DI |
393 /* Bypass input filter */
394 IOCON_PIO_SMODE_BYPASS |
395 /* IOCONCLKDIV0 */
396 IOCON_PIO_CLKDIV0);
397 /* PORT4 PIN (coords: ) is configured as */
398 IOCON_PinMuxSet(IOCON, 4, pio4_config);
399
400 /* Disable clock for switch matrix. */
401 CLOCK_DisableClock(kCLOCK_Swm);
402}
403/***********************************************************************************************************************
404 * EOF
405 **********************************************************************************************************************/
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.h
new file mode 100644
index 000000000..11b927cc8
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/lpcxpresso824max/project_template/pin_mux.h
@@ -0,0 +1,408 @@
1/*
2 * Copyright 2018 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13#ifndef _PIN_MUX_H_
14#define _PIN_MUX_H_
15
16/***********************************************************************************************************************
17 * Definitions
18 **********************************************************************************************************************/
19
20/*! @brief Direction type */
21typedef enum _pin_mux_direction
22{
23 kPIN_MUX_DirectionInput = 0U, /* Input direction */
24 kPIN_MUX_DirectionOutput = 1U, /* Output direction */
25 kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
26} pin_mux_direction_t;
27
28/*!
29 * @addtogroup pin_mux
30 * @{
31 */
32
33/***********************************************************************************************************************
34 * API
35 **********************************************************************************************************************/
36
37#if defined(__cplusplus)
38extern "C" {
39#endif
40
41/*!
42 * @brief Calls initialization functions.
43 *
44 */
45void BOARD_InitBootPins(void);
46
47/*!
48 * @brief Configures pin routing and optionally pin electrical features.
49 *
50 */
51void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */
52
53#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
54#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
55#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
56#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
57#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
58#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
59
60/*! @name PIO0_27 (number 11), D1[3]/P3[42]/J1[9]/P0_27-BLUE
61 @{ */
62/*!
63 * @brief Device name: GPIO */
64#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
65/*!
66 * @brief GPIO signal: PIO0 */
67#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
68/*!
69 * @brief GPIO device name: GPIO */
70#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
71/*!
72 * @brief PIO0 pin index: 27 */
73#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 27U
74/*!
75 * @brief PORT device name: 0U */
76#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
77/*!
78 * @brief 0U pin index: 27 */
79#define BOARD_INITLEDSPINS_LED_BLUE_PIN 27U
80/*!
81 * @brief GPIO PIO0 channel: 27 */
82#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 27
83/*!
84 * @brief Pin name */
85#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_27
86/*!
87 * @brief Label */
88#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "D1[3]/P3[42]/J1[9]/P0_27-BLUE"
89/*!
90 * @brief Identifier name */
91#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
92/*!
93 * @brief Direction */
94#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
95/* @} */
96
97/*! @name PIO0_16 (number 10), D1[4]/P3[43]/J2[2]/P0_16-GREEN
98 @{ */
99/*!
100 * @brief Device name: GPIO */
101#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
102/*!
103 * @brief GPIO signal: PIO0 */
104#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
105/*!
106 * @brief GPIO device name: GPIO */
107#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
108/*!
109 * @brief PIO0 pin index: 16 */
110#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 16U
111/*!
112 * @brief PORT device name: 0U */
113#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
114/*!
115 * @brief 0U pin index: 16 */
116#define BOARD_INITLEDSPINS_LED_GREEN_PIN 16U
117/*!
118 * @brief GPIO PIO0 channel: 16 */
119#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 16
120/*!
121 * @brief Pin name */
122#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_16
123/*!
124 * @brief Label */
125#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "D1[4]/P3[43]/J2[2]/P0_16-GREEN"
126/*!
127 * @brief Identifier name */
128#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
129/*!
130 * @brief Direction */
131#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
132/* @} */
133
134/*! @name PIO0_12 (number 2), SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP
135 @{ */
136/*!
137 * @brief Device name: GPIO */
138#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
139/*!
140 * @brief GPIO signal: PIO0 */
141#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
142/*!
143 * @brief GPIO device name: GPIO */
144#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
145/*!
146 * @brief PIO0 pin index: 12 */
147#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U
148/*!
149 * @brief PORT device name: 0U */
150#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
151/*!
152 * @brief 0U pin index: 12 */
153#define BOARD_INITLEDSPINS_LED_RED_PIN 12U
154/*!
155 * @brief GPIO PIO0 channel: 12 */
156#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 12
157/*!
158 * @brief Pin name */
159#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_12
160/*!
161 * @brief Label */
162#define BOARD_INITLEDSPINS_LED_RED_LABEL "SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP"
163/*!
164 * @brief Identifier name */
165#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
166/*!
167 * @brief Direction */
168#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
169/* @} */
170
171/*!
172 * @brief Configures pin routing and optionally pin electrical features.
173 *
174 */
175void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */
176
177#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
178#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
179#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
180#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
181#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
182#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
183
184/*! @name PIO0_7 (number 22), P3[14]/U2[31]/TARGET_TX-P0_7
185 @{ */
186/*!
187 * @brief Device name: USART0 */
188#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
189/*!
190 * @brief USART0 signal: TXD */
191#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
192/*!
193 * @brief PORT device name: 0U */
194#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
195/*!
196 * @brief 0U pin index: 7 */
197#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 7U
198/*!
199 * @brief Pin name */
200#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_7
201/*!
202 * @brief Label */
203#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "P3[14]/U2[31]/TARGET_TX-P0_7"
204/*!
205 * @brief Identifier name */
206#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
207/* @} */
208
209/*! @name PIO0_18 (number 31), P3[21]/J2[4]/U2[32]/TARGET_RX-P0_18
210 @{ */
211/*!
212 * @brief Device name: USART0 */
213#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
214/*!
215 * @brief USART0 signal: RXD */
216#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
217/*!
218 * @brief PORT device name: 0U */
219#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
220/*!
221 * @brief 0U pin index: 18 */
222#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 18U
223/*!
224 * @brief Pin name */
225#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_18
226/*!
227 * @brief Label */
228#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "P3[21]/J2[4]/U2[32]/TARGET_RX-P0_18"
229/*!
230 * @brief Identifier name */
231#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
232/* @} */
233
234/*!
235 * @brief Configures pin routing and optionally pin electrical features.
236 *
237 */
238void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */
239
240#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
241#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
242#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
243#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
244#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
245#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
246
247/*! @name SWCLK (number 6), P5[4]/U2[16]/TARGET_SWCLK
248 @{ */
249/*!
250 * @brief Device name: SWD */
251#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PERIPHERAL SWD
252/*!
253 * @brief SWD signal: SWCLK */
254#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_SIGNAL SWCLK
255/*!
256 * @brief Pin name */
257#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_NAME SWCLK
258/*!
259 * @brief Label */
260#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_LABEL "P5[4]/U2[16]/TARGET_SWCLK"
261/*!
262 * @brief Identifier name */
263#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_NAME "DEBUG_SWD_SWDCLK"
264/* @} */
265
266/*! @name SWDIO (number 7), P5[2]/U2[17]/TARGET_SWDIO
267 @{ */
268/*!
269 * @brief Device name: SWD */
270#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
271/*!
272 * @brief SWD signal: SWDIO */
273#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
274/*!
275 * @brief Pin name */
276#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
277/*!
278 * @brief Label */
279#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "P5[2]/U2[17]/TARGET_SWDIO"
280/*!
281 * @brief Identifier name */
282#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
283/* @} */
284
285/*! @name RESETN (number 3), J4[3]/P3[4]/U2[3]/P5[10]/SW3[1]/TARGET_nRESET-P0_5
286 @{ */
287/*!
288 * @brief Device name: SYSCON */
289#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
290/*!
291 * @brief SYSCON signal: RESETN */
292#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
293/*!
294 * @brief Pin name */
295#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
296/*!
297 * @brief Label */
298#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "J4[3]/P3[4]/U2[3]/P5[10]/SW3[1]/TARGET_nRESET-P0_5"
299/*!
300 * @brief Identifier name */
301#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
302/* @} */
303
304/*!
305 * @brief Configures pin routing and optionally pin electrical features.
306 *
307 */
308void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */
309
310#define IOCON_PIO_CLKDIV0 0x00u /*!<@brief IOCONCLKDIV0 */
311#define IOCON_PIO_HYS_DI 0x00u /*!<@brief Disable hysteresis */
312#define IOCON_PIO_INV_DI 0x00u /*!<@brief Input not invert */
313#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
314#define IOCON_PIO_OD_DI 0x00u /*!<@brief Disables Open-drain function */
315#define IOCON_PIO_SMODE_BYPASS 0x00u /*!<@brief Bypass input filter */
316
317/*! @name PIO0_4 (number 4), SW1/P3[9]/J2[7]/P0_4-ISP_U_TXD-WAKEUP
318 @{ */
319/*!
320 * @brief Device name: GPIO */
321#define BOARD_INITBUTTONSPINS_SW1_PERIPHERAL GPIO
322/*!
323 * @brief GPIO signal: PIO0 */
324#define BOARD_INITBUTTONSPINS_SW1_SIGNAL PIO0
325/*!
326 * @brief GPIO device name: GPIO */
327#define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO
328/*!
329 * @brief PIO0 pin index: 4 */
330#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 4U
331/*!
332 * @brief PORT device name: 0U */
333#define BOARD_INITBUTTONSPINS_SW1_PORT 0U
334/*!
335 * @brief 0U pin index: 4 */
336#define BOARD_INITBUTTONSPINS_SW1_PIN 4U
337/*!
338 * @brief GPIO PIO0 channel: 4 */
339#define BOARD_INITBUTTONSPINS_SW1_CHANNEL 4
340/*!
341 * @brief Pin name */
342#define BOARD_INITBUTTONSPINS_SW1_PIN_NAME PIO0_4
343/*!
344 * @brief Label */
345#define BOARD_INITBUTTONSPINS_SW1_LABEL "SW1/P3[9]/J2[7]/P0_4-ISP_U_TXD-WAKEUP"
346/*!
347 * @brief Identifier name */
348#define BOARD_INITBUTTONSPINS_SW1_NAME "SW1"
349/*!
350 * @brief Direction */
351#define BOARD_INITBUTTONSPINS_SW1_DIRECTION kPIN_MUX_DirectionInput
352/* @} */
353
354/*! @name PIO0_12 (number 2), SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP
355 @{ */
356/*!
357 * @brief Device name: GPIO */
358#define BOARD_INITBUTTONSPINS_SW2_PERIPHERAL GPIO
359/*!
360 * @brief GPIO signal: PIO0 */
361#define BOARD_INITBUTTONSPINS_SW2_SIGNAL PIO0
362/*!
363 * @brief GPIO device name: GPIO */
364#define BOARD_INITBUTTONSPINS_SW2_GPIO GPIO
365/*!
366 * @brief PIO0 pin index: 12 */
367#define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN 12U
368/*!
369 * @brief PORT device name: 0U */
370#define BOARD_INITBUTTONSPINS_SW2_PORT 0U
371/*!
372 * @brief 0U pin index: 12 */
373#define BOARD_INITBUTTONSPINS_SW2_PIN 12U
374/*!
375 * @brief GPIO PIO0 channel: 12 */
376#define BOARD_INITBUTTONSPINS_SW2_CHANNEL 12
377/*!
378 * @brief Pin name */
379#define BOARD_INITBUTTONSPINS_SW2_PIN_NAME PIO0_12
380/*!
381 * @brief Label */
382#define BOARD_INITBUTTONSPINS_SW2_LABEL "SW2/D1[1]/P3[45]/J2[5]/P0_12-RED-ISP"
383/*!
384 * @brief Identifier name */
385#define BOARD_INITBUTTONSPINS_SW2_NAME "SW2"
386/*!
387 * @brief Direction */
388#define BOARD_INITBUTTONSPINS_SW2_DIRECTION kPIN_MUX_DirectionInput
389/* @} */
390
391/*!
392 * @brief Configures pin routing and optionally pin electrical features.
393 *
394 */
395void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */
396
397#if defined(__cplusplus)
398}
399#endif
400
401/*!
402 * @}
403 */
404#endif /* _PIN_MUX_H_ */
405
406/***********************************************************************************************************************
407 * EOF
408 **********************************************************************************************************************/
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