diff options
Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/components/video/camera/device/mt9m114/fsl_mt9m114.h')
-rw-r--r-- | lib/chibios-contrib/ext/mcux-sdk/components/video/camera/device/mt9m114/fsl_mt9m114.h | 651 |
1 files changed, 651 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/components/video/camera/device/mt9m114/fsl_mt9m114.h b/lib/chibios-contrib/ext/mcux-sdk/components/video/camera/device/mt9m114/fsl_mt9m114.h new file mode 100644 index 000000000..2e310afe8 --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/components/video/camera/device/mt9m114/fsl_mt9m114.h | |||
@@ -0,0 +1,651 @@ | |||
1 | /* | ||
2 | * Copyright 2017-2018, 2020 NXP | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * | ||
6 | * SPDX-License-Identifier: BSD-3-Clause | ||
7 | */ | ||
8 | |||
9 | #ifndef _FSL_MT9M114_H_ | ||
10 | #define _FSL_MT9M114_H_ | ||
11 | |||
12 | #include "fsl_common.h" | ||
13 | #include "fsl_camera_device.h" | ||
14 | #include "fsl_video_i2c.h" | ||
15 | |||
16 | /* | ||
17 | * Change log: | ||
18 | * | ||
19 | * 1.0.1 | ||
20 | * - Fixed MISRA-C 2012 issues. | ||
21 | * | ||
22 | * 1.0.0 | ||
23 | * - Initial version | ||
24 | */ | ||
25 | |||
26 | /******************************************************************************* | ||
27 | * Definitions | ||
28 | ******************************************************************************/ | ||
29 | #define MT9M114_I2C_ADDR 0x48U | ||
30 | #define MT9M114_CHIP_ID 0x2481U | ||
31 | |||
32 | /*! @brief MT9M114 register definitions.*/ | ||
33 | |||
34 | /* 1.Core registers */ | ||
35 | #define MT9M114_REG_Y_ADDR_START 0x3002U | ||
36 | #define MT9M114_REG_X_ADDR_START 0x3004U | ||
37 | #define MT9M114_REG_Y_ADDR_END 0x3006U | ||
38 | #define MT9M114_REG_X_ADDR_END 0x3008U | ||
39 | #define MT9M114_REG_FRAME_LENGTH_LINES 0x300AU | ||
40 | #define MT9M114_REG_LINE_LENGTH_PCK_ 0x300CU | ||
41 | #define MT9M114_REG_COARSE_INTEGRATION_TIME 0x3012U | ||
42 | #define MT9M114_REG_FINE_INTEGRATION_TIME 0x3014U | ||
43 | #define MT9M114_REG_RESET_REGISTER 0x301AU | ||
44 | #define MT9M114_REG_FLASH 0x3046U | ||
45 | #define MT9M114_REG_FLASH_COUNT 0x3048U | ||
46 | #define MT9M114_REG_GREEN1_GAIN 0x3056U | ||
47 | #define MT9M114_REG_BLUE_GAIN 0x3058U | ||
48 | #define MT9M114_REG_RED_GAIN 0x305AU | ||
49 | #define MT9M114_REG_GREEN2_GAIN 0x305CU | ||
50 | #define MT9M114_REG_GLOBAL_GAIN 0x305EU | ||
51 | #define MT9M114_REG_FUSE_ID1 0x31F4U | ||
52 | #define MT9M114_REG_FUSE_ID2 0x31F6U | ||
53 | #define MT9M114_REG_FUSE_ID3 0x31F8U | ||
54 | #define MT9M114_REG_FUSE_ID4 0x31FAU | ||
55 | #define MT9M114_REG_CHAIN_CONTROL 0x31FCU | ||
56 | #define MT9M114_REG_CUSTOMER_REV 0x31FEU | ||
57 | |||
58 | /* 2.SOC1 registers */ | ||
59 | #define MT9M114_REG_COLOR_PIPELINE_CONTROL 0x3210U | ||
60 | |||
61 | /* 3.SOC2 registers */ | ||
62 | #define MT9M114_REG_P_G1_P0Q0 0x3640U | ||
63 | #define MT9M114_REG_P_G1_P0Q1 0x3642U | ||
64 | #define MT9M114_REG_P_G1_P0Q2 0x3644U | ||
65 | #define MT9M114_REG_P_G1_P0Q3 0x3646U | ||
66 | #define MT9M114_REG_P_G1_P0Q4 0x3648U | ||
67 | #define MT9M114_REG_P_R_P0Q0 0x364AU | ||
68 | #define MT9M114_REG_P_R_P0Q1 0x364CU | ||
69 | #define MT9M114_REG_P_R_P0Q2 0x364EU | ||
70 | #define MT9M114_REG_P_R_P0Q3 0x3650U | ||
71 | #define MT9M114_REG_P_R_P0Q4 0x3652U | ||
72 | #define MT9M114_REG_P_B_P0Q0 0x3654U | ||
73 | #define MT9M114_REG_P_B_P0Q1 0x3656U | ||
74 | #define MT9M114_REG_P_B_P0Q2 0x3658U | ||
75 | #define MT9M114_REG_P_B_P0Q3 0x365AU | ||
76 | #define MT9M114_REG_P_B_P0Q4 0x365CU | ||
77 | #define MT9M114_REG_P_G2_P0Q0 0x365EU | ||
78 | #define MT9M114_REG_P_G2_P0Q1 0x3660U | ||
79 | #define MT9M114_REG_P_G2_P0Q2 0x3662U | ||
80 | #define MT9M114_REG_P_G2_P0Q3 0x3664U | ||
81 | #define MT9M114_REG_P_G2_P0Q4 0x3666U | ||
82 | #define MT9M114_REG_P_G1_P1Q0 0x3680U | ||
83 | #define MT9M114_REG_P_G1_P1Q1 0x3682U | ||
84 | #define MT9M114_REG_P_G1_P1Q2 0x3684U | ||
85 | #define MT9M114_REG_P_G1_P1Q3 0x3686U | ||
86 | #define MT9M114_REG_P_G1_P1Q4 0x3688U | ||
87 | #define MT9M114_REG_P_R_P1Q0 0x368AU | ||
88 | #define MT9M114_REG_P_R_P1Q1 0x368CU | ||
89 | #define MT9M114_REG_P_R_P1Q2 0x368EU | ||
90 | #define MT9M114_REG_P_R_P1Q3 0x3690U | ||
91 | #define MT9M114_REG_P_R_P1Q4 0x3692U | ||
92 | #define MT9M114_REG_P_B_P1Q0 0x3694U | ||
93 | #define MT9M114_REG_P_B_P1Q1 0x3696U | ||
94 | #define MT9M114_REG_P_B_P1Q2 0x3698U | ||
95 | #define MT9M114_REG_P_B_P1Q3 0x369AU | ||
96 | #define MT9M114_REG_P_B_P1Q4 0x369CU | ||
97 | #define MT9M114_REG_P_G2_P1Q0 0x369EU | ||
98 | #define MT9M114_REG_P_G2_P1Q1 0x36A0U | ||
99 | #define MT9M114_REG_P_G2_P1Q2 0x36A2U | ||
100 | #define MT9M114_REG_P_G2_P1Q3 0x36A4U | ||
101 | #define MT9M114_REG_P_G2_P1Q4 0x36A6U | ||
102 | #define MT9M114_REG_P_G1_P2Q0 0x36C0U | ||
103 | #define MT9M114_REG_P_G1_P2Q1 0x36C2U | ||
104 | #define MT9M114_REG_P_G1_P2Q2 0x36C4U | ||
105 | #define MT9M114_REG_P_G1_P2Q3 0x36C6U | ||
106 | #define MT9M114_REG_P_G1_P2Q4 0x36C8U | ||
107 | #define MT9M114_REG_P_R_P2Q0 0x36CAU | ||
108 | #define MT9M114_REG_P_R_P2Q1 0x36CCU | ||
109 | #define MT9M114_REG_P_R_P2Q2 0x36CEU | ||
110 | #define MT9M114_REG_P_R_P2Q3 0x36D0U | ||
111 | #define MT9M114_REG_P_R_P2Q4 0x36D2U | ||
112 | #define MT9M114_REG_P_B_P2Q0 0x36D4U | ||
113 | #define MT9M114_REG_P_B_P2Q1 0x36D6U | ||
114 | #define MT9M114_REG_P_B_P2Q2 0x36D8U | ||
115 | #define MT9M114_REG_P_B_P2Q3 0x36DAU | ||
116 | #define MT9M114_REG_P_B_P2Q4 0x36DCU | ||
117 | #define MT9M114_REG_P_G2_P2Q0 0x36DEU | ||
118 | #define MT9M114_REG_P_G2_P2Q1 0x36E0U | ||
119 | #define MT9M114_REG_P_G2_P2Q2 0x36E2U | ||
120 | #define MT9M114_REG_P_G2_P2Q3 0x36E4U | ||
121 | #define MT9M114_REG_P_G2_P2Q4 0x36E6U | ||
122 | #define MT9M114_REG_P_G1_P3Q0 0x3700U | ||
123 | #define MT9M114_REG_P_G1_P3Q1 0x3702U | ||
124 | #define MT9M114_REG_P_G1_P3Q2 0x3704U | ||
125 | #define MT9M114_REG_P_G1_P3Q3 0x3706U | ||
126 | #define MT9M114_REG_P_G1_P3Q4 0x3708U | ||
127 | #define MT9M114_REG_P_R_P3Q0 0x370AU | ||
128 | #define MT9M114_REG_P_R_P3Q1 0x370CU | ||
129 | #define MT9M114_REG_P_R_P3Q2 0x370EU | ||
130 | #define MT9M114_REG_P_R_P3Q3 0x3710U | ||
131 | #define MT9M114_REG_P_R_P3Q4 0x3712U | ||
132 | #define MT9M114_REG_P_B_P3Q0 0x3714U | ||
133 | #define MT9M114_REG_P_B_P3Q1 0x3716U | ||
134 | #define MT9M114_REG_P_B_P3Q2 0x3718U | ||
135 | #define MT9M114_REG_P_B_P3Q3 0x371AU | ||
136 | #define MT9M114_REG_P_B_P3Q4 0x371CU | ||
137 | #define MT9M114_REG_P_G2_P3Q0 0x371EU | ||
138 | #define MT9M114_REG_P_G2_P3Q1 0x3720U | ||
139 | #define MT9M114_REG_P_G2_P3Q2 0x3722U | ||
140 | #define MT9M114_REG_P_G2_P3Q3 0x3724U | ||
141 | #define MT9M114_REG_P_G2_P3Q4 0x3726U | ||
142 | #define MT9M114_REG_P_G1_P4Q0 0x3740U | ||
143 | #define MT9M114_REG_P_G1_P4Q1 0x3742U | ||
144 | #define MT9M114_REG_P_G1_P4Q2 0x3744U | ||
145 | #define MT9M114_REG_P_G1_P4Q3 0x3746U | ||
146 | #define MT9M114_REG_P_G1_P4Q4 0x3748U | ||
147 | #define MT9M114_REG_P_R_P4Q0 0x374AU | ||
148 | #define MT9M114_REG_P_R_P4Q1 0x374CU | ||
149 | #define MT9M114_REG_P_R_P4Q2 0x374EU | ||
150 | #define MT9M114_REG_P_R_P4Q3 0x3750U | ||
151 | #define MT9M114_REG_P_R_P4Q4 0x3752U | ||
152 | #define MT9M114_REG_P_B_P4Q0 0x3754U | ||
153 | #define MT9M114_REG_P_B_P4Q1 0x3756U | ||
154 | #define MT9M114_REG_P_B_P4Q2 0x3758U | ||
155 | #define MT9M114_REG_P_B_P4Q3 0x375AU | ||
156 | #define MT9M114_REG_P_B_P4Q4 0x375CU | ||
157 | #define MT9M114_REG_P_G2_P4Q0 0x375EU | ||
158 | #define MT9M114_REG_P_G2_P4Q1 0x3760U | ||
159 | #define MT9M114_REG_P_G2_P4Q2 0x3762U | ||
160 | #define MT9M114_REG_P_G2_P4Q3 0x3764U | ||
161 | #define MT9M114_REG_P_G2_P4Q4 0x3766U | ||
162 | #define MT9M114_REG_CENTER_ROW 0x3782U | ||
163 | #define MT9M114_REG_CENTER_COLUMN 0x3784U | ||
164 | |||
165 | /* 4.SYSCTL registers */ | ||
166 | #define MT9M114_REG_CHIP_ID 0x0000U | ||
167 | #define MT9M114_REG_CLOCKS_CONTROL 0x0016U | ||
168 | #define MT9M114_REG_RESET_AND_MISC_CONTROL 0x001AU | ||
169 | #define MT9M114_REG_PAD_SLEW 0x001EU | ||
170 | #define MT9M114_REG_USER_DEFINED_DEVICE_ADDRESS_ID 0x002EU | ||
171 | #define MT9M114_REG_PAD_CONTROL 0x0032U | ||
172 | #define MT9M114_REG_COMMAND_REGISTER 0x0080U | ||
173 | |||
174 | /* 5.XDMA registers */ | ||
175 | #define MT9M114_REG_ACCESS_CTL_STAT 0x0982U | ||
176 | #define MT9M114_REG_PHYSICAL_ADDRESS_ACCESS 0x098AU | ||
177 | #define MT9M114_REG_LOGICAL_ADDRESS_ACCESS 0x098EU | ||
178 | #define MT9M114_REG_MCU_VARIABLE_DATA0 0x0990U | ||
179 | #define MT9M114_REG_MCU_VARIABLE_DATA1 0x0992U | ||
180 | #define MT9M114_REG_MCU_VARIABLE_DATA2 0x0994U | ||
181 | #define MT9M114_REG_MCU_VARIABLE_DATA3 0x0996U | ||
182 | #define MT9M114_REG_MCU_VARIABLE_DATA4 0x0998U | ||
183 | #define MT9M114_REG_MCU_VARIABLE_DATA5 0x099AU | ||
184 | #define MT9M114_REG_MCU_VARIABLE_DATA6 0x099CU | ||
185 | #define MT9M114_REG_MCU_VARIABLE_DATA7 0x099EU | ||
186 | |||
187 | /*! @brief MT9M114 variables definitions.*/ | ||
188 | |||
189 | /* 01.Monitor variables */ | ||
190 | #define MT9M114_VAR_MON_MAJOR_VERSION 0x8000U | ||
191 | #define MT9M114_VAR_MON_MINOR_VERSION 0x8002U | ||
192 | #define MT9M114_VAR_MON_RELEASE_VERSION 0x8004U | ||
193 | #define MT9M114_VAR_MON_HEARTBEAT 0x8006U | ||
194 | |||
195 | /* 02.Sequencer variables */ | ||
196 | #define MT9M114_VAR_SEQ_ERROR_CODE 0x8406U | ||
197 | |||
198 | /* 03.AE_Rule variables */ | ||
199 | #define MT9M114_VAR_AE_RULE_ALGO 0xA404U | ||
200 | #define MT9M114_VAR_AE_RULE_AVG_Y_FROM_STATS 0xA406U | ||
201 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_0_0 0xA407U | ||
202 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_0_1 0xA408U | ||
203 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_0_2 0xA409U | ||
204 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_0_3 0xA40AU | ||
205 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_0_4 0xA40BU | ||
206 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_1_0 0xA40CU | ||
207 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_1_1 0xA40DU | ||
208 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_1_2 0xA40EU | ||
209 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_1_3 0xA40FU | ||
210 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_1_4 0xA410U | ||
211 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_2_0 0xA411U | ||
212 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_2_1 0xA412U | ||
213 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_2_2 0xA413U | ||
214 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_2_3 0xA414U | ||
215 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_2_4 0xA415U | ||
216 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_3_0 0xA416U | ||
217 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_3_1 0xA417U | ||
218 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_3_2 0xA418U | ||
219 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_3_3 0xA419U | ||
220 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_3_4 0xA41AU | ||
221 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_4_0 0xA41BU | ||
222 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_4_1 0xA41CU | ||
223 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_4_2 0xA41DU | ||
224 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_4_3 0xA41EU | ||
225 | #define MT9M114_VAR_AE_RULE_AE_WEIGHT_TABLE_4_4 0xA41FU | ||
226 | #define MT9M114_VAR_AE_RULE_AE_ADAPTIVE_STRENGTH 0xA420U | ||
227 | |||
228 | /* 04.AE_Track variables */ | ||
229 | #define MT9M114_VAR_AE_TRACK_STATUS 0xA800U | ||
230 | #define MT9M114_VAR_AE_TRACK_ALGO 0xA804U | ||
231 | #define MT9M114_VAR_AE_TRACK_TARGET_AVERAGE_LUMA 0xA807U | ||
232 | #define MT9M114_VAR_AE_TRACK_GATE_PERCENTAGE 0xA808U | ||
233 | #define MT9M114_VAR_AE_TRACK_CURRENT_AVERAGE_LUMA 0xA809U | ||
234 | #define MT9M114_VAR_AE_TRACK_AE_TRACKING_DAMPENING_SPEED 0xA80AU | ||
235 | #define MT9M114_VAR_AE_TRACK_AE_DAMPENING_SPEED 0xA80BU | ||
236 | #define MT9M114_VAR_AE_TRACK_SKIP_FRAMES_COUNTER 0xA80DU | ||
237 | #define MT9M114_VAR_AE_TRACK_CURRENT_FLICKER_LINES 0xA80EU | ||
238 | #define MT9M114_VAR_AE_TRACK_FDZONE 0xA818U | ||
239 | #define MT9M114_VAR_AE_TRACK_ZONE 0xA81BU | ||
240 | #define MT9M114_VAR_AE_TRACK_FLICKER_LINES_50HZ 0xA826U | ||
241 | #define MT9M114_VAR_AE_TRACK_VIRT_EXPOSURE_LOG 0xA828U | ||
242 | #define MT9M114_VAR_AE_TRACK_MIN_VIRT_EXPOSURE_LOG_ZONE0 0xA82AU | ||
243 | #define MT9M114_VAR_AE_TRACK_MAX_VIRT_EXPOSURE_LOG_ZONE0 0xA82CU | ||
244 | #define MT9M114_VAR_AE_TRACK_MAX_VIRT_EXPOSURE_LOG_ZONE1 0xA82EU | ||
245 | #define MT9M114_VAR_AE_TRACK_VIRT_GAIN 0xA838U | ||
246 | |||
247 | /* 05.AWB variables */ | ||
248 | #define MT9M114_VAR_AWB_STATUS 0xAC00U | ||
249 | #define MT9M114_VAR_AWB_MODE 0xAC02U | ||
250 | #define MT9M114_VAR_AWB_R_RATIO_LOWER 0xAC06U | ||
251 | #define MT9M114_VAR_AWB_R_RATIO_UPPER 0xAC07U | ||
252 | #define MT9M114_VAR_AWB_B_RATIO_LOWER 0xAC08U | ||
253 | #define MT9M114_VAR_AWB_B_RATIO_UPPER 0xAC09U | ||
254 | #define MT9M114_VAR_AWB_R_SCENE_RATIO_LOWER 0xAC0AU | ||
255 | #define MT9M114_VAR_AWB_R_SCENE_RATIO_UPPER 0xAC0BU | ||
256 | #define MT9M114_VAR_AWB_B_SCENE_RATIO_LOWER 0xAC0CU | ||
257 | #define MT9M114_VAR_AWB_B_SCENE_RATIO_UPPER 0xAC0DU | ||
258 | #define MT9M114_VAR_AWB_R_RATIO_PRE_AWB 0xAC0EU | ||
259 | #define MT9M114_VAR_AWB_B_RATIO_PRE_AWB 0xAC0FU | ||
260 | #define MT9M114_VAR_AWB_R_GAIN 0xAC12U | ||
261 | #define MT9M114_VAR_AWB_B_GAIN 0xAC14U | ||
262 | #define MT9M114_VAR_AWB_PRE_AWB_RATIOS_TRACKING_SPEED 0xAC16U | ||
263 | #define MT9M114_VAR_AWB_PIXEL_THRESHOLD_COUNT 0xAC18U | ||
264 | |||
265 | /* 06.BlackLevel variables */ | ||
266 | #define MT9M114_VAR_BLACKLEVEL_ALGO 0xB004U | ||
267 | #define MT9M114_VAR_BLACKLEVEL_MAX_BLACK_LEVEL 0xB00CU | ||
268 | #define MT9M114_VAR_BLACKLEVEL_BLACK_LEVEL_DAMPENING 0xB00DU | ||
269 | |||
270 | /* 07.CCM variables */ | ||
271 | #define MT9M114_VAR_CCM_ALGO 0xB404U | ||
272 | #define MT9M114_VAR_CCM_0 0xB406U | ||
273 | #define MT9M114_VAR_CCM_1 0xB408U | ||
274 | #define MT9M114_VAR_CCM_2 0xB40AU | ||
275 | #define MT9M114_VAR_CCM_3 0xB40CU | ||
276 | #define MT9M114_VAR_CCM_4 0xB40EU | ||
277 | #define MT9M114_VAR_CCM_5 0xB410U | ||
278 | #define MT9M114_VAR_CCM_6 0xB412U | ||
279 | #define MT9M114_VAR_CCM_7 0xB414U | ||
280 | #define MT9M114_VAR_CCM_8 0xB416U | ||
281 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_0 0xB418U | ||
282 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_1 0xB41AU | ||
283 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_2 0xB41CU | ||
284 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_3 0xB41EU | ||
285 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_4 0xB420U | ||
286 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_5 0xB422U | ||
287 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_6 0xB424U | ||
288 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_7 0xB426U | ||
289 | #define MT9M114_VAR_CCM_LL_DELTA_CCM_8 0xB428U | ||
290 | #define MT9M114_VAR_CCM_DELTA_GAIN 0xB42AU | ||
291 | #define MT9M114_VAR_CCM_DELTA_THRESH 0xB42BU | ||
292 | |||
293 | /* 08.LowLight variables */ | ||
294 | #define MT9M114_VAR_LL_MODE 0xBC02U | ||
295 | #define MT9M114_VAR_LL_ALGO 0xBC04U | ||
296 | #define MT9M114_VAR_LL_GAMMA_SELECT 0xBC07U | ||
297 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_0 0xBC0AU | ||
298 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_1 0xBC0BU | ||
299 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_2 0xBC0CU | ||
300 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_3 0xBC0DU | ||
301 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_4 0xBC0EU | ||
302 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_5 0xBC0FU | ||
303 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_6 0xBC10U | ||
304 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_7 0xBC11U | ||
305 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_8 0xBC12U | ||
306 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_9 0xBC13U | ||
307 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_10 0xBC14U | ||
308 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_11 0xBC15U | ||
309 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_12 0xBC16U | ||
310 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_13 0xBC17U | ||
311 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_14 0xBC18U | ||
312 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_15 0xBC19U | ||
313 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_16 0xBC1AU | ||
314 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_17 0xBC1BU | ||
315 | #define MT9M114_VAR_LL_GAMMA_CONTRAST_CURVE_18 0xBC1CU | ||
316 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_0 0xBC1DU | ||
317 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_1 0xBC1EU | ||
318 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_2 0xBC1FU | ||
319 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_3 0xBC20U | ||
320 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_4 0xBC21U | ||
321 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_5 0xBC22U | ||
322 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_6 0xBC23U | ||
323 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_7 0xBC24U | ||
324 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_8 0xBC25U | ||
325 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_9 0xBC26U | ||
326 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_10 0xBC27U | ||
327 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_11 0xBC28U | ||
328 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_12 0xBC29U | ||
329 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_13 0xBC2AU | ||
330 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_14 0xBC2BU | ||
331 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_15 0xBC2CU | ||
332 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_16 0xBC2DU | ||
333 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_17 0xBC2EU | ||
334 | #define MT9M114_VAR_LL_GAMMA_NRCURVE_18 0xBC2FU | ||
335 | #define MT9M114_VAR_LL_BM_PRECISION_BITS 0xBC31U | ||
336 | #define MT9M114_VAR_LL_AVERAGE_LUMA_FADE_TO_BLACK 0xBC3AU | ||
337 | #define MT9M114_VAR_LL_FADE_TO_BLACK_DAMPENING_SPEED 0xBC3CU | ||
338 | |||
339 | /* 09.CameraControl variables */ | ||
340 | #define MT9M114_VAR_CAM_SENSOR_CFG_Y_ADDR_START 0xC800U | ||
341 | #define MT9M114_VAR_CAM_SENSOR_CFG_X_ADDR_START 0xC802U | ||
342 | #define MT9M114_VAR_CAM_SENSOR_CFG_Y_ADDR_END 0xC804U | ||
343 | #define MT9M114_VAR_CAM_SENSOR_CFG_X_ADDR_END 0xC806U | ||
344 | #define MT9M114_VAR_CAM_SENSOR_CFG_PIXCLK 0xC808U | ||
345 | #define MT9M114_VAR_CAM_SENSOR_CFG_ROW_SPEED 0xC80CU | ||
346 | #define MT9M114_VAR_CAM_SENSOR_CFG_FINE_INTEG_TIME_MIN 0xC80EU | ||
347 | #define MT9M114_VAR_CAM_SENSOR_CFG_FINE_INTEG_TIME_MAX 0xC810U | ||
348 | #define MT9M114_VAR_CAM_SENSOR_CFG_FRAME_LENGTH_LINES 0xC812U | ||
349 | #define MT9M114_VAR_CAM_SENSOR_CFG_LINE_LENGTH_PCK 0xC814U | ||
350 | #define MT9M114_VAR_CAM_SENSOR_CFG_FINE_CORRECTION 0xC816U | ||
351 | #define MT9M114_VAR_CAM_SENSOR_CFG_CPIPE_LAST_ROW 0xC818U | ||
352 | #define MT9M114_VAR_CAM_SENSOR_CFG_REG_0_DATA 0xC826U | ||
353 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_READ_MODE 0xC834U | ||
354 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_ANALOG_GAIN 0xC836U | ||
355 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_VIRT_COLUMN_GAIN 0xC838U | ||
356 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_FRAME_LENGTH_LINES 0xC83AU | ||
357 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_COARSE_INTEGRATION_TIME 0xC83CU | ||
358 | #define MT9M114_VAR_CAM_SENSOR_CONTROL_FINE_INTEGRATION_TIME 0xC83EU | ||
359 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_DGAIN_RED 0xC840U | ||
360 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_DGAIN_GREEN1 0xC842U | ||
361 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_DGAIN_GREEN2 0xC844U | ||
362 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_DGAIN_BLUE 0xC846U | ||
363 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_DGAIN_SECOND 0xC848U | ||
364 | #define MT9M114_VAR_CAM_CPIPE_CONTROL_SECOND_BLACK_LEVEL 0xC84BU | ||
365 | #define MT9M114_VAR_CAM_MODE_SELECT 0xC84CU | ||
366 | #define MT9M114_VAR_CAM_MODE_TEST_PATTERN_SELECT 0xC84DU | ||
367 | #define MT9M114_VAR_CAM_MODE_TEST_PATTERN_RED 0xC84EU | ||
368 | #define MT9M114_VAR_CAM_MODE_TEST_PATTERN_GREEN 0xC850U | ||
369 | #define MT9M114_VAR_CAM_MODE_TEST_PATTERN_BLUE 0xC852U | ||
370 | #define MT9M114_VAR_CAM_CROP_WINDOW_XOFFSET 0xC854U | ||
371 | #define MT9M114_VAR_CAM_CROP_WINDOW_YOFFSET 0xC856U | ||
372 | #define MT9M114_VAR_CAM_CROP_WINDOW_WIDTH 0xC858U | ||
373 | #define MT9M114_VAR_CAM_CROP_WINDOW_HEIGHT 0xC85AU | ||
374 | #define MT9M114_VAR_CAM_CROP_CROPMODE 0xC85CU | ||
375 | #define MT9M114_VAR_CAM_SCALE_VERTICAL_TC_MODE 0xC85EU | ||
376 | #define MT9M114_VAR_CAM_SCALE_VERTICAL_TC_PERCENTAGE 0xC860U | ||
377 | #define MT9M114_VAR_CAM_SCALE_VERTICAL_TC_STRETCH_FACTOR 0xC862U | ||
378 | #define MT9M114_VAR_CAM_OUTPUT_WIDTH 0xC868U | ||
379 | #define MT9M114_VAR_CAM_OUTPUT_HEIGHT 0xC86AU | ||
380 | #define MT9M114_VAR_CAM_OUTPUT_FORMAT 0xC86CU | ||
381 | #define MT9M114_VAR_CAM_OUTPUT_FORMAT_YUV 0xC86EU | ||
382 | #define MT9M114_VAR_CAM_OUTPUT_Y_OFFSET 0xC870U | ||
383 | #define MT9M114_VAR_CAM_HUE_ANGLE 0xC873U | ||
384 | #define MT9M114_VAR_CAM_SFX_CONTROL 0xC874U | ||
385 | #define MT9M114_VAR_CAM_SFX_SOLARIZATION_THRESH 0xC875U | ||
386 | #define MT9M114_VAR_CAM_SFX_SEPIA_CR 0xC876U | ||
387 | #define MT9M114_VAR_CAM_SFX_SEPIA_CB 0xC877U | ||
388 | #define MT9M114_VAR_CAM_AET_AEMODE 0xC878U | ||
389 | #define MT9M114_VAR_CAM_AET_SKIP_FRAMES 0xC879U | ||
390 | #define MT9M114_VAR_CAM_AET_TARGET_AVERAGE_LUMA 0xC87AU | ||
391 | #define MT9M114_VAR_CAM_AET_TARGET_AVERAGE_LUMA_DARK 0xC87BU | ||
392 | #define MT9M114_VAR_CAM_AET_BLACK_CLIPPING_TARGET 0xC87CU | ||
393 | #define MT9M114_VAR_CAM_AET_AE_MIN_VIRT_INT_TIME_PCLK 0xC87EU | ||
394 | #define MT9M114_VAR_CAM_AET_AE_MIN_VIRT_DGAIN 0xC880U | ||
395 | #define MT9M114_VAR_CAM_AET_AE_MAX_VIRT_DGAIN 0xC882U | ||
396 | #define MT9M114_VAR_CAM_AET_AE_MIN_VIRT_AGAIN 0xC884U | ||
397 | #define MT9M114_VAR_CAM_AET_AE_MAX_VIRT_AGAIN 0xC886U | ||
398 | #define MT9M114_VAR_CAM_AET_AE_VIRT_GAIN_TH_EG 0xC888U | ||
399 | #define MT9M114_VAR_CAM_AET_AE_EG_GATE_PERCENTAGE 0xC88AU | ||
400 | #define MT9M114_VAR_CAM_AET_FLICKER_FREQ_HZ 0xC88BU | ||
401 | #define MT9M114_VAR_CAM_AET_MAX_FRAME_RATE 0xC88CU | ||
402 | #define MT9M114_VAR_CAM_AET_MIN_FRAME_RATE 0xC88EU | ||
403 | #define MT9M114_VAR_CAM_AET_TARGET_GAIN 0xC890U | ||
404 | #define MT9M114_VAR_CAM_AWB_CCM_L_0 0xC892U | ||
405 | #define MT9M114_VAR_CAM_AWB_CCM_L_1 0xC894U | ||
406 | #define MT9M114_VAR_CAM_AWB_CCM_L_2 0xC896U | ||
407 | #define MT9M114_VAR_CAM_AWB_CCM_L_3 0xC898U | ||
408 | #define MT9M114_VAR_CAM_AWB_CCM_L_4 0xC89AU | ||
409 | #define MT9M114_VAR_CAM_AWB_CCM_L_5 0xC89CU | ||
410 | #define MT9M114_VAR_CAM_AWB_CCM_L_6 0xC89EU | ||
411 | #define MT9M114_VAR_CAM_AWB_CCM_L_7 0xC8A0U | ||
412 | #define MT9M114_VAR_CAM_AWB_CCM_L_8 0xC8A2U | ||
413 | #define MT9M114_VAR_CAM_AWB_CCM_M_0 0xC8A4U | ||
414 | #define MT9M114_VAR_CAM_AWB_CCM_M_1 0xC8A6U | ||
415 | #define MT9M114_VAR_CAM_AWB_CCM_M_2 0xC8A8U | ||
416 | #define MT9M114_VAR_CAM_AWB_CCM_M_3 0xC8AAU | ||
417 | #define MT9M114_VAR_CAM_AWB_CCM_M_4 0xC8ACU | ||
418 | #define MT9M114_VAR_CAM_AWB_CCM_M_5 0xC8AEU | ||
419 | #define MT9M114_VAR_CAM_AWB_CCM_M_6 0xC8B0U | ||
420 | #define MT9M114_VAR_CAM_AWB_CCM_M_7 0xC8B2U | ||
421 | #define MT9M114_VAR_CAM_AWB_CCM_M_8 0xC8B4U | ||
422 | #define MT9M114_VAR_CAM_AWB_CCM_R_0 0xC8B6U | ||
423 | #define MT9M114_VAR_CAM_AWB_CCM_R_1 0xC8B8U | ||
424 | #define MT9M114_VAR_CAM_AWB_CCM_R_2 0xC8BAU | ||
425 | #define MT9M114_VAR_CAM_AWB_CCM_R_3 0xC8BCU | ||
426 | #define MT9M114_VAR_CAM_AWB_CCM_R_4 0xC8BEU | ||
427 | #define MT9M114_VAR_CAM_AWB_CCM_R_5 0xC8C0U | ||
428 | #define MT9M114_VAR_CAM_AWB_CCM_R_6 0xC8C2U | ||
429 | #define MT9M114_VAR_CAM_AWB_CCM_R_7 0xC8C4U | ||
430 | #define MT9M114_VAR_CAM_AWB_CCM_R_8 0xC8C6U | ||
431 | #define MT9M114_VAR_CAM_AWB_CCM_L_RG_GAIN 0xC8C8U | ||
432 | #define MT9M114_VAR_CAM_AWB_CCM_L_BG_GAIN 0xC8CAU | ||
433 | #define MT9M114_VAR_CAM_AWB_CCM_M_RG_GAIN 0xC8CCU | ||
434 | #define MT9M114_VAR_CAM_AWB_CCM_M_BG_GAIN 0xC8CEU | ||
435 | #define MT9M114_VAR_CAM_AWB_CCM_R_RG_GAIN 0xC8D0U | ||
436 | #define MT9M114_VAR_CAM_AWB_CCM_R_BG_GAIN 0xC8D2U | ||
437 | #define MT9M114_VAR_CAM_AWB_CCM_L_CTEMP 0xC8D4U | ||
438 | #define MT9M114_VAR_CAM_AWB_CCM_M_CTEMP 0xC8D6U | ||
439 | #define MT9M114_VAR_CAM_AWB_CCM_R_CTEMP 0xC8D8U | ||
440 | #define MT9M114_VAR_CAM_AWB_LL_CCM_0 0xC8DAU | ||
441 | #define MT9M114_VAR_CAM_AWB_LL_CCM_1 0xC8DCU | ||
442 | #define MT9M114_VAR_CAM_AWB_LL_CCM_2 0xC8DEU | ||
443 | #define MT9M114_VAR_CAM_AWB_LL_CCM_3 0xC8E0U | ||
444 | #define MT9M114_VAR_CAM_AWB_LL_CCM_4 0xC8E2U | ||
445 | #define MT9M114_VAR_CAM_AWB_LL_CCM_5 0xC8E4U | ||
446 | #define MT9M114_VAR_CAM_AWB_LL_CCM_6 0xC8E6U | ||
447 | #define MT9M114_VAR_CAM_AWB_LL_CCM_7 0xC8E8U | ||
448 | #define MT9M114_VAR_CAM_AWB_LL_CCM_8 0xC8EAU | ||
449 | #define MT9M114_VAR_CAM_AWB_COLOR_TEMPERATURE_MIN 0xC8ECU | ||
450 | #define MT9M114_VAR_CAM_AWB_COLOR_TEMPERATURE_MAX 0xC8EEU | ||
451 | #define MT9M114_VAR_CAM_AWB_COLOR_TEMPERATURE 0xC8F0U | ||
452 | #define MT9M114_VAR_CAM_AWB_AWB_XSCALE 0xC8F2U | ||
453 | #define MT9M114_VAR_CAM_AWB_AWB_YSCALE 0xC8F3U | ||
454 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_0 0xC8F4U | ||
455 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_1 0xC8F6U | ||
456 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_2 0xC8F8U | ||
457 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_3 0xC8FAU | ||
458 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_4 0xC8FCU | ||
459 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_5 0xC8FEU | ||
460 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_6 0xC900U | ||
461 | #define MT9M114_VAR_CAM_AWB_AWB_WEIGHTS_7 0xC902U | ||
462 | #define MT9M114_VAR_CAM_AWB_AWB_XSHIFT_PRE_ADJ 0xC904U | ||
463 | #define MT9M114_VAR_CAM_AWB_AWB_YSHIFT_PRE_ADJ 0xC906U | ||
464 | #define MT9M114_VAR_CAM_AWB_AWBMODE 0xC909U | ||
465 | #define MT9M114_VAR_CAM_AWB_TINTS_CTEMP_THRESHOLD 0xC90AU | ||
466 | #define MT9M114_VAR_CAM_AWB_K_R_L 0xC90CU | ||
467 | #define MT9M114_VAR_CAM_AWB_K_G_L 0xC90DU | ||
468 | #define MT9M114_VAR_CAM_AWB_K_B_L 0xC90EU | ||
469 | #define MT9M114_VAR_CAM_AWB_K_R_R 0xC90FU | ||
470 | #define MT9M114_VAR_CAM_AWB_K_G_R 0xC910U | ||
471 | #define MT9M114_VAR_CAM_AWB_K_B_R 0xC911U | ||
472 | #define MT9M114_VAR_CAM_STAT_AWB_CLIP_WINDOW_XSTART 0xC914U | ||
473 | #define MT9M114_VAR_CAM_STAT_AWB_CLIP_WINDOW_YSTART 0xC916U | ||
474 | #define MT9M114_VAR_CAM_STAT_AWB_CLIP_WINDOW_XEND 0xC918U | ||
475 | #define MT9M114_VAR_CAM_STAT_AWB_CLIP_WINDOW_YEND 0xC91AU | ||
476 | #define MT9M114_VAR_CAM_STAT_AE_INITIAL_WINDOW_XSTART 0xC91CU | ||
477 | #define MT9M114_VAR_CAM_STAT_AE_INITIAL_WINDOW_YSTART 0xC91EU | ||
478 | #define MT9M114_VAR_CAM_STAT_AE_INITIAL_WINDOW_XEND 0xC920U | ||
479 | #define MT9M114_VAR_CAM_STAT_AE_INITIAL_WINDOW_YEND 0xC922U | ||
480 | #define MT9M114_VAR_CAM_LL_LLMODE 0xC924U | ||
481 | #define MT9M114_VAR_CAM_LL_START_BRIGHTNESS 0xC926U | ||
482 | #define MT9M114_VAR_CAM_LL_STOP_BRIGHTNESS 0xC928U | ||
483 | #define MT9M114_VAR_CAM_LL_START_SATURATION 0xC92AU | ||
484 | #define MT9M114_VAR_CAM_LL_END_SATURATION 0xC92BU | ||
485 | #define MT9M114_VAR_CAM_LL_START_DESATURATION 0xC92CU | ||
486 | #define MT9M114_VAR_CAM_LL_END_DESATURATION 0xC92DU | ||
487 | #define MT9M114_VAR_CAM_LL_START_DEMOSAIC 0xC92EU | ||
488 | #define MT9M114_VAR_CAM_LL_START_AP_GAIN 0xC92FU | ||
489 | #define MT9M114_VAR_CAM_LL_START_AP_THRESH 0xC930U | ||
490 | #define MT9M114_VAR_CAM_LL_STOP_DEMOSAIC 0xC931U | ||
491 | #define MT9M114_VAR_CAM_LL_STOP_AP_GAIN 0xC932U | ||
492 | #define MT9M114_VAR_CAM_LL_STOP_AP_THRESH 0xC933U | ||
493 | #define MT9M114_VAR_CAM_LL_START_NR_RED 0xC934U | ||
494 | #define MT9M114_VAR_CAM_LL_START_NR_GREEN 0xC935U | ||
495 | #define MT9M114_VAR_CAM_LL_START_NR_BLUE 0xC936U | ||
496 | #define MT9M114_VAR_CAM_LL_START_NR_THRESH 0xC937U | ||
497 | #define MT9M114_VAR_CAM_LL_STOP_NR_RED 0xC938U | ||
498 | #define MT9M114_VAR_CAM_LL_STOP_NR_GREEN 0xC939U | ||
499 | #define MT9M114_VAR_CAM_LL_STOP_NR_BLUE 0xC93AU | ||
500 | #define MT9M114_VAR_CAM_LL_STOP_NR_THRESH 0xC93BU | ||
501 | #define MT9M114_VAR_CAM_LL_START_CONTRAST_BM 0xC93CU | ||
502 | #define MT9M114_VAR_CAM_LL_STOP_CONTRAST_BM 0xC93EU | ||
503 | #define MT9M114_VAR_CAM_LL_GAMMA 0xC940U | ||
504 | #define MT9M114_VAR_CAM_LL_START_CONTRAST_GRADIENT 0xC942U | ||
505 | #define MT9M114_VAR_CAM_LL_STOP_CONTRAST_GRADIENT 0xC943U | ||
506 | #define MT9M114_VAR_CAM_LL_START_CONTRAST_LUMA_PERCENTAGE 0xC944U | ||
507 | #define MT9M114_VAR_CAM_LL_STOP_CONTRAST_LUMA_PERCENTAGE 0xC945U | ||
508 | #define MT9M114_VAR_CAM_LL_START_GAIN_METRIC 0xC946U | ||
509 | #define MT9M114_VAR_CAM_LL_STOP_GAIN_METRIC 0xC948U | ||
510 | #define MT9M114_VAR_CAM_LL_START_FADE_TO_BLACK_LUMA 0xC94AU | ||
511 | #define MT9M114_VAR_CAM_LL_STOP_FADE_TO_BLACK_LUMA 0xC94CU | ||
512 | #define MT9M114_VAR_CAM_LL_CLUSTER_DC_TH_BM 0xC94EU | ||
513 | #define MT9M114_VAR_CAM_LL_CLUSTER_DC_GATE_PERCENTAGE 0xC950U | ||
514 | #define MT9M114_VAR_CAM_LL_SUMMING_SENSITIVITY_FACTOR 0xC951U | ||
515 | #define MT9M114_VAR_CAM_LL_START_TARGET_LUMA_BM 0xC952U | ||
516 | #define MT9M114_VAR_CAM_LL_STOP_TARGET_LUMA_BM 0xC954U | ||
517 | #define MT9M114_VAR_CAM_LL_INV_BRIGHTNESS_METRIC 0xC956U | ||
518 | #define MT9M114_VAR_CAM_LL_GAIN_METRIC 0xC958U | ||
519 | #define MT9M114_VAR_CAM_SEQ_UV_COLOR_BOOST 0xC95AU | ||
520 | #define MT9M114_VAR_CAM_PGA_PGA_CONTROL 0xC95EU | ||
521 | #define MT9M114_VAR_CAM_PGA_L_CONFIG_COLOUR_TEMP 0xC960U | ||
522 | #define MT9M114_VAR_CAM_PGA_L_CONFIG_GREEN_RED_Q14 0xC962U | ||
523 | #define MT9M114_VAR_CAM_PGA_L_CONFIG_RED_Q14 0xC964U | ||
524 | #define MT9M114_VAR_CAM_PGA_L_CONFIG_GREEN_BLUE_Q14 0xC966U | ||
525 | #define MT9M114_VAR_CAM_PGA_L_CONFIG_BLUE_Q14 0xC968U | ||
526 | #define MT9M114_VAR_CAM_PGA_M_CONFIG_COLOUR_TEMP 0xC96AU | ||
527 | #define MT9M114_VAR_CAM_PGA_M_CONFIG_GREEN_RED_Q14 0xC96CU | ||
528 | #define MT9M114_VAR_CAM_PGA_M_CONFIG_RED_Q14 0xC96EU | ||
529 | #define MT9M114_VAR_CAM_PGA_M_CONFIG_GREEN_BLUE_Q14 0xC970U | ||
530 | #define MT9M114_VAR_CAM_PGA_M_CONFIG_BLUE_Q14 0xC972U | ||
531 | #define MT9M114_VAR_CAM_PGA_R_CONFIG_COLOUR_TEMP 0xC974U | ||
532 | #define MT9M114_VAR_CAM_PGA_R_CONFIG_GREEN_RED_Q14 0xC976U | ||
533 | #define MT9M114_VAR_CAM_PGA_R_CONFIG_RED_Q14 0xC978U | ||
534 | #define MT9M114_VAR_CAM_PGA_R_CONFIG_GREEN_BLUE_Q14 0xC97AU | ||
535 | #define MT9M114_VAR_CAM_PGA_R_CONFIG_BLUE_Q14 0xC97CU | ||
536 | #define MT9M114_VAR_CAM_SYSCTL_PLL_ENABLE 0xC97EU | ||
537 | #define MT9M114_VAR_CAM_SYSCTL_PLL_DIVIDER_M_N 0xC980U | ||
538 | #define MT9M114_VAR_CAM_SYSCTL_PLL_DIVIDER_P 0xC982U | ||
539 | #define MT9M114_VAR_CAM_PORT_OUTPUT_CONTROL 0xC984U | ||
540 | #define MT9M114_VAR_CAM_PORT_PORCH 0xC986U | ||
541 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_T_HS_ZERO 0xC988U | ||
542 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_T_HS_EXIT_HS_TRAIL 0xC98AU | ||
543 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_T_CLK_POST_CLK_PRE 0xC98CU | ||
544 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_T_CLK_TRAIL_CLK_ZERO 0xC98EU | ||
545 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_T_LPX 0xC990U | ||
546 | #define MT9M114_VAR_CAM_PORT_MIPI_TIMING_INIT_TIMING 0xC992U | ||
547 | |||
548 | /* 10.UVC_Control variables */ | ||
549 | #define MT9M114_VAR_UVC_AE_MODE_CONTROL 0xCC00U | ||
550 | #define MT9M114_VAR_UVC_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0xCC01U | ||
551 | #define MT9M114_VAR_UVC_AE_PRIORITY_CONTROL 0xCC02U | ||
552 | #define MT9M114_VAR_UVC_POWER_LINE_FREQUENCY_CONTROL 0xCC03U | ||
553 | #define MT9M114_VAR_UVC_EXPOSURE_TIME_ABSOLUTE_CONTROL 0xCC04U | ||
554 | #define MT9M114_VAR_UVC_BACKLIGHT_COMPENSATION_CONTROL 0xCC08U | ||
555 | #define MT9M114_VAR_UVC_BRIGHTNESS_CONTROL 0xCC0AU | ||
556 | #define MT9M114_VAR_UVC_CONTRAST_CONTROL 0xCC0CU | ||
557 | #define MT9M114_VAR_UVC_GAIN_CONTROL 0xCC0EU | ||
558 | #define MT9M114_VAR_UVC_HUE_CONTROL 0xCC10U | ||
559 | #define MT9M114_VAR_UVC_SATURATION_CONTROL 0xCC12U | ||
560 | #define MT9M114_VAR_UVC_SHARPNESS_CONTROL 0xCC14U | ||
561 | #define MT9M114_VAR_UVC_GAMMA_CONTROL 0xCC16U | ||
562 | #define MT9M114_VAR_UVC_WHITE_BALANCE_TEMPERATURE_CONTROL 0xCC18U | ||
563 | #define MT9M114_VAR_UVC_FRAME_INTERVAL_CONTROL 0xCC1CU | ||
564 | #define MT9M114_VAR_UVC_MANUAL_EXPOSURE_CONFIGURATION 0xCC20U | ||
565 | #define MT9M114_VAR_UVC_FLICKER_AVOIDANCE_CONFIGURATION 0xCC21U | ||
566 | #define MT9M114_VAR_UVC_ALGO 0xCC22U | ||
567 | #define MT9M114_VAR_UVC_RESULT_STATUS 0xCC24U | ||
568 | |||
569 | /* 11.SystemManager variables */ | ||
570 | #define MT9M114_VAR_SYSMGR_NEXT_STATE 0xDC00U | ||
571 | #define MT9M114_VAR_SYSMGR_CURRENT_STATE 0xDC01U | ||
572 | #define MT9M114_VAR_SYSMGR_CMD_STATUS 0xDC02U | ||
573 | |||
574 | /* 12.PatchLoader variables */ | ||
575 | #define MT9M114_VAR_PATCHLDR_LOADER_ADDRESS 0xE000U | ||
576 | #define MT9M114_VAR_PATCHLDR_PATCH_ID 0xE002U | ||
577 | #define MT9M114_VAR_PATCHLDR_FIRMWARE_ID 0xE004U | ||
578 | #define MT9M114_VAR_PATCHLDR_APPLY_STATUS 0xE008U | ||
579 | #define MT9M114_VAR_PATCHLDR_NUM_PATCHES 0xE009U | ||
580 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_0 0xE00AU | ||
581 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_1 0xE00CU | ||
582 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_2 0xE00EU | ||
583 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_3 0xE010U | ||
584 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_4 0xE012U | ||
585 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_5 0xE014U | ||
586 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_6 0xE016U | ||
587 | #define MT9M114_VAR_PATCHLDR_PATCH_ID_7 0xE018U | ||
588 | |||
589 | /* 13.Patch variables */ | ||
590 | #define MT9M114_VAR_PATCHVARS_DELTA_DK_CORRECTION_FACTOR 0xE400U | ||
591 | |||
592 | /* 14.CommandHandler variables */ | ||
593 | #define MT9M114_VAR_CMD_HANDLER_WAIT_EVENT_ID 0xFC00U | ||
594 | #define MT9M114_VAR_CMD_HANDLER_NUM_EVENTS 0xFC02U | ||
595 | |||
596 | /*! @brief MT9M114 command definitions. */ | ||
597 | #define MT9M114_COMMAND_APPLY_PATCH 0x0001U | ||
598 | #define MT9M114_COMMAND_SET_STATE 0x0002U | ||
599 | #define MT9M114_COMMAND_REFRESH 0x0004U | ||
600 | #define MT9M114_COMMAND_WAIT_FOR_EVENT 0x0008U | ||
601 | #define MT9M114_COMMAND_OK 0x8000U | ||
602 | |||
603 | /*! @brief MT9M114 system state definitions. */ | ||
604 | #define MT9M114_SYS_STATE_ENTER_CONFIG_CHANGE 0x28U | ||
605 | #define MT9M114_SYS_STATE_STREAMING 0x31U | ||
606 | #define MT9M114_SYS_STATE_START_STREAMING 0x34U | ||
607 | #define MT9M114_SYS_STATE_ENTER_SUSPEND 0x40U | ||
608 | #define MT9M114_SYS_STATE_SUSPENDED 0x41U | ||
609 | #define MT9M114_SYS_STATE_ENTER_STANDBY 0x50U | ||
610 | #define MT9M114_SYS_STATE_STANDBY 0x52U | ||
611 | #define MT9M114_SYS_STATE_LEAVE_STANDBY 0x54U | ||
612 | |||
613 | /*! @brief MT9M114 system set-state command retults. */ | ||
614 | #define MT9M114_SYS_STATE_SET_RESULT_ENOERR 0x00U /* command successful */ | ||
615 | #define MT9M114_SYS_STATE_SET_RESULTEINVAL 0x0CU /* invalid configuration */ | ||
616 | #define MT9M114_SYS_STATE_SET_RESULTENOSPC 0x0DU /* resource not available */ | ||
617 | |||
618 | /******************************************************************************* | ||
619 | * Prototypes | ||
620 | ******************************************************************************/ | ||
621 | |||
622 | /*! | ||
623 | * @brief MT9M114 resource. | ||
624 | * | ||
625 | * Before initialize the MT9M114, the resource must be initialized that the | ||
626 | * Two-Wire-Serial-Interface I2C could start to work. | ||
627 | */ | ||
628 | typedef struct _mt9m114_resource | ||
629 | { | ||
630 | video_i2c_send_func_t i2cSendFunc; /*!< I2C send function. */ | ||
631 | video_i2c_receive_func_t i2cReceiveFunc; /*!< I2C receive function. */ | ||
632 | void (*pullResetPin)(bool pullUp); /*!< Function to pull reset pin high or low. */ | ||
633 | uint32_t inputClockFreq_Hz; /*!< Input clock frequency, EXTCLK. */ | ||
634 | } mt9m114_resource_t; | ||
635 | |||
636 | /*! @brief MT9M114 operation functions. */ | ||
637 | extern const camera_device_operations_t mt9m114_ops; | ||
638 | |||
639 | /******************************************************************************* | ||
640 | * API | ||
641 | ******************************************************************************/ | ||
642 | |||
643 | #if defined(__cplusplus) | ||
644 | extern "C" { | ||
645 | #endif | ||
646 | |||
647 | #if defined(__cplusplus) | ||
648 | } | ||
649 | #endif | ||
650 | |||
651 | #endif /* _FSL_MT9M114_H_ */ | ||