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diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/LPC54018/mcuxpresso/startup_lpc54018.c b/lib/chibios-contrib/ext/mcux-sdk/devices/LPC54018/mcuxpresso/startup_lpc54018.c
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1//*****************************************************************************
2// LPC54018 startup code for use with MCUXpresso IDE
3//
4// Version : 160420
5//*****************************************************************************
6//
7// Copyright 2016-2020 NXP
8// All rights reserved.
9//
10// SPDX-License-Identifier: BSD-3-Clause
11//*****************************************************************************
12
13#if defined (DEBUG)
14#pragma GCC push_options
15#pragma GCC optimize ("Og")
16#endif // (DEBUG)
17
18#if defined (__cplusplus)
19#ifdef __REDLIB__
20#error Redlib does not support C++
21#else
22//*****************************************************************************
23//
24// The entry point for the C++ library startup
25//
26//*****************************************************************************
27extern "C" {
28 extern void __libc_init_array(void);
29}
30#endif
31#endif
32
33#define WEAK __attribute__ ((weak))
34#define WEAK_AV __attribute__ ((weak, section(".after_vectors")))
35#define ALIAS(f) __attribute__ ((weak, alias (#f)))
36
37//*****************************************************************************
38#if defined (__cplusplus)
39extern "C" {
40#endif
41
42//*****************************************************************************
43// Variable to store CRP value in. Will be placed automatically
44// by the linker when "Enable Code Read Protect" selected.
45// See crp.h header for more information
46//*****************************************************************************
47#include <NXP/crp.h>
48__CRP const unsigned int CRP_WORD = CRP_NO_CRP ;
49
50//*****************************************************************************
51// Declaration of external SystemInit function
52//*****************************************************************************
53#if defined (__USE_CMSIS)
54extern void SystemInit(void);
55#endif // (__USE_CMSIS)
56
57//*****************************************************************************
58// Forward declaration of the core exception handlers.
59// When the application defines a handler (with the same name), this will
60// automatically take precedence over these weak definitions.
61// If your application is a C++ one, then any interrupt handlers defined
62// in C++ files within in your main application will need to have C linkage
63// rather than C++ linkage. To do this, make sure that you are using extern "C"
64// { .... } around the interrupt handler within your main application code.
65//*****************************************************************************
66 void ResetISR(void);
67WEAK void NMI_Handler(void);
68WEAK void HardFault_Handler(void);
69WEAK void MemManage_Handler(void);
70WEAK void BusFault_Handler(void);
71WEAK void UsageFault_Handler(void);
72WEAK void SVC_Handler(void);
73WEAK void DebugMon_Handler(void);
74WEAK void PendSV_Handler(void);
75WEAK void SysTick_Handler(void);
76WEAK void IntDefaultHandler(void);
77
78//*****************************************************************************
79// Forward declaration of the application IRQ handlers. When the application
80// defines a handler (with the same name), this will automatically take
81// precedence over weak definitions below
82//*****************************************************************************
83WEAK void WDT_BOD_IRQHandler(void);
84WEAK void DMA0_IRQHandler(void);
85WEAK void GINT0_IRQHandler(void);
86WEAK void GINT1_IRQHandler(void);
87WEAK void PIN_INT0_IRQHandler(void);
88WEAK void PIN_INT1_IRQHandler(void);
89WEAK void PIN_INT2_IRQHandler(void);
90WEAK void PIN_INT3_IRQHandler(void);
91WEAK void UTICK0_IRQHandler(void);
92WEAK void MRT0_IRQHandler(void);
93WEAK void CTIMER0_IRQHandler(void);
94WEAK void CTIMER1_IRQHandler(void);
95WEAK void SCT0_IRQHandler(void);
96WEAK void CTIMER3_IRQHandler(void);
97WEAK void FLEXCOMM0_IRQHandler(void);
98WEAK void FLEXCOMM1_IRQHandler(void);
99WEAK void FLEXCOMM2_IRQHandler(void);
100WEAK void FLEXCOMM3_IRQHandler(void);
101WEAK void FLEXCOMM4_IRQHandler(void);
102WEAK void FLEXCOMM5_IRQHandler(void);
103WEAK void FLEXCOMM6_IRQHandler(void);
104WEAK void FLEXCOMM7_IRQHandler(void);
105WEAK void ADC0_SEQA_IRQHandler(void);
106WEAK void ADC0_SEQB_IRQHandler(void);
107WEAK void ADC0_THCMP_IRQHandler(void);
108WEAK void DMIC0_IRQHandler(void);
109WEAK void HWVAD0_IRQHandler(void);
110WEAK void USB0_NEEDCLK_IRQHandler(void);
111WEAK void USB0_IRQHandler(void);
112WEAK void RTC_IRQHandler(void);
113WEAK void FLEXCOMM10_IRQHandler(void);
114WEAK void Reserved47_IRQHandler(void);
115WEAK void PIN_INT4_IRQHandler(void);
116WEAK void PIN_INT5_IRQHandler(void);
117WEAK void PIN_INT6_IRQHandler(void);
118WEAK void PIN_INT7_IRQHandler(void);
119WEAK void CTIMER2_IRQHandler(void);
120WEAK void CTIMER4_IRQHandler(void);
121WEAK void RIT_IRQHandler(void);
122WEAK void SPIFI0_IRQHandler(void);
123WEAK void FLEXCOMM8_IRQHandler(void);
124WEAK void FLEXCOMM9_IRQHandler(void);
125WEAK void SDIO_IRQHandler(void);
126WEAK void CAN0_IRQ0_IRQHandler(void);
127WEAK void CAN0_IRQ1_IRQHandler(void);
128WEAK void CAN1_IRQ0_IRQHandler(void);
129WEAK void CAN1_IRQ1_IRQHandler(void);
130WEAK void USB1_IRQHandler(void);
131WEAK void USB1_NEEDCLK_IRQHandler(void);
132WEAK void ETHERNET_IRQHandler(void);
133WEAK void ETHERNET_PMT_IRQHandler(void);
134WEAK void ETHERNET_MACLP_IRQHandler(void);
135WEAK void Reserved68_IRQHandler(void);
136WEAK void LCD_IRQHandler(void);
137WEAK void SHA_IRQHandler(void);
138WEAK void SMARTCARD0_IRQHandler(void);
139WEAK void SMARTCARD1_IRQHandler(void);
140
141//*****************************************************************************
142// Forward declaration of the driver IRQ handlers. These are aliased
143// to the IntDefaultHandler, which is a 'forever' loop. When the driver
144// defines a handler (with the same name), this will automatically take
145// precedence over these weak definitions
146//*****************************************************************************
147void WDT_BOD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
148void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
149void GINT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
150void GINT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
151void PIN_INT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
152void PIN_INT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
153void PIN_INT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
154void PIN_INT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
155void UTICK0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
156void MRT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
157void CTIMER0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
158void CTIMER1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
159void SCT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
160void CTIMER3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
161void FLEXCOMM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
162void FLEXCOMM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
163void FLEXCOMM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
164void FLEXCOMM3_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
165void FLEXCOMM4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
166void FLEXCOMM5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
167void FLEXCOMM6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
168void FLEXCOMM7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
169void ADC0_SEQA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
170void ADC0_SEQB_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
171void ADC0_THCMP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
172void DMIC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
173void HWVAD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
174void USB0_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
175void USB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
176void RTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
177void FLEXCOMM10_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
178void Reserved47_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
179void PIN_INT4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
180void PIN_INT5_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
181void PIN_INT6_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
182void PIN_INT7_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
183void CTIMER2_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
184void CTIMER4_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
185void RIT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
186void SPIFI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
187void FLEXCOMM8_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
188void FLEXCOMM9_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
189void SDIO_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
190void CAN0_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
191void CAN0_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
192void CAN1_IRQ0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
193void CAN1_IRQ1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
194void USB1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
195void USB1_NEEDCLK_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
196void ETHERNET_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
197void ETHERNET_PMT_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
198void ETHERNET_MACLP_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
199void Reserved68_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
200void LCD_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
201void SHA_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
202void SMARTCARD0_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
203void SMARTCARD1_DriverIRQHandler(void) ALIAS(IntDefaultHandler);
204
205//*****************************************************************************
206// The entry point for the application.
207// __main() is the entry point for Redlib based applications
208// main() is the entry point for Newlib based applications
209//*****************************************************************************
210#if defined (__REDLIB__)
211extern void __main(void);
212#endif
213extern int main(void);
214
215//*****************************************************************************
216// External declaration for the pointer to the stack top from the Linker Script
217//*****************************************************************************
218extern void _vStackTop(void);
219extern void _image_size(void);
220//*****************************************************************************
221// External declaration for LPC MCU vector table checksum from Linker Script
222//*****************************************************************************
223WEAK extern void __valid_user_code_checksum();
224
225//*****************************************************************************
226// External declaration for image type and load address from Linker Script
227//*****************************************************************************
228WEAK extern void __imghdr_loadaddress();
229WEAK extern void __imghdr_imagetype();
230
231//*****************************************************************************
232#if defined (__cplusplus)
233} // extern "C"
234#endif
235#ifndef IMG_BAUDRATE
236#define IMG_BAUDRATE 0
237#endif
238//*****************************************************************************
239// The vector table.
240// This relies on the linker script to place at correct location in memory.
241//*****************************************************************************
242
243
244
245extern void (* const g_pfnVectors[])(void);
246extern void * __Vectors __attribute__ ((alias ("g_pfnVectors")));
247
248__attribute__ ((used, section(".isr_vector")))
249void (* const g_pfnVectors[])(void) = {
250 // Core Level - CM4
251 &_vStackTop, // The initial stack pointer
252 ResetISR, // The reset handler
253 NMI_Handler, // The NMI handler
254 HardFault_Handler, // The hard fault handler
255 MemManage_Handler, // The MPU fault handler
256 BusFault_Handler, // The bus fault handler
257 UsageFault_Handler, // The usage fault handler
258 __valid_user_code_checksum, // LPC MCU checksum
259 0, // ECRP
260 (void (*)(void))0xEDDC94BD, // Reserved
261 (void (*)(void))0x160, // Reserved
262 SVC_Handler, // SVCall handler
263 DebugMon_Handler, // Debug monitor handler
264 0, // Reserved
265 PendSV_Handler, // The PendSV handler
266 SysTick_Handler, // The SysTick handler
267
268 // Chip Level - LPC54018
269 WDT_BOD_IRQHandler, // 16: Windowed watchdog timer, Brownout detect
270 DMA0_IRQHandler, // 17: DMA controller
271 GINT0_IRQHandler, // 18: GPIO group 0
272 GINT1_IRQHandler, // 19: GPIO group 1
273 PIN_INT0_IRQHandler, // 20: Pin interrupt 0 or pattern match engine slice 0
274 PIN_INT1_IRQHandler, // 21: Pin interrupt 1or pattern match engine slice 1
275 PIN_INT2_IRQHandler, // 22: Pin interrupt 2 or pattern match engine slice 2
276 PIN_INT3_IRQHandler, // 23: Pin interrupt 3 or pattern match engine slice 3
277 UTICK0_IRQHandler, // 24: Micro-tick Timer
278 MRT0_IRQHandler, // 25: Multi-rate timer
279 CTIMER0_IRQHandler, // 26: Standard counter/timer CTIMER0
280 CTIMER1_IRQHandler, // 27: Standard counter/timer CTIMER1
281 SCT0_IRQHandler, // 28: SCTimer/PWM
282 CTIMER3_IRQHandler, // 29: Standard counter/timer CTIMER3
283 FLEXCOMM0_IRQHandler, // 30: Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
284 FLEXCOMM1_IRQHandler, // 31: Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
285 FLEXCOMM2_IRQHandler, // 32: Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
286 FLEXCOMM3_IRQHandler, // 33: Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
287 FLEXCOMM4_IRQHandler, // 34: Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
288 FLEXCOMM5_IRQHandler, // 35: Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
289 FLEXCOMM6_IRQHandler, // 36: Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
290 FLEXCOMM7_IRQHandler, // 37: Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
291 ADC0_SEQA_IRQHandler, // 38: ADC0 sequence A completion.
292 ADC0_SEQB_IRQHandler, // 39: ADC0 sequence B completion.
293 ADC0_THCMP_IRQHandler, // 40: ADC0 threshold compare and error.
294 DMIC0_IRQHandler, // 41: Digital microphone and DMIC subsystem
295 HWVAD0_IRQHandler, // 42: Hardware Voice Activity Detector
296 USB0_NEEDCLK_IRQHandler, // 43: USB Activity Wake-up Interrupt
297 USB0_IRQHandler, // 44: USB device
298 RTC_IRQHandler, // 45: RTC alarm and wake-up interrupts
299 FLEXCOMM10_IRQHandler, // 46: Flexcomm Interface 10 (SPI, FLEXCOMM)
300 Reserved47_IRQHandler, // 47: Reserved interrupt
301 PIN_INT4_IRQHandler, // 48: Pin interrupt 4 or pattern match engine slice 4 int
302 PIN_INT5_IRQHandler, // 49: Pin interrupt 5 or pattern match engine slice 5 int
303 PIN_INT6_IRQHandler, // 50: Pin interrupt 6 or pattern match engine slice 6 int
304 PIN_INT7_IRQHandler, // 51: Pin interrupt 7 or pattern match engine slice 7 int
305 CTIMER2_IRQHandler, // 52: Standard counter/timer CTIMER2
306 CTIMER4_IRQHandler, // 53: Standard counter/timer CTIMER4
307 RIT_IRQHandler, // 54: Repetitive Interrupt Timer
308 SPIFI0_IRQHandler, // 55: SPI flash interface
309 FLEXCOMM8_IRQHandler, // 56: Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
310 FLEXCOMM9_IRQHandler, // 57: Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
311 SDIO_IRQHandler, // 58: SD/MMC
312 CAN0_IRQ0_IRQHandler, // 59: CAN0 interrupt0
313 CAN0_IRQ1_IRQHandler, // 60: CAN0 interrupt1
314 CAN1_IRQ0_IRQHandler, // 61: CAN1 interrupt0
315 CAN1_IRQ1_IRQHandler, // 62: CAN1 interrupt1
316 USB1_IRQHandler, // 63: USB1 interrupt
317 USB1_NEEDCLK_IRQHandler, // 64: USB1 activity
318 ETHERNET_IRQHandler, // 65: Ethernet
319 ETHERNET_PMT_IRQHandler, // 66: Ethernet power management interrupt
320 ETHERNET_MACLP_IRQHandler, // 67: Ethernet MAC interrupt
321 Reserved68_IRQHandler, // 68: Reserved interrupt
322 LCD_IRQHandler, // 69: LCD interrupt
323 SHA_IRQHandler, // 70: SHA interrupt
324 SMARTCARD0_IRQHandler, // 71: Smart card 0 interrupt
325 SMARTCARD1_IRQHandler, // 72: Smart card 1 interrupt
326
327 0, // Reserved
328 0, // Reserved
329 0, // Reserved
330 0, // Reserved
331 0, // Reserved
332 0, // Reserved
333 0, // Reserved
334 0, // Reserved
335 0, // Reserved
336 0, // Reserved
337 0, // Reserved
338 0, // Reserved
339 0, // Reserved
340 0, // Reserved
341 0, // Reserved
342 (void (*)(void))0xFEEDA5A5, // Header Marker
343
344#if defined (ADD_CRC)
345 (__imghdr_imagetype - 1), // (0x04) Image Type
346 __imghdr_loadaddress, // (0x08) Load_address
347#else
348 __imghdr_imagetype, // (0x04) Image Type
349 __imghdr_loadaddress, // (0x08) Load_address
350#endif
351 (void (*)(void))(((unsigned)_image_size) - 4), // (0x0C) load_length, exclude 4 bytes CRC field.
352 0, // (0x10) CRC value (only applicable to NON Non-secure images).
353 0, // (0x14) Version (only applicable to DUAL_ENH image type.
354 0, // (0x18) EMC static memory configuration settings, required for EMC boot
355 (void (*)(void))IMG_BAUDRATE, // (0x1C) image baudrate
356 0, // (0x20) reserved
357 (void (*)(void))0xEDDC94BD, // (0x24) Image_marker
358 0, // (0x28) SBZ
359 0, // (0x2C) reserved
360 #ifdef W25Q128JVFM
361 /* SPIFI Descriptor - W25Q128JVFM */
362 (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ï¼›DevStrAdr
363 (void (*)(void))0x001870EF, // mfgId + extCount
364 (void (*)(void))0x00000000, // extid 0-3
365 (void (*)(void))0x00000000, // extid 4-7
366 (void (*)(void))0x0001001D, // caps
367 (void (*)(void))0x00000100, // Blks + RESV1
368 (void (*)(void))0x00010000, // blkSize
369 (void (*)(void))0x00000000, // subBlks + subBlkSize
370 (void (*)(void))0x00000100, // pageSize + RESV2
371 (void (*)(void))0x00003F00, // maxReadSize
372 (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
373 (void (*)(void))0x04030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId,
374 (void (*)(void))0x14110D09, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId
375 #endif
376
377 #ifdef MXL12835F
378 /* SPI Descriptor - MXL12835F */
379 (void (*)(void))0x00000000, // 0xFFFFFFFF to default 1-bit SPI mode ;DevStrAdr
380 (void (*)(void))0x001820C2, // mfgId + extCount
381 (void (*)(void))0x00000000, // extid 0-3
382 (void (*)(void))0x00000000, // extid 4-7
383 (void (*)(void))0x0001001D, // caps
384 (void (*)(void))0x00000100, // Blks + RESV1
385 (void (*)(void))0x00010000, // blkSize
386 (void (*)(void))0x00000000, // subBlks + subBlkSize
387 (void (*)(void))0x00000100, // pageSize + RESV2
388 (void (*)(void))0x00003F00, // maxReadSize
389 (void (*)(void))0x68506850, // maxClkRate,maxReadRate,maxHSReadRate,maxProgramRate
390 (void (*)(void))0x06030050, // maxHSProgramRate,initDeInitFxId,clearStatusFxId,getStatusFxId
391 (void (*)(void))0x14110F0B, // setStatusFxId,setOptionsFxId,getReadCmdFxId,getWriteCmdFxId
392 #endif
393
394
395}; /* End of g_pfnVectors */
396
397//*****************************************************************************
398// Functions to carry out the initialization of RW and BSS data sections. These
399// are written as separate functions rather than being inlined within the
400// ResetISR() function in order to cope with MCUs with multiple banks of
401// memory.
402//*****************************************************************************
403__attribute__ ((section(".after_vectors.init_data")))
404void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
405 unsigned int *pulDest = (unsigned int*) start;
406 unsigned int *pulSrc = (unsigned int*) romstart;
407 unsigned int loop;
408 for (loop = 0; loop < len; loop = loop + 4)
409 *pulDest++ = *pulSrc++;
410}
411
412__attribute__ ((section(".after_vectors.init_bss")))
413void bss_init(unsigned int start, unsigned int len) {
414 unsigned int *pulDest = (unsigned int*) start;
415 unsigned int loop;
416 for (loop = 0; loop < len; loop = loop + 4)
417 *pulDest++ = 0;
418}
419
420//*****************************************************************************
421// The following symbols are constructs generated by the linker, indicating
422// the location of various points in the "Global Section Table". This table is
423// created by the linker via the Code Red managed linker script mechanism. It
424// contains the load address, execution address and length of each RW data
425// section and the execution and length of each BSS (zero initialized) section.
426//*****************************************************************************
427extern unsigned int __data_section_table;
428extern unsigned int __data_section_table_end;
429extern unsigned int __bss_section_table;
430extern unsigned int __bss_section_table_end;
431
432//*****************************************************************************
433// Reset entry point for your code.
434// Sets up a simple runtime environment and initializes the C/C++
435// library.
436//*****************************************************************************
437__attribute__ ((section(".after_vectors.reset")))
438void ResetISR(void) {
439
440 // Disable interrupts
441 __asm volatile ("cpsid i");
442
443
444 // Enable SRAM clock used by Stack
445 __asm volatile ("LDR R0, =0x40000220\n\t"
446 "MOV R1, #56\n\t"
447 "STR R1, [R0]");
448
449#if defined (__USE_CMSIS)
450// If __USE_CMSIS defined, then call CMSIS SystemInit code
451 SystemInit();
452
453#endif // (__USE_CMSIS)
454
455 //
456 // Copy the data sections from flash to SRAM.
457 //
458 unsigned int LoadAddr, ExeAddr, SectionLen;
459 unsigned int *SectionTableAddr;
460
461 // Load base address of Global Section Table
462 SectionTableAddr = &__data_section_table;
463
464 // Copy the data sections from flash to SRAM.
465 while (SectionTableAddr < &__data_section_table_end) {
466 LoadAddr = *SectionTableAddr++;
467 ExeAddr = *SectionTableAddr++;
468 SectionLen = *SectionTableAddr++;
469 data_init(LoadAddr, ExeAddr, SectionLen);
470 }
471
472 // At this point, SectionTableAddr = &__bss_section_table;
473 // Zero fill the bss segment
474 while (SectionTableAddr < &__bss_section_table_end) {
475 ExeAddr = *SectionTableAddr++;
476 SectionLen = *SectionTableAddr++;
477 bss_init(ExeAddr, SectionLen);
478 }
479
480#if !defined (__USE_CMSIS)
481// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
482// will enable the FPU
483#if defined (__VFP_FP__) && !defined (__SOFTFP__)
484 //
485 // Code to enable the Cortex-M4 FPU only included
486 // if appropriate build options have been selected.
487 // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
488 //
489 // Read CPACR (located at address 0xE000ED88)
490 // Set bits 20-23 to enable CP10 and CP11 coprocessors
491 // Write back the modified value to the CPACR
492 asm volatile ("LDR.W R0, =0xE000ED88\n\t"
493 "LDR R1, [R0]\n\t"
494 "ORR R1, R1, #(0xF << 20)\n\t"
495 "STR R1, [R0]");
496#endif // (__VFP_FP__) && !(__SOFTFP__)
497#endif // (__USE_CMSIS)
498
499
500#if !defined (__USE_CMSIS)
501// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code
502// will setup the VTOR register
503
504 // Check to see if we are running the code from a non-zero
505 // address (eg RAM, external flash), in which case we need
506 // to modify the VTOR register to tell the CPU that the
507 // vector table is located at a non-0x0 address.
508 unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08;
509 if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) {
510 *pSCB_VTOR = (unsigned int)g_pfnVectors;
511 }
512#endif // (__USE_CMSIS)
513#if defined (__cplusplus)
514 //
515 // Call C++ library initialisation
516 //
517 __libc_init_array();
518#endif
519
520 // Reenable interrupts
521 __asm volatile ("cpsie i");
522
523#if defined (__REDLIB__)
524 // Call the Redlib library, which in turn calls main()
525 __main();
526#else
527 main();
528#endif
529
530 //
531 // main() shouldn't return, but if it does, we'll just enter an infinite loop
532 //
533 while (1) {
534 ;
535 }
536}
537
538//*****************************************************************************
539// Default core exception handlers. Override the ones here by defining your own
540// handler routines in your application code.
541//*****************************************************************************
542WEAK_AV void NMI_Handler(void)
543{ while(1) {}
544}
545
546WEAK_AV void HardFault_Handler(void)
547{ while(1) {}
548}
549
550WEAK_AV void MemManage_Handler(void)
551{ while(1) {}
552}
553
554WEAK_AV void BusFault_Handler(void)
555{ while(1) {}
556}
557
558WEAK_AV void UsageFault_Handler(void)
559{ while(1) {}
560}
561
562WEAK_AV void SVC_Handler(void)
563{ while(1) {}
564}
565
566WEAK_AV void DebugMon_Handler(void)
567{ while(1) {}
568}
569
570WEAK_AV void PendSV_Handler(void)
571{ while(1) {}
572}
573
574WEAK_AV void SysTick_Handler(void)
575{ while(1) {}
576}
577
578//*****************************************************************************
579// Processor ends up here if an unexpected interrupt occurs or a specific
580// handler is not present in the application code.
581//*****************************************************************************
582WEAK_AV void IntDefaultHandler(void)
583{ while(1) {}
584}
585
586//*****************************************************************************
587// Default application exception handlers. Override the ones here by defining
588// your own handler routines in your application code. These routines call
589// driver exception handlers or IntDefaultHandler() if no driver exception
590// handler is included.
591//*****************************************************************************
592WEAK void WDT_BOD_IRQHandler(void)
593{ WDT_BOD_DriverIRQHandler();
594}
595
596WEAK void DMA0_IRQHandler(void)
597{ DMA0_DriverIRQHandler();
598}
599
600WEAK void GINT0_IRQHandler(void)
601{ GINT0_DriverIRQHandler();
602}
603
604WEAK void GINT1_IRQHandler(void)
605{ GINT1_DriverIRQHandler();
606}
607
608WEAK void PIN_INT0_IRQHandler(void)
609{ PIN_INT0_DriverIRQHandler();
610}
611
612WEAK void PIN_INT1_IRQHandler(void)
613{ PIN_INT1_DriverIRQHandler();
614}
615
616WEAK void PIN_INT2_IRQHandler(void)
617{ PIN_INT2_DriverIRQHandler();
618}
619
620WEAK void PIN_INT3_IRQHandler(void)
621{ PIN_INT3_DriverIRQHandler();
622}
623
624WEAK void UTICK0_IRQHandler(void)
625{ UTICK0_DriverIRQHandler();
626}
627
628WEAK void MRT0_IRQHandler(void)
629{ MRT0_DriverIRQHandler();
630}
631
632WEAK void CTIMER0_IRQHandler(void)
633{ CTIMER0_DriverIRQHandler();
634}
635
636WEAK void CTIMER1_IRQHandler(void)
637{ CTIMER1_DriverIRQHandler();
638}
639
640WEAK void SCT0_IRQHandler(void)
641{ SCT0_DriverIRQHandler();
642}
643
644WEAK void CTIMER3_IRQHandler(void)
645{ CTIMER3_DriverIRQHandler();
646}
647
648WEAK void FLEXCOMM0_IRQHandler(void)
649{ FLEXCOMM0_DriverIRQHandler();
650}
651
652WEAK void FLEXCOMM1_IRQHandler(void)
653{ FLEXCOMM1_DriverIRQHandler();
654}
655
656WEAK void FLEXCOMM2_IRQHandler(void)
657{ FLEXCOMM2_DriverIRQHandler();
658}
659
660WEAK void FLEXCOMM3_IRQHandler(void)
661{ FLEXCOMM3_DriverIRQHandler();
662}
663
664WEAK void FLEXCOMM4_IRQHandler(void)
665{ FLEXCOMM4_DriverIRQHandler();
666}
667
668WEAK void FLEXCOMM5_IRQHandler(void)
669{ FLEXCOMM5_DriverIRQHandler();
670}
671
672WEAK void FLEXCOMM6_IRQHandler(void)
673{ FLEXCOMM6_DriverIRQHandler();
674}
675
676WEAK void FLEXCOMM7_IRQHandler(void)
677{ FLEXCOMM7_DriverIRQHandler();
678}
679
680WEAK void ADC0_SEQA_IRQHandler(void)
681{ ADC0_SEQA_DriverIRQHandler();
682}
683
684WEAK void ADC0_SEQB_IRQHandler(void)
685{ ADC0_SEQB_DriverIRQHandler();
686}
687
688WEAK void ADC0_THCMP_IRQHandler(void)
689{ ADC0_THCMP_DriverIRQHandler();
690}
691
692WEAK void DMIC0_IRQHandler(void)
693{ DMIC0_DriverIRQHandler();
694}
695
696WEAK void HWVAD0_IRQHandler(void)
697{ HWVAD0_DriverIRQHandler();
698}
699
700WEAK void USB0_NEEDCLK_IRQHandler(void)
701{ USB0_NEEDCLK_DriverIRQHandler();
702}
703
704WEAK void USB0_IRQHandler(void)
705{ USB0_DriverIRQHandler();
706}
707
708WEAK void RTC_IRQHandler(void)
709{ RTC_DriverIRQHandler();
710}
711
712WEAK void FLEXCOMM10_IRQHandler(void)
713{ FLEXCOMM10_DriverIRQHandler();
714}
715
716WEAK void Reserved47_IRQHandler(void)
717{ Reserved47_DriverIRQHandler();
718}
719
720WEAK void PIN_INT4_IRQHandler(void)
721{ PIN_INT4_DriverIRQHandler();
722}
723
724WEAK void PIN_INT5_IRQHandler(void)
725{ PIN_INT5_DriverIRQHandler();
726}
727
728WEAK void PIN_INT6_IRQHandler(void)
729{ PIN_INT6_DriverIRQHandler();
730}
731
732WEAK void PIN_INT7_IRQHandler(void)
733{ PIN_INT7_DriverIRQHandler();
734}
735
736WEAK void CTIMER2_IRQHandler(void)
737{ CTIMER2_DriverIRQHandler();
738}
739
740WEAK void CTIMER4_IRQHandler(void)
741{ CTIMER4_DriverIRQHandler();
742}
743
744WEAK void RIT_IRQHandler(void)
745{ RIT_DriverIRQHandler();
746}
747
748WEAK void SPIFI0_IRQHandler(void)
749{ SPIFI0_DriverIRQHandler();
750}
751
752WEAK void FLEXCOMM8_IRQHandler(void)
753{ FLEXCOMM8_DriverIRQHandler();
754}
755
756WEAK void FLEXCOMM9_IRQHandler(void)
757{ FLEXCOMM9_DriverIRQHandler();
758}
759
760WEAK void SDIO_IRQHandler(void)
761{ SDIO_DriverIRQHandler();
762}
763
764WEAK void CAN0_IRQ0_IRQHandler(void)
765{ CAN0_IRQ0_DriverIRQHandler();
766}
767
768WEAK void CAN0_IRQ1_IRQHandler(void)
769{ CAN0_IRQ1_DriverIRQHandler();
770}
771
772WEAK void CAN1_IRQ0_IRQHandler(void)
773{ CAN1_IRQ0_DriverIRQHandler();
774}
775
776WEAK void CAN1_IRQ1_IRQHandler(void)
777{ CAN1_IRQ1_DriverIRQHandler();
778}
779
780WEAK void USB1_IRQHandler(void)
781{ USB1_DriverIRQHandler();
782}
783
784WEAK void USB1_NEEDCLK_IRQHandler(void)
785{ USB1_NEEDCLK_DriverIRQHandler();
786}
787
788WEAK void ETHERNET_IRQHandler(void)
789{ ETHERNET_DriverIRQHandler();
790}
791
792WEAK void ETHERNET_PMT_IRQHandler(void)
793{ ETHERNET_PMT_DriverIRQHandler();
794}
795
796WEAK void ETHERNET_MACLP_IRQHandler(void)
797{ ETHERNET_MACLP_DriverIRQHandler();
798}
799
800WEAK void Reserved68_IRQHandler(void)
801{ Reserved68_DriverIRQHandler();
802}
803
804WEAK void LCD_IRQHandler(void)
805{ LCD_DriverIRQHandler();
806}
807
808WEAK void SHA_IRQHandler(void)
809{ SHA_DriverIRQHandler();
810}
811
812WEAK void SMARTCARD0_IRQHandler(void)
813{ SMARTCARD0_DriverIRQHandler();
814}
815
816WEAK void SMARTCARD1_IRQHandler(void)
817{ SMARTCARD1_DriverIRQHandler();
818}
819
820//*****************************************************************************
821
822#if defined (DEBUG)
823#pragma GCC pop_options
824#endif // (DEBUG)
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 12:02:29 +0100