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1/*
2** ###################################################################
3** Version: rev. 1.0, 2016-05-09
4** Build: b190225
5**
6** Abstract:
7** Chip specific module features.
8**
9** Copyright 2016 Freescale Semiconductor, Inc.
10** Copyright 2016-2019 NXP
11** All rights reserved.
12**
13** SPDX-License-Identifier: BSD-3-Clause
14**
15** http: www.nxp.com
16** mail: [email protected]
17**
18** Revisions:
19** - rev. 1.0 (2016-05-09)
20** Initial version.
21**
22** ###################################################################
23*/
24
25#ifndef _LPC54114_cm0plus_FEATURES_H_
26#define _LPC54114_cm0plus_FEATURES_H_
27
28/* SOC module features */
29
30/* @brief ADC availability on the SoC. */
31#define FSL_FEATURE_SOC_ADC_COUNT (1)
32/* @brief ASYNC_SYSCON availability on the SoC. */
33#define FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT (1)
34/* @brief CRC availability on the SoC. */
35#define FSL_FEATURE_SOC_CRC_COUNT (1)
36/* @brief CTIMER availability on the SoC. */
37#define FSL_FEATURE_SOC_CTIMER_COUNT (5)
38/* @brief DMA availability on the SoC. */
39#define FSL_FEATURE_SOC_DMA_COUNT (1)
40/* @brief DMIC availability on the SoC. */
41#define FSL_FEATURE_SOC_DMIC_COUNT (1)
42/* @brief FLEXCOMM availability on the SoC. */
43#define FSL_FEATURE_SOC_FLEXCOMM_COUNT (8)
44/* @brief GINT availability on the SoC. */
45#define FSL_FEATURE_SOC_GINT_COUNT (2)
46/* @brief GPIO availability on the SoC. */
47#define FSL_FEATURE_SOC_GPIO_COUNT (1)
48/* @brief I2C availability on the SoC. */
49#define FSL_FEATURE_SOC_I2C_COUNT (8)
50/* @brief I2S availability on the SoC. */
51#define FSL_FEATURE_SOC_I2S_COUNT (2)
52/* @brief INPUTMUX availability on the SoC. */
53#define FSL_FEATURE_SOC_INPUTMUX_COUNT (1)
54/* @brief IOCON availability on the SoC. */
55#define FSL_FEATURE_SOC_IOCON_COUNT (1)
56/* @brief MAILBOX availability on the SoC. */
57#define FSL_FEATURE_SOC_MAILBOX_COUNT (1)
58/* @brief MRT availability on the SoC. */
59#define FSL_FEATURE_SOC_MRT_COUNT (1)
60/* @brief PINT availability on the SoC. */
61#define FSL_FEATURE_SOC_PINT_COUNT (1)
62/* @brief RTC availability on the SoC. */
63#define FSL_FEATURE_SOC_RTC_COUNT (1)
64/* @brief SCT availability on the SoC. */
65#define FSL_FEATURE_SOC_SCT_COUNT (1)
66/* @brief SPI availability on the SoC. */
67#define FSL_FEATURE_SOC_SPI_COUNT (8)
68/* @brief SPIFI availability on the SoC. */
69#define FSL_FEATURE_SOC_SPIFI_COUNT (1)
70/* @brief SYSCON availability on the SoC. */
71#define FSL_FEATURE_SOC_SYSCON_COUNT (1)
72/* @brief USART availability on the SoC. */
73#define FSL_FEATURE_SOC_USART_COUNT (8)
74/* @brief USB availability on the SoC. */
75#define FSL_FEATURE_SOC_USB_COUNT (1)
76/* @brief UTICK availability on the SoC. */
77#define FSL_FEATURE_SOC_UTICK_COUNT (1)
78/* @brief WWDT availability on the SoC. */
79#define FSL_FEATURE_SOC_WWDT_COUNT (1)
80
81/* ADC module features */
82
83/* @brief Do not has input select (register INSEL). */
84#define FSL_FEATURE_ADC_HAS_NO_INSEL (0)
85/* @brief Has ASYNMODE bitfile in CTRL reigster. */
86#define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (1)
87/* @brief Has ASYNMODE bitfile in CTRL reigster. */
88#define FSL_FEATURE_ADC_HAS_CTRL_RESOL (1)
89/* @brief Has ASYNMODE bitfile in CTRL reigster. */
90#define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (1)
91/* @brief Has ASYNMODE bitfile in CTRL reigster. */
92#define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (1)
93/* @brief Has ASYNMODE bitfile in CTRL reigster. */
94#define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (0)
95/* @brief Has ASYNMODE bitfile in CTRL reigster. */
96#define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0)
97/* @brief Has startup register. */
98#define FSL_FEATURE_ADC_HAS_STARTUP_REG (1)
99/* @brief Has ADTrim register */
100#define FSL_FEATURE_ADC_HAS_TRIM_REG (0)
101/* @brief Has Calibration register. */
102#define FSL_FEATURE_ADC_HAS_CALIB_REG (1)
103
104/* DMA module features */
105
106/* @brief Number of channels */
107#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (20)
108/* @brief Align size of DMA descriptor */
109#define FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE (512)
110/* @brief DMA head link descriptor table align size */
111#define FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (16U)
112
113/* FLEXCOMM module features */
114
115/* @brief FLEXCOMM0 USART INDEX 0 */
116#define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0)
117/* @brief FLEXCOMM0 SPI INDEX 0 */
118#define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0)
119/* @brief FLEXCOMM0 I2C INDEX 0 */
120#define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0)
121/* @brief FLEXCOMM1 USART INDEX 1 */
122#define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1)
123/* @brief FLEXCOMM1 SPI INDEX 1 */
124#define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1)
125/* @brief FLEXCOMM1 I2C INDEX 1 */
126#define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1)
127/* @brief FLEXCOMM2 USART INDEX 2 */
128#define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2)
129/* @brief FLEXCOMM2 SPI INDEX 2 */
130#define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2)
131/* @brief FLEXCOMM2 I2C INDEX 2 */
132#define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2)
133/* @brief FLEXCOMM3 USART INDEX 3 */
134#define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3)
135/* @brief FLEXCOMM3 SPI INDEX 3 */
136#define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3)
137/* @brief FLEXCOMM3 I2C INDEX 3 */
138#define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3)
139/* @brief FLEXCOMM4 USART INDEX 4 */
140#define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4)
141/* @brief FLEXCOMM4 SPI INDEX 4 */
142#define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4)
143/* @brief FLEXCOMM4 I2C INDEX 4 */
144#define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4)
145/* @brief FLEXCOMM5 USART INDEX 5 */
146#define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5)
147/* @brief FLEXCOMM5 SPI INDEX 5 */
148#define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5)
149/* @brief FLEXCOMM5 I2C INDEX 5 */
150#define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5)
151/* @brief FLEXCOMM6 USART INDEX 6 */
152#define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6)
153/* @brief FLEXCOMM6 SPI INDEX 6 */
154#define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6)
155/* @brief FLEXCOMM6 I2C INDEX 6 */
156#define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6)
157/* @brief FLEXCOMM7 I2S INDEX 0 */
158#define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (0)
159/* @brief FLEXCOMM7 USART INDEX 7 */
160#define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7)
161/* @brief FLEXCOMM7 SPI INDEX 7 */
162#define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7)
163/* @brief FLEXCOMM7 I2C INDEX 7 */
164#define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7)
165/* @brief FLEXCOMM7 I2S INDEX 1 */
166#define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (1)
167/* @brief I2S has DMIC interconnection */
168#define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) \
169 (((x) == FLEXCOMM0) ? (0) : \
170 (((x) == FLEXCOMM1) ? (0) : \
171 (((x) == FLEXCOMM2) ? (0) : \
172 (((x) == FLEXCOMM3) ? (0) : \
173 (((x) == FLEXCOMM4) ? (0) : \
174 (((x) == FLEXCOMM5) ? (0) : \
175 (((x) == FLEXCOMM6) ? (0) : \
176 (((x) == FLEXCOMM7) ? (1) : (-1)))))))))
177
178/* I2S module features */
179
180/* @brief I2S support dual channel transfer */
181#define FSL_FEATURE_I2S_SUPPORT_SECONDARY_CHANNEL (0)
182/* @brief I2S has DMIC interconnection */
183#define FSL_FEATURE_FLEXCOMM_I2S_HAS_DMIC_INTERCONNECTION (1)
184
185/* MAILBOX module features */
186
187/* @brief Mailbox side for current core */
188#define FSL_FEATURE_MAILBOX_SIDE_B (1)
189/* @brief Mailbox has no reset control */
190#define FSL_FEATURE_MAILBOX_HAS_NO_RESET (1)
191
192/* MRT module features */
193
194/* @brief number of channels. */
195#define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4)
196
197/* interrupt module features */
198
199/* @brief Lowest interrupt request number. */
200#define FSL_FEATURE_INTERRUPT_IRQ_MIN (-14)
201/* @brief Highest interrupt request number. */
202#define FSL_FEATURE_INTERRUPT_IRQ_MAX (105)
203
204/* PINT module features */
205
206/* @brief Number of connected outputs */
207#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (4)
208
209/* RTC module features */
210
211/* @brief RTC has no reset control */
212#define FSL_FEATURE_RTC_HAS_NO_RESET (1)
213
214/* SCT module features */
215
216/* @brief Number of events */
217#define FSL_FEATURE_SCT_NUMBER_OF_EVENTS (10)
218/* @brief Number of states */
219#define FSL_FEATURE_SCT_NUMBER_OF_STATES (10)
220/* @brief Number of match capture */
221#define FSL_FEATURE_SCT_NUMBER_OF_MATCH_CAPTURE (10)
222/* @brief Number of outputs */
223#define FSL_FEATURE_SCT_NUMBER_OF_OUTPUTS (8)
224
225/* SYSCON module features */
226
227/* @brief Pointer to ROM IAP entry functions */
228#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x03000205)
229/* @brief Flash page size in bytes */
230#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (256)
231/* @brief Flash sector size in bytes */
232#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (32768)
233/* @brief Flash size in bytes */
234#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (262144)
235/* @brief IAP has Flash read & write function */
236#define FSL_FEATURE_IAP_HAS_FLASH_FUNCTION (1)
237/* @brief IAP has read Flash signature function */
238#define FSL_FEATURE_IAP_HAS_FLASH_SIGNATURE_READ (1)
239/* @brief IAP has read extended Flash signature function */
240#define FSL_FEATURE_IAP_HAS_FLASH_EXTENDED_SIGNATURE_READ (0)
241
242/* SysTick module features */
243
244/* @brief Systick has external reference clock. */
245#define FSL_FEATURE_SYSTICK_HAS_EXT_REF (0)
246/* @brief Systick external reference clock is core clock divided by this value. */
247#define FSL_FEATURE_SYSTICK_EXT_REF_CORE_DIV (0)
248
249/* USB module features */
250
251/* @brief Number of the endpoint in USB FS */
252#define FSL_FEATURE_USB_EP_NUM (5)
253
254#endif /* _LPC54114_cm0plus_FEATURES_H_ */
255
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