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diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/LPC804/LPC804_features.h b/lib/chibios-contrib/ext/mcux-sdk/devices/LPC804/LPC804_features.h
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1/*
2** ###################################################################
3** Version: rev. 1.0, 2018-01-09
4** Build: b190816
5**
6** Abstract:
7** Chip specific module features.
8**
9** Copyright 2016 Freescale Semiconductor, Inc.
10** Copyright 2016-2019 NXP
11** All rights reserved.
12**
13** SPDX-License-Identifier: BSD-3-Clause
14**
15** http: www.nxp.com
16** mail: [email protected]
17**
18** Revisions:
19** - rev. 1.0 (2018-01-09)
20** Initial version.
21**
22** ###################################################################
23*/
24
25#ifndef _LPC804_FEATURES_H_
26#define _LPC804_FEATURES_H_
27
28/* SOC module features */
29
30#if defined(CPU_LPC804M101JDH20) || defined(CPU_LPC804UK)
31 /* @brief ADC availability on the SoC. */
32 #define FSL_FEATURE_SOC_ADC_COUNT (1)
33 /* @brief CAPT availability on the SoC. */
34 #define FSL_FEATURE_SOC_CAPT_COUNT (1)
35 /* @brief CRC availability on the SoC. */
36 #define FSL_FEATURE_SOC_CRC_COUNT (1)
37 /* @brief CTIMER availability on the SoC. */
38 #define FSL_FEATURE_SOC_CTIMER_COUNT (1)
39 /* @brief GPIO availability on the SoC. */
40 #define FSL_FEATURE_SOC_GPIO_COUNT (1)
41 /* @brief I2C availability on the SoC. */
42 #define FSL_FEATURE_SOC_I2C_COUNT (2)
43 /* @brief IOCON availability on the SoC. */
44 #define FSL_FEATURE_SOC_IOCON_COUNT (1)
45 /* @brief MRT availability on the SoC. */
46 #define FSL_FEATURE_SOC_MRT_COUNT (1)
47 /* @brief PINT availability on the SoC. */
48 #define FSL_FEATURE_SOC_PINT_COUNT (1)
49 /* @brief PMU availability on the SoC. */
50 #define FSL_FEATURE_SOC_PMU_COUNT (1)
51 /* @brief SPI availability on the SoC. */
52 #define FSL_FEATURE_SOC_SPI_COUNT (1)
53 /* @brief SWM availability on the SoC. */
54 #define FSL_FEATURE_SOC_SWM_COUNT (1)
55 /* @brief SYSCON availability on the SoC. */
56 #define FSL_FEATURE_SOC_SYSCON_COUNT (1)
57 /* @brief USART availability on the SoC. */
58 #define FSL_FEATURE_SOC_USART_COUNT (2)
59 /* @brief WWDT availability on the SoC. */
60 #define FSL_FEATURE_SOC_WWDT_COUNT (1)
61#elif defined(CPU_LPC804M101JDH24) || defined(CPU_LPC804M101JHI33) || defined(CPU_LPC804M111JDH24)
62 /* @brief ADC availability on the SoC. */
63 #define FSL_FEATURE_SOC_ADC_COUNT (1)
64 /* @brief CAPT availability on the SoC. */
65 #define FSL_FEATURE_SOC_CAPT_COUNT (1)
66 /* @brief CRC availability on the SoC. */
67 #define FSL_FEATURE_SOC_CRC_COUNT (1)
68 /* @brief CTIMER availability on the SoC. */
69 #define FSL_FEATURE_SOC_CTIMER_COUNT (1)
70 /* @brief DAC availability on the SoC. */
71 #define FSL_FEATURE_SOC_DAC_COUNT (1)
72 /* @brief GPIO availability on the SoC. */
73 #define FSL_FEATURE_SOC_GPIO_COUNT (1)
74 /* @brief I2C availability on the SoC. */
75 #define FSL_FEATURE_SOC_I2C_COUNT (2)
76 /* @brief IOCON availability on the SoC. */
77 #define FSL_FEATURE_SOC_IOCON_COUNT (1)
78 /* @brief MRT availability on the SoC. */
79 #define FSL_FEATURE_SOC_MRT_COUNT (1)
80 /* @brief PINT availability on the SoC. */
81 #define FSL_FEATURE_SOC_PINT_COUNT (1)
82 /* @brief PMU availability on the SoC. */
83 #define FSL_FEATURE_SOC_PMU_COUNT (1)
84 /* @brief SPI availability on the SoC. */
85 #define FSL_FEATURE_SOC_SPI_COUNT (1)
86 /* @brief SWM availability on the SoC. */
87 #define FSL_FEATURE_SOC_SWM_COUNT (1)
88 /* @brief SYSCON availability on the SoC. */
89 #define FSL_FEATURE_SOC_SYSCON_COUNT (1)
90 /* @brief USART availability on the SoC. */
91 #define FSL_FEATURE_SOC_USART_COUNT (2)
92 /* @brief WWDT availability on the SoC. */
93 #define FSL_FEATURE_SOC_WWDT_COUNT (1)
94#endif
95
96/* ACOMP module features */
97
98/* @brief Has INTENA bitfile in CTRL reigster. */
99#define FSL_FEATURE_ACOMP_HAS_CTRL_INTENA (1)
100
101/* ADC module features */
102
103/* @brief Do not has input select (register INSEL). */
104#define FSL_FEATURE_ADC_HAS_NO_INSEL (1)
105/* @brief Has ASYNMODE bitfile in CTRL reigster. */
106#define FSL_FEATURE_ADC_HAS_CTRL_ASYNMODE (0)
107/* @brief Has ASYNMODE bitfile in CTRL reigster. */
108#define FSL_FEATURE_ADC_HAS_CTRL_RESOL (0)
109/* @brief Has ASYNMODE bitfile in CTRL reigster. */
110#define FSL_FEATURE_ADC_HAS_CTRL_BYPASSCAL (0)
111/* @brief Has ASYNMODE bitfile in CTRL reigster. */
112#define FSL_FEATURE_ADC_HAS_CTRL_TSAMP (0)
113/* @brief Has ASYNMODE bitfile in CTRL reigster. */
114#define FSL_FEATURE_ADC_HAS_CTRL_LPWRMODE (1)
115/* @brief Has ASYNMODE bitfile in CTRL reigster. */
116#define FSL_FEATURE_ADC_HAS_CTRL_CALMODE (0)
117/* @brief Has startup register. */
118#define FSL_FEATURE_ADC_HAS_STARTUP_REG (0)
119/* @brief Has ADTrim register */
120#define FSL_FEATURE_ADC_HAS_TRIM_REG (0)
121/* @brief Has Calibration register. */
122#define FSL_FEATURE_ADC_HAS_CALIB_REG (0)
123/* @brief Has no Calibration function. */
124#define FSL_FEATURE_ADC_HAS_NO_CALIB_FUNC (1)
125
126/* CAPT module features */
127
128/* @brief Has DMA bitfile in CTRL reigster. */
129#define FSL_FEATURE_CAPT_HAS_CTRL_DMA (0)
130
131/* CLOCK module features */
132
133/* @brief GPIOINT clock source. */
134#define FSL_FEATURE_CLOCK_HAS_GPIOINT_CLOCK_SOURCE (1)
135
136/* CTIMER module features */
137
138/* @brief Writing a zero asserts the CTIMER reset. */
139#define FSL_FEATURE_CTIMER_WRITE_ZERO_ASSERT_RESET (1)
140
141/* IOCON module features */
142
143/* No feature definitions */
144
145/* MRT module features */
146
147/* @brief Writing a zero asserts the MRT reset. */
148#define FSL_FEATURE_MRT_WRITE_ZERO_ASSERT_RESET (1)
149/* @brief Has no MULTITASK bitfile in MODCFG reigster. */
150#define FSL_FEATURE_MRT_HAS_NO_MODCFG_MULTITASK (1)
151/* @brief Has no INUSE bitfile in STAT reigster. */
152#define FSL_FEATURE_MRT_HAS_NO_CHANNEL_STAT_INUSE (1)
153/* @brief number of channels. */
154#define FSL_FEATURE_MRT_NUMBER_OF_CHANNELS (4)
155
156/* NVIC module features */
157
158/* @brief Number of connected outputs. */
159#define FSL_FEATURE_NVIC_HAS_SHARED_INTERTTUPT_NUMBER (1)
160
161/* PINT module features */
162
163/* @brief Number of connected outputs */
164#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS (8)
165
166/* SPI module features */
167
168/* @brief Has SPOL0 bitfile in CFG reigster. */
169#define FSL_FEATURE_SPI_HAS_SSEL0 (1)
170/* @brief Has SPOL1 bitfile in CFG reigster. */
171#define FSL_FEATURE_SPI_HAS_SSEL1 (1)
172/* @brief Has SPOL2 bitfile in CFG reigster. */
173#define FSL_FEATURE_SPI_HAS_SSEL2 (0)
174/* @brief Has SPOL3 bitfile in CFG reigster. */
175#define FSL_FEATURE_SPI_HAS_SSEL3 (0)
176
177/* SWM module features */
178
179/* @brief Has SWM PINENABLE0 ACMP I3. */
180#define FSL_FEATURE_SWM_HAS_PINENABLE0_ACMP_I3 (1)
181/* @brief Has SWM PINENABLE0 ACMP I4. */
182#define FSL_FEATURE_SWM_HAS_PINENABLE0_ACMP_I4 (1)
183/* @brief Has SWM PINENABLE0 ACMP I5. */
184#define FSL_FEATURE_SWM_HAS_PINENABLE0_ACMP_I5 (1)
185/* @brief Has PINASSIGNFIXED0 register. */
186#define FSL_FEATURE_SWM_HAS_PINASSIGNFIXED0_REGISTER (1)
187
188/* SYSCON module features */
189
190/* @brief Pointer to ROM IAP entry functions */
191#define FSL_FEATURE_SYSCON_IAP_ENTRY_LOCATION (0x0F001FF1)
192/* @brief Flash page size in bytes */
193#define FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES (64)
194/* @brief Flash sector size in bytes */
195#define FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES (1024)
196/* @brief Flash size in bytes */
197#define FSL_FEATURE_SYSCON_FLASH_SIZE_BYTES (32640)
198/* @brief IAP has Flash read & write function */
199#define FSL_FEATURE_IAP_HAS_FLASH_FUNCTION (1)
200/* @brief Starter register discontinuous. */
201#define FSL_FEATURE_SYSCON_STARTER_DISCONTINUOUS (1)
202/* @brief Has PINTSEL register. */
203#define FSL_FEATURE_SYSCON_HAS_PINT_SEL_REGISTER (1)
204/* @brief Has fixed reference clock for flash controller */
205#define FSL_FEATURE_SYSCON_HAS_FLASH_REFERENCE_CLOCK (1)
206
207/* USART module features */
208
209/* @brief Has OSR (register OSR). */
210#define FSL_FEATURE_USART_HAS_OSR_REGISTER (1)
211/* @brief Has TXIDLEEN bitfile in INTENSET reigster. */
212#define FSL_FEATURE_USART_HAS_INTENSET_TXIDLEEN (1)
213/* @brief Has ABERREN bitfile in INTENSET reigster. */
214#define FSL_FEATURE_USART_HAS_ABERR_CHECK (1)
215
216/* WKT module features */
217
218/* @brief Has SEL_EXTCLK bitfile in CTRL reigster. */
219#define FSL_FEATURE_WKT_HAS_CTRL_SEL_EXTCLK (1)
220
221/* WWDT module features */
222
223/* @brief Has no RESET register. */
224#define FSL_FEATURE_WWDT_HAS_NO_RESET (1)
225/* @brief Has LPOSC as clock source. */
226#define FSL_FEATURE_WWDT_HAS_LPOSC_CLOCK_SOURCE (1)
227
228#endif /* _LPC804_FEATURES_H_ */
229
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 22:56:35 +0100