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1/*
2** ###################################################################
3** Processors: LPC845M301JBD48
4** LPC845M301JBD64
5** LPC845M301JHI33
6** LPC845M301JHI48
7**
8** Compilers: GNU C Compiler
9** IAR ANSI C/C++ Compiler for ARM
10** Keil ARM C/C++ Compiler
11** MCUXpresso Compiler
12**
13** Reference manual: LPC84x User manual Rev.1.6 8 Dec 2017
14** Version: rev. 1.2, 2017-06-08
15** Build: b201015
16**
17** Abstract:
18** Provides a system configuration function and a global variable that
19** contains the system frequency. It configures the device and initializes
20** the oscillator (PLL) that is part of the microcontroller device.
21**
22** Copyright 2016 Freescale Semiconductor, Inc.
23** Copyright 2016-2020 NXP
24** All rights reserved.
25**
26** SPDX-License-Identifier: BSD-3-Clause
27**
28** http: www.nxp.com
29** mail: [email protected]
30**
31** Revisions:
32** - rev. 1.0 (2016-08-12)
33** Initial version.
34** - rev. 1.1 (2016-11-25)
35** Update CANFD and Classic CAN register.
36** Add MAC TIMERSTAMP registers.
37** - rev. 1.2 (2017-06-08)
38** Remove RTC_CTRL_RTC_OSC_BYPASS.
39** SYSCON_ARMTRCLKDIV rename to SYSCON_ARMTRACECLKDIV.
40** Remove RESET and HALT from SYSCON_AHBCLKDIV.
41**
42** ###################################################################
43*/
44
45/*!
46 * @file LPC845
47 * @version 1.2
48 * @date 2017-06-08
49 * @brief Device specific configuration file for LPC845 (implementation file)
50 *
51 * Provides a system configuration function and a global variable that contains
52 * the system frequency. It configures the device and initializes the oscillator
53 * (PLL) that is part of the microcontroller device.
54 */
55
56#include <stdint.h>
57#include "fsl_device_registers.h"
58
59
60
61
62
63/* ----------------------------------------------------------------------------
64 -- Core clock
65 ---------------------------------------------------------------------------- */
66
67uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
68
69/* ----------------------------------------------------------------------------
70 -- SystemInit()
71 ---------------------------------------------------------------------------- */
72
73void SystemInit (void) {
74
75#if defined(__MCUXPRESSO)
76 extern void(*const g_pfnVectors[]) (void);
77 SCB->VTOR = (uint32_t) &g_pfnVectors;
78#else
79 extern void *__Vectors;
80 SCB->VTOR = (uint32_t) &__Vectors;
81#endif
82 SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
83 SystemInitHook();
84}
85
86/* ----------------------------------------------------------------------------
87 -- SystemCoreClockUpdate()
88 ---------------------------------------------------------------------------- */
89
90void SystemCoreClockUpdate (void) {
91 uint32_t wdt_osc = 0U;
92 uint32_t fro_osc = 0U;
93
94 /* Determine clock frequency according to clock register values */
95 switch ((SYSCON->FROOSCCTRL ) & 0x03U) {
96 case 0U: fro_osc = 18000000U; break;
97 case 1U: fro_osc = 24000000U; break;
98 case 2U: fro_osc = 30000000U; break;
99 case 3U: fro_osc = 30000000U; break;
100 default: fro_osc = 0U; break;
101 }
102 if (((SYSCON->FROOSCCTRL >> SYSCON_FROOSCCTRL_FRO_DIRECT_SHIFT) & 0x01U) == 0U) {
103 fro_osc = fro_osc >> 1U;
104 }
105
106 switch ((SYSCON->WDTOSCCTRL >> SYSCON_WDTOSCCTRL_FREQSEL_SHIFT) & 0x0FU) {
107 case 0U: wdt_osc = 0U; break;
108 case 1U: wdt_osc = 600000U; break;
109 case 2U: wdt_osc = 1050000U; break;
110 case 3U: wdt_osc = 1400000U; break;
111 case 4U: wdt_osc = 1750000U; break;
112 case 5U: wdt_osc = 2100000U; break;
113 case 6U: wdt_osc = 2400000U; break;
114 case 7U: wdt_osc = 2700000U; break;
115 case 8U: wdt_osc = 3000000U; break;
116 case 9U: wdt_osc = 3250000U; break;
117 case 10U: wdt_osc = 3500000U; break;
118 case 11U: wdt_osc = 3750000U; break;
119 case 12U: wdt_osc = 4000000U; break;
120 case 13U: wdt_osc = 4200000U; break;
121 case 14U: wdt_osc = 4400000U; break;
122 case 15U: wdt_osc = 4600000U; break;
123 default: wdt_osc = 0U; break;
124 }
125 wdt_osc /= (((SYSCON->WDTOSCCTRL & SYSCON_WDTOSCCTRL_DIVSEL_MASK) + 1U) << 1U);
126
127 switch (SYSCON->MAINCLKPLLSEL & 0x01U) {
128 case 0U: /* main_clk_pre_pll */
129 switch (SYSCON->MAINCLKSEL & SYSCON_MAINCLKSEL_SEL_MASK) {
130 case 0U: /* Free running oscillator (FRO) */
131 SystemCoreClock = fro_osc;
132 break;
133 case 1U: /* System oscillator */
134 SystemCoreClock = CLK_OSC_IN;
135 break;
136 case 2U: /* watchdog oscillator */
137 SystemCoreClock = wdt_osc;
138 break;
139 case 3U: /* Free running oscillator (FRO) / 2 */
140 SystemCoreClock = (fro_osc >> 1U);
141 break;
142 default:
143 SystemCoreClock = 0U;
144 break;
145 }
146 break;
147 case 1U: /* System PLL Clock Out */
148 switch (SYSCON->SYSPLLCLKSEL & SYSCON_SYSPLLCLKSEL_SEL_MASK) {
149 case 0U: /* Free running oscillator (FRO) */
150 SystemCoreClock = fro_osc * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
151 break;
152 case 1U: /* System oscillator */
153 SystemCoreClock = CLK_OSC_IN * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
154 break;
155 case 2U: /* watchdog oscillator */
156 SystemCoreClock = wdt_osc * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
157 break;
158 case 3U: /* Free running oscillator (FRO) / 2 */
159 SystemCoreClock = (fro_osc >> 1U) * ((SYSCON->SYSPLLCTRL & SYSCON_SYSPLLCTRL_MSEL_MASK) + 1U);
160 break;
161 default:
162 SystemCoreClock = 0U;
163 break;
164 }
165 break;
166 default:
167 SystemCoreClock = 0U;
168 break;
169 }
170
171 SystemCoreClock /= SYSCON->SYSAHBCLKDIV;
172}
173
174/* ----------------------------------------------------------------------------
175 -- SystemInitHook()
176 ---------------------------------------------------------------------------- */
177
178__attribute__ ((weak)) void SystemInitHook (void) {
179 /* Void implementation of the weak function. */
180}