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1/*
2** ###################################################################
3** Processors: MIMX8QX2AVLFZ
4** MIMX8QX2AVOFZ
5**
6** Compilers: GNU C Compiler
7** IAR ANSI C/C++ Compiler for ARM
8** Keil ARM C/C++ Compiler
9**
10** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
11** Version: rev. 4.0, 2020-06-19
12** Build: b200806
13**
14** Abstract:
15** Provides a system configuration function and a global variable that
16** contains the system frequency. It configures the device and initializes
17** the oscillator (PLL) that is part of the microcontroller device.
18**
19** Copyright 2016 Freescale Semiconductor, Inc.
20** Copyright 2016-2020 NXP
21** All rights reserved.
22**
23** SPDX-License-Identifier: BSD-3-Clause
24**
25** http: www.nxp.com
26** mail: [email protected]
27**
28** Revisions:
29** - rev. 1.0 (2016-06-02)
30** Initial version.
31** - rev. 2.0 (2017-08-23)
32** RevA Header EAR
33** - rev. 3.0 (2018-08-22)
34** RevB Header EAR
35** - rev. 4.0 (2020-06-19)
36** RevC Header RFP
37**
38** ###################################################################
39*/
40
41/*!
42 * @file MIMX8QX2_cm4
43 * @version 1.0
44 * @date 060820
45 * @brief Device specific configuration file for MIMX8QX2_cm4 (header file)
46 *
47 * Provides a system configuration function and a global variable that contains
48 * the system frequency. It configures the device and initializes the oscillator
49 * (PLL) that is part of the microcontroller device.
50 */
51#ifndef _SYSTEM_MIMX8QX2_CM4_H_
52#define _SYSTEM_MIMX8QX2_CM4_H_ /**< Symbol preventing repeated inclusion */
53
54#ifdef __cplusplus
55extern "C" {
56#endif
57
58#include <stdint.h>
59#include "main/rpc.h"
60#include "svc/pm/pm_api.h"
61
62#ifndef DISABLE_WDOG
63 #define DISABLE_WDOG 1
64#endif
65
66/**
67 * When downloading/debuging with Debugger, the Parity/ECC error check is disabled by debugger.
68 * Define ENABLE_ECC_DEBUG to non-zero value to re-enable the check during debugging.
69 */
70#ifndef ENABLE_ECC_DEBUG
71 #define ENABLE_ECC_DEBUG 0
72#endif
73
74#define DEFAULT_SYSTEM_CLOCK 264000000u /* Default System clock value */
75
76/**
77 * @brief System clock frequency (core clock)
78 *
79 * The system clock frequency supplied to the SysTick timer and the processor
80 * core clock. This variable can be used by the user application to setup the
81 * SysTick timer or configure other parameters. It may also be used by debugger to
82 * query the frequency of the debug timer or configure the trace clock speed
83 * SystemCoreClock is initialized with a correct predefined value.
84 */
85extern uint32_t SystemCoreClock;
86
87/**
88 * @brief Setup the microcontroller system.
89 *
90 * Typically this function configures the oscillator (PLL) that is part of the
91 * microcontroller device. For systems with variable clock speed it also updates
92 * the variable SystemCoreClock. SystemInit is called from startup_device file.
93 */
94void SystemInit (void);
95
96/**
97 * @brief Updates the SystemCoreClock variable.
98 *
99 * It must be called whenever the core clock is changed during program
100 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
101 * the current core clock.
102 */
103void SystemCoreClockUpdate (void);
104
105/**
106 * @brief Open the SCFW IPC channel.
107 *
108 * Typically this function opens the IPC channel between current Subsystem and SCU.
109 * This function uses SCFW API to initialize the MU channel. SystemInitScfwIpc should
110 * be called before using SCFW API.
111 */
112void SystemInitScfwIpc (void);
113
114/**
115 * @brief Get the SCFW IPC handle.
116 *
117 * This function gets the IPC handle which could be used to communicate with SCFW.
118 * SystemGetScfwIpcHandle should be called after SCFW IPC channel is initialized.
119 */
120sc_ipc_t SystemGetScfwIpcHandle (void);
121
122#ifdef __cplusplus
123}
124#endif
125
126#endif /* _SYSTEM_MIMX8QX2_CM4_H_ */