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1/*
2** ###################################################################
3** Processor: MIMX8QX4AVLFZ
4** Compilers: GNU C Compiler
5** IAR ANSI C/C++ Compiler for ARM
6** Keil ARM C/C++ Compiler
7**
8** Reference manual: IMX8DQXPRM, Rev. E, 6/2019
9** Version: rev. 4.0, 2020-06-19
10** Build: b200806
11**
12** Abstract:
13** Provides a system configuration function and a global variable that
14** contains the system frequency. It configures the device and initializes
15** the oscillator (PLL) that is part of the microcontroller device.
16**
17** Copyright 2016 Freescale Semiconductor, Inc.
18** Copyright 2016-2020 NXP
19** All rights reserved.
20**
21** SPDX-License-Identifier: BSD-3-Clause
22**
23** http: www.nxp.com
24** mail: [email protected]
25**
26** Revisions:
27** - rev. 1.0 (2016-06-02)
28** Initial version.
29** - rev. 2.0 (2017-08-23)
30** RevA Header EAR
31** - rev. 3.0 (2018-08-22)
32** RevB Header EAR
33** - rev. 4.0 (2020-06-19)
34** RevC Header RFP
35**
36** ###################################################################
37*/
38
39/*!
40 * @file MIMX8QX4_cm4
41 * @version 1.0
42 * @date 060820
43 * @brief Device specific configuration file for MIMX8QX4_cm4 (header file)
44 *
45 * Provides a system configuration function and a global variable that contains
46 * the system frequency. It configures the device and initializes the oscillator
47 * (PLL) that is part of the microcontroller device.
48 */
49#ifndef _SYSTEM_MIMX8QX4_CM4_H_
50#define _SYSTEM_MIMX8QX4_CM4_H_ /**< Symbol preventing repeated inclusion */
51
52#ifdef __cplusplus
53extern "C" {
54#endif
55
56#include <stdint.h>
57#include "main/rpc.h"
58#include "svc/pm/pm_api.h"
59
60#ifndef DISABLE_WDOG
61 #define DISABLE_WDOG 1
62#endif
63
64/**
65 * When downloading/debuging with Debugger, the Parity/ECC error check is disabled by debugger.
66 * Define ENABLE_ECC_DEBUG to non-zero value to re-enable the check during debugging.
67 */
68#ifndef ENABLE_ECC_DEBUG
69 #define ENABLE_ECC_DEBUG 0
70#endif
71
72#define DEFAULT_SYSTEM_CLOCK 264000000u /* Default System clock value */
73
74/**
75 * @brief System clock frequency (core clock)
76 *
77 * The system clock frequency supplied to the SysTick timer and the processor
78 * core clock. This variable can be used by the user application to setup the
79 * SysTick timer or configure other parameters. It may also be used by debugger to
80 * query the frequency of the debug timer or configure the trace clock speed
81 * SystemCoreClock is initialized with a correct predefined value.
82 */
83extern uint32_t SystemCoreClock;
84
85/**
86 * @brief Setup the microcontroller system.
87 *
88 * Typically this function configures the oscillator (PLL) that is part of the
89 * microcontroller device. For systems with variable clock speed it also updates
90 * the variable SystemCoreClock. SystemInit is called from startup_device file.
91 */
92void SystemInit (void);
93
94/**
95 * @brief Updates the SystemCoreClock variable.
96 *
97 * It must be called whenever the core clock is changed during program
98 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
99 * the current core clock.
100 */
101void SystemCoreClockUpdate (void);
102
103/**
104 * @brief Open the SCFW IPC channel.
105 *
106 * Typically this function opens the IPC channel between current Subsystem and SCU.
107 * This function uses SCFW API to initialize the MU channel. SystemInitScfwIpc should
108 * be called before using SCFW API.
109 */
110void SystemInitScfwIpc (void);
111
112/**
113 * @brief Get the SCFW IPC handle.
114 *
115 * This function gets the IPC handle which could be used to communicate with SCFW.
116 * SystemGetScfwIpcHandle should be called after SCFW IPC channel is initialized.
117 */
118sc_ipc_t SystemGetScfwIpcHandle (void);
119
120#ifdef __cplusplus
121}
122#endif
123
124#endif /* _SYSTEM_MIMX8QX4_CM4_H_ */