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Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT1011/gcc/startup_MIMXRT1011.S')
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diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT1011/gcc/startup_MIMXRT1011.S b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT1011/gcc/startup_MIMXRT1011.S
new file mode 100644
index 000000000..7ca393e82
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT1011/gcc/startup_MIMXRT1011.S
@@ -0,0 +1,861 @@
1/* ------------------------------------------------------------------------- */
2/* @file: startup_MIMXRT1011.s */
3/* @purpose: CMSIS Cortex-M7 Core Device Startup File */
4/* MIMXRT1011 */
5/* @version: 1.0 */
6/* @date: 2019-8-1 */
7/* @build: b190801 */
8/* ------------------------------------------------------------------------- */
9/* */
10/* Copyright 1997-2016 Freescale Semiconductor, Inc. */
11/* Copyright 2016-2019 NXP */
12/* All rights reserved. */
13/* */
14/* SPDX-License-Identifier: BSD-3-Clause */
15/*****************************************************************************/
16/* Version: GCC for ARM Embedded Processors */
17/*****************************************************************************/
18 .syntax unified
19 .arch armv7-m
20
21 .section .isr_vector, "a"
22 .align 2
23 .globl __isr_vector
24__isr_vector:
25 .long __StackTop /* Top of Stack */
26 .long Reset_Handler /* Reset Handler */
27 .long NMI_Handler /* NMI Handler*/
28 .long HardFault_Handler /* Hard Fault Handler*/
29 .long MemManage_Handler /* MPU Fault Handler*/
30 .long BusFault_Handler /* Bus Fault Handler*/
31 .long UsageFault_Handler /* Usage Fault Handler*/
32 .long 0 /* Reserved*/
33 .long 0 /* Reserved*/
34 .long 0 /* Reserved*/
35 .long 0 /* Reserved*/
36 .long SVC_Handler /* SVCall Handler*/
37 .long DebugMon_Handler /* Debug Monitor Handler*/
38 .long 0 /* Reserved*/
39 .long PendSV_Handler /* PendSV Handler*/
40 .long SysTick_Handler /* SysTick Handler*/
41
42 /* External Interrupts*/
43 .long DMA0_IRQHandler /* DMA channel 0 transfer complete*/
44 .long DMA1_IRQHandler /* DMA channel 1 transfer complete*/
45 .long DMA2_IRQHandler /* DMA channel 2 transfer complete*/
46 .long DMA3_IRQHandler /* DMA channel 3 transfer complete*/
47 .long DMA4_IRQHandler /* DMA channel 4 transfer complete*/
48 .long DMA5_IRQHandler /* DMA channel 5 transfer complete*/
49 .long DMA6_IRQHandler /* DMA channel 6 transfer complete*/
50 .long DMA7_IRQHandler /* DMA channel 7 transfer complete*/
51 .long DMA8_IRQHandler /* DMA channel 8 transfer complete*/
52 .long DMA9_IRQHandler /* DMA channel 9 transfer complete*/
53 .long DMA10_IRQHandler /* DMA channel 10 transfer complete*/
54 .long DMA11_IRQHandler /* DMA channel 11 transfer complete*/
55 .long DMA12_IRQHandler /* DMA channel 12 transfer complete*/
56 .long DMA13_IRQHandler /* DMA channel 13 transfer complete*/
57 .long DMA14_IRQHandler /* DMA channel 14 transfer complete*/
58 .long DMA15_IRQHandler /* DMA channel 15 transfer complete*/
59 .long DMA_ERROR_IRQHandler /* DMA error interrupt channels 0-15*/
60 .long CTI0_ERROR_IRQHandler /* CTI trigger outputs*/
61 .long CTI1_ERROR_IRQHandler /* CTI trigger outputs*/
62 .long CORE_IRQHandler /* CorePlatform exception IRQ*/
63 .long LPUART1_IRQHandler /* LPUART1 TX interrupt and RX interrupt*/
64 .long LPUART2_IRQHandler /* LPUART2 TX interrupt and RX interrupt*/
65 .long LPUART3_IRQHandler /* LPUART3 TX interrupt and RX interrupt*/
66 .long LPUART4_IRQHandler /* LPUART4 TX interrupt and RX interrupt*/
67 .long PIT_IRQHandler /* PIT interrupt*/
68 .long USB_OTG1_IRQHandler /* USBO2 USB OTG1*/
69 .long FLEXSPI_IRQHandler /* FlexSPI0 interrupt*/
70 .long FLEXRAM_IRQHandler /* FlexRAM address out of range Or access hit IRQ*/
71 .long LPI2C1_IRQHandler /* LPI2C1 interrupt*/
72 .long LPI2C2_IRQHandler /* LPI2C2 interrupt*/
73 .long GPT1_IRQHandler /* GPT1 interrupt*/
74 .long GPT2_IRQHandler /* GPT2 interrupt*/
75 .long LPSPI1_IRQHandler /* LPSPI1 single interrupt vector for all sources*/
76 .long LPSPI2_IRQHandler /* LPSPI2 single interrupt vector for all sources*/
77 .long PWM1_0_IRQHandler /* PWM1 capture 0, compare 0, or reload 0 interrupt*/
78 .long PWM1_1_IRQHandler /* PWM1 capture 1, compare 1, or reload 0 interrupt*/
79 .long PWM1_2_IRQHandler /* PWM1 capture 2, compare 2, or reload 0 interrupt*/
80 .long PWM1_3_IRQHandler /* PWM1 capture 3, compare 3, or reload 0 interrupt*/
81 .long PWM1_FAULT_IRQHandler /* PWM1 fault or reload error interrupt*/
82 .long KPP_IRQHandler /* Keypad nterrupt*/
83 .long SRC_IRQHandler /* SRC interrupt*/
84 .long GPR_IRQ_IRQHandler /* Used to notify cores on exception condition while boot*/
85 .long CCM_1_IRQHandler /* CCM IRQ1 interrupt*/
86 .long CCM_2_IRQHandler /* CCM IRQ2 interrupt*/
87 .long EWM_IRQHandler /* EWM interrupt*/
88 .long WDOG2_IRQHandler /* WDOG2 interrupt*/
89 .long SNVS_HP_WRAPPER_IRQHandler /* SNVS Functional Interrupt*/
90 .long SNVS_HP_WRAPPER_TZ_IRQHandler /* SNVS Security Interrupt*/
91 .long SNVS_LP_WRAPPER_IRQHandler /* ON-OFF button press shorter than 5 secs (pulse event)*/
92 .long CSU_IRQHandler /* CSU interrupt*/
93 .long DCP_IRQHandler /* Combined DCP channel interrupts(except channel 0) and CRC interrupt*/
94 .long DCP_VMI_IRQHandler /* IRQ of DCP channel 0*/
95 .long Reserved68_IRQHandler /* Reserved interrupt*/
96 .long TRNG_IRQHandler /* TRNG interrupt*/
97 .long Reserved70_IRQHandler /* Reserved interrupt*/
98 .long Reserved71_IRQHandler /* Reserved interrupt*/
99 .long SAI1_IRQHandler /* SAI1 interrupt*/
100 .long RTWDOG_IRQHandler /* RTWDOG interrupt*/
101 .long SAI3_RX_IRQHandler /* SAI3 interrupt*/
102 .long SAI3_TX_IRQHandler /* SAI3 interrupt*/
103 .long SPDIF_IRQHandler /* SPDIF interrupt*/
104 .long PMU_IRQHandler /* PMU interrupt*/
105 .long XBAR1_IRQ_0_1_2_3_IRQHandler /* XBAR1 interrupt*/
106 .long TEMP_LOW_HIGH_IRQHandler /* TEMPMON interrupt*/
107 .long TEMP_PANIC_IRQHandler /* TEMPMON interrupt*/
108 .long USB_PHY_IRQHandler /* USBPHY (OTG1 UTMI), Interrupt*/
109 .long GPC_IRQHandler /* GPC interrupt*/
110 .long ADC1_IRQHandler /* ADC1 interrupt*/
111 .long FLEXIO1_IRQHandler /* FLEXIO1 interrupt*/
112 .long DCDC_IRQHandler /* DCDC interrupt*/
113 .long GPIO1_Combined_0_15_IRQHandler /* Combined interrupt indication for GPIO1 signal 0 throughout 15*/
114 .long GPIO1_Combined_16_31_IRQHandler /* Combined interrupt indication for GPIO1 signal 16 throughout 31*/
115 .long GPIO2_Combined_0_15_IRQHandler /* Combined interrupt indication for GPIO2 signal 0 throughout 15*/
116 .long GPIO5_Combined_0_15_IRQHandler /* Combined interrupt indication for GPIO5 signal 0 throughout 15*/
117 .long WDOG1_IRQHandler /* WDOG1 interrupt*/
118 .long ADC_ETC_IRQ0_IRQHandler /* ADCETC IRQ0 interrupt*/
119 .long ADC_ETC_IRQ1_IRQHandler /* ADCETC IRQ1 interrupt*/
120 .long ADC_ETC_IRQ2_IRQHandler /* ADCETC IRQ2 interrupt*/
121 .long ADC_ETC_IRQ3_IRQHandler /* ADCETC IRQ3 interrupt*/
122 .long ADC_ETC_ERROR_IRQ_IRQHandler /* ADCETC Error IRQ interrupt*/
123 .long DefaultISR /* 96*/
124 .long DefaultISR /* 97*/
125 .long DefaultISR /* 98*/
126 .long DefaultISR /* 99*/
127 .long DefaultISR /* 100*/
128 .long DefaultISR /* 101*/
129 .long DefaultISR /* 102*/
130 .long DefaultISR /* 103*/
131 .long DefaultISR /* 104*/
132 .long DefaultISR /* 105*/
133 .long DefaultISR /* 106*/
134 .long DefaultISR /* 107*/
135 .long DefaultISR /* 108*/
136 .long DefaultISR /* 109*/
137 .long DefaultISR /* 110*/
138 .long DefaultISR /* 111*/
139 .long DefaultISR /* 112*/
140 .long DefaultISR /* 113*/
141 .long DefaultISR /* 114*/
142 .long DefaultISR /* 115*/
143 .long DefaultISR /* 116*/
144 .long DefaultISR /* 117*/
145 .long DefaultISR /* 118*/
146 .long DefaultISR /* 119*/
147 .long DefaultISR /* 120*/
148 .long DefaultISR /* 121*/
149 .long DefaultISR /* 122*/
150 .long DefaultISR /* 123*/
151 .long DefaultISR /* 124*/
152 .long DefaultISR /* 125*/
153 .long DefaultISR /* 126*/
154 .long DefaultISR /* 127*/
155 .long DefaultISR /* 128*/
156 .long DefaultISR /* 129*/
157 .long DefaultISR /* 130*/
158 .long DefaultISR /* 131*/
159 .long DefaultISR /* 132*/
160 .long DefaultISR /* 133*/
161 .long DefaultISR /* 134*/
162 .long DefaultISR /* 135*/
163 .long DefaultISR /* 136*/
164 .long DefaultISR /* 137*/
165 .long DefaultISR /* 138*/
166 .long DefaultISR /* 139*/
167 .long DefaultISR /* 140*/
168 .long DefaultISR /* 141*/
169 .long DefaultISR /* 142*/
170 .long DefaultISR /* 143*/
171 .long DefaultISR /* 144*/
172 .long DefaultISR /* 145*/
173 .long DefaultISR /* 146*/
174 .long DefaultISR /* 147*/
175 .long DefaultISR /* 148*/
176 .long DefaultISR /* 149*/
177 .long DefaultISR /* 150*/
178 .long DefaultISR /* 151*/
179 .long DefaultISR /* 152*/
180 .long DefaultISR /* 153*/
181 .long DefaultISR /* 154*/
182 .long DefaultISR /* 155*/
183 .long DefaultISR /* 156*/
184 .long DefaultISR /* 157*/
185 .long DefaultISR /* 158*/
186 .long DefaultISR /* 159*/
187 .long DefaultISR /* 160*/
188 .long DefaultISR /* 161*/
189 .long DefaultISR /* 162*/
190 .long DefaultISR /* 163*/
191 .long DefaultISR /* 164*/
192 .long DefaultISR /* 165*/
193 .long DefaultISR /* 166*/
194 .long DefaultISR /* 167*/
195 .long DefaultISR /* 168*/
196 .long DefaultISR /* 169*/
197 .long DefaultISR /* 170*/
198 .long DefaultISR /* 171*/
199 .long DefaultISR /* 172*/
200 .long DefaultISR /* 173*/
201 .long DefaultISR /* 174*/
202 .long DefaultISR /* 175*/
203 .long DefaultISR /* 176*/
204 .long DefaultISR /* 177*/
205 .long DefaultISR /* 178*/
206 .long DefaultISR /* 179*/
207 .long DefaultISR /* 180*/
208 .long DefaultISR /* 181*/
209 .long DefaultISR /* 182*/
210 .long DefaultISR /* 183*/
211 .long DefaultISR /* 184*/
212 .long DefaultISR /* 185*/
213 .long DefaultISR /* 186*/
214 .long DefaultISR /* 187*/
215 .long DefaultISR /* 188*/
216 .long DefaultISR /* 189*/
217 .long DefaultISR /* 190*/
218 .long DefaultISR /* 191*/
219 .long DefaultISR /* 192*/
220 .long DefaultISR /* 193*/
221 .long DefaultISR /* 194*/
222 .long DefaultISR /* 195*/
223 .long DefaultISR /* 196*/
224 .long DefaultISR /* 197*/
225 .long DefaultISR /* 198*/
226 .long DefaultISR /* 199*/
227 .long DefaultISR /* 200*/
228 .long DefaultISR /* 201*/
229 .long DefaultISR /* 202*/
230 .long DefaultISR /* 203*/
231 .long DefaultISR /* 204*/
232 .long DefaultISR /* 205*/
233 .long DefaultISR /* 206*/
234 .long DefaultISR /* 207*/
235 .long DefaultISR /* 208*/
236 .long DefaultISR /* 209*/
237 .long DefaultISR /* 210*/
238 .long DefaultISR /* 211*/
239 .long DefaultISR /* 212*/
240 .long DefaultISR /* 213*/
241 .long DefaultISR /* 214*/
242 .long DefaultISR /* 215*/
243 .long DefaultISR /* 216*/
244 .long DefaultISR /* 217*/
245 .long DefaultISR /* 218*/
246 .long DefaultISR /* 219*/
247 .long DefaultISR /* 220*/
248 .long DefaultISR /* 221*/
249 .long DefaultISR /* 222*/
250 .long DefaultISR /* 223*/
251 .long DefaultISR /* 224*/
252 .long DefaultISR /* 225*/
253 .long DefaultISR /* 226*/
254 .long DefaultISR /* 227*/
255 .long DefaultISR /* 228*/
256 .long DefaultISR /* 229*/
257 .long DefaultISR /* 230*/
258 .long DefaultISR /* 231*/
259 .long DefaultISR /* 232*/
260 .long DefaultISR /* 233*/
261 .long DefaultISR /* 234*/
262 .long DefaultISR /* 235*/
263 .long DefaultISR /* 236*/
264 .long DefaultISR /* 237*/
265 .long DefaultISR /* 238*/
266 .long DefaultISR /* 239*/
267 .long DefaultISR /* 240*/
268 .long DefaultISR /* 241*/
269 .long DefaultISR /* 242*/
270 .long DefaultISR /* 243*/
271 .long DefaultISR /* 244*/
272 .long DefaultISR /* 245*/
273 .long DefaultISR /* 246*/
274 .long DefaultISR /* 247*/
275 .long DefaultISR /* 248*/
276 .long DefaultISR /* 249*/
277 .long DefaultISR /* 250*/
278 .long DefaultISR /* 251*/
279 .long DefaultISR /* 252*/
280 .long DefaultISR /* 253*/
281 .long DefaultISR /* 254*/
282 .long 0xFFFFFFFF /* Reserved for user TRIM value*/
283
284 .size __isr_vector, . - __isr_vector
285
286 .text
287 .thumb
288
289/* Reset Handler */
290
291 .thumb_func
292 .align 2
293 .globl Reset_Handler
294 .weak Reset_Handler
295 .type Reset_Handler, %function
296Reset_Handler:
297 cpsid i /* Mask interrupts */
298 .equ VTOR, 0xE000ED08
299 ldr r0, =VTOR
300 ldr r1, =__isr_vector
301 str r1, [r0]
302 ldr r2, [r1]
303 msr msp, r2
304#ifndef __NO_SYSTEM_INIT
305 ldr r0,=SystemInit
306 blx r0
307#endif
308/* Loop to copy data from read only memory to RAM. The ranges
309 * of copy from/to are specified by following symbols evaluated in
310 * linker script.
311 * __etext: End of code section, i.e., begin of data sections to copy from.
312 * __data_start__/__data_end__: RAM address range that data should be
313 * __noncachedata_start__/__noncachedata_end__ : none cachable region
314 * __ram_function_start__/__ram_function_end__ : ramfunction region
315 * copied to. Both must be aligned to 4 bytes boundary. */
316
317 ldr r1, =__etext
318 ldr r2, =__data_start__
319 ldr r3, =__data_end__
320
321#ifdef __PERFORMANCE_IMPLEMENTATION
322/* Here are two copies of loop implementations. First one favors performance
323 * and the second one favors code size. Default uses the second one.
324 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */
325 subs r3, r2
326 ble .LC1
327.LC0:
328 subs r3, #4
329 ldr r0, [r1, r3]
330 str r0, [r2, r3]
331 bgt .LC0
332.LC1:
333#else /* code size implemenation */
334.LC0:
335 cmp r2, r3
336 ittt lt
337 ldrlt r0, [r1], #4
338 strlt r0, [r2], #4
339 blt .LC0
340#endif
341#ifdef __STARTUP_INITIALIZE_RAMFUNCTION
342 ldr r2, =__ram_function_start__
343 ldr r3, =__ram_function_end__
344#ifdef __PERFORMANCE_IMPLEMENTATION
345/* Here are two copies of loop implementations. First one favors performance
346 * and the second one favors code size. Default uses the second one.
347 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */
348 subs r3, r2
349 ble .LC_ramfunc_copy_end
350.LC_ramfunc_copy_start:
351 subs r3, #4
352 ldr r0, [r1, r3]
353 str r0, [r2, r3]
354 bgt .LC_ramfunc_copy_start
355.LC_ramfunc_copy_end:
356#else /* code size implemenation */
357.LC_ramfunc_copy_start:
358 cmp r2, r3
359 ittt lt
360 ldrlt r0, [r1], #4
361 strlt r0, [r2], #4
362 blt .LC_ramfunc_copy_start
363#endif
364#endif /* __STARTUP_INITIALIZE_RAMFUNCTION */
365#ifdef __STARTUP_INITIALIZE_NONCACHEDATA
366 ldr r2, =__noncachedata_start__
367 ldr r3, =__noncachedata_init_end__
368#ifdef __PERFORMANCE_IMPLEMENTATION
369/* Here are two copies of loop implementations. First one favors performance
370 * and the second one favors code size. Default uses the second one.
371 * Define macro "__PERFORMANCE_IMPLEMENTATION" in project to use the first one */
372 subs r3, r2
373 ble .LC3
374.LC2:
375 subs r3, #4
376 ldr r0, [r1, r3]
377 str r0, [r2, r3]
378 bgt .LC2
379.LC3:
380#else /* code size implemenation */
381.LC2:
382 cmp r2, r3
383 ittt lt
384 ldrlt r0, [r1], #4
385 strlt r0, [r2], #4
386 blt .LC2
387#endif
388/* zero inited ncache section initialization */
389 ldr r3, =__noncachedata_end__
390 movs r0,0
391.LC4:
392 cmp r2,r3
393 itt lt
394 strlt r0,[r2],#4
395 blt .LC4
396#endif /* __STARTUP_INITIALIZE_NONCACHEDATA */
397
398#ifdef __STARTUP_CLEAR_BSS
399/* This part of work usually is done in C library startup code. Otherwise,
400 * define this macro to enable it in this startup.
401 *
402 * Loop to zero out BSS section, which uses following symbols
403 * in linker script:
404 * __bss_start__: start of BSS section. Must align to 4
405 * __bss_end__: end of BSS section. Must align to 4
406 */
407 ldr r1, =__bss_start__
408 ldr r2, =__bss_end__
409
410 movs r0, 0
411.LC5:
412 cmp r1, r2
413 itt lt
414 strlt r0, [r1], #4
415 blt .LC5
416#endif /* __STARTUP_CLEAR_BSS */
417
418 cpsie i /* Unmask interrupts */
419#ifndef __START
420#define __START _start
421#endif
422#ifndef __ATOLLIC__
423 ldr r0,=__START
424 blx r0
425#else
426 ldr r0,=__libc_init_array
427 blx r0
428 ldr r0,=main
429 bx r0
430#endif
431 .pool
432 .size Reset_Handler, . - Reset_Handler
433
434 .align 1
435 .thumb_func
436 .weak DefaultISR
437 .type DefaultISR, %function
438DefaultISR:
439 b DefaultISR
440 .size DefaultISR, . - DefaultISR
441
442 .align 1
443 .thumb_func
444 .weak NMI_Handler
445 .type NMI_Handler, %function
446NMI_Handler:
447 ldr r0,=NMI_Handler
448 bx r0
449 .size NMI_Handler, . - NMI_Handler
450
451 .align 1
452 .thumb_func
453 .weak HardFault_Handler
454 .type HardFault_Handler, %function
455HardFault_Handler:
456 ldr r0,=HardFault_Handler
457 bx r0
458 .size HardFault_Handler, . - HardFault_Handler
459
460 .align 1
461 .thumb_func
462 .weak SVC_Handler
463 .type SVC_Handler, %function
464SVC_Handler:
465 ldr r0,=SVC_Handler
466 bx r0
467 .size SVC_Handler, . - SVC_Handler
468
469 .align 1
470 .thumb_func
471 .weak PendSV_Handler
472 .type PendSV_Handler, %function
473PendSV_Handler:
474 ldr r0,=PendSV_Handler
475 bx r0
476 .size PendSV_Handler, . - PendSV_Handler
477
478 .align 1
479 .thumb_func
480 .weak SysTick_Handler
481 .type SysTick_Handler, %function
482SysTick_Handler:
483 ldr r0,=SysTick_Handler
484 bx r0
485 .size SysTick_Handler, . - SysTick_Handler
486
487 .align 1
488 .thumb_func
489 .weak DMA0_IRQHandler
490 .type DMA0_IRQHandler, %function
491DMA0_IRQHandler:
492 ldr r0,=DMA0_DriverIRQHandler
493 bx r0
494 .size DMA0_IRQHandler, . - DMA0_IRQHandler
495
496 .align 1
497 .thumb_func
498 .weak DMA1_IRQHandler
499 .type DMA1_IRQHandler, %function
500DMA1_IRQHandler:
501 ldr r0,=DMA1_DriverIRQHandler
502 bx r0
503 .size DMA1_IRQHandler, . - DMA1_IRQHandler
504
505 .align 1
506 .thumb_func
507 .weak DMA2_IRQHandler
508 .type DMA2_IRQHandler, %function
509DMA2_IRQHandler:
510 ldr r0,=DMA2_DriverIRQHandler
511 bx r0
512 .size DMA2_IRQHandler, . - DMA2_IRQHandler
513
514 .align 1
515 .thumb_func
516 .weak DMA3_IRQHandler
517 .type DMA3_IRQHandler, %function
518DMA3_IRQHandler:
519 ldr r0,=DMA3_DriverIRQHandler
520 bx r0
521 .size DMA3_IRQHandler, . - DMA3_IRQHandler
522
523 .align 1
524 .thumb_func
525 .weak DMA4_IRQHandler
526 .type DMA4_IRQHandler, %function
527DMA4_IRQHandler:
528 ldr r0,=DMA4_DriverIRQHandler
529 bx r0
530 .size DMA4_IRQHandler, . - DMA4_IRQHandler
531
532 .align 1
533 .thumb_func
534 .weak DMA5_IRQHandler
535 .type DMA5_IRQHandler, %function
536DMA5_IRQHandler:
537 ldr r0,=DMA5_DriverIRQHandler
538 bx r0
539 .size DMA5_IRQHandler, . - DMA5_IRQHandler
540
541 .align 1
542 .thumb_func
543 .weak DMA6_IRQHandler
544 .type DMA6_IRQHandler, %function
545DMA6_IRQHandler:
546 ldr r0,=DMA6_DriverIRQHandler
547 bx r0
548 .size DMA6_IRQHandler, . - DMA6_IRQHandler
549
550 .align 1
551 .thumb_func
552 .weak DMA7_IRQHandler
553 .type DMA7_IRQHandler, %function
554DMA7_IRQHandler:
555 ldr r0,=DMA7_DriverIRQHandler
556 bx r0
557 .size DMA7_IRQHandler, . - DMA7_IRQHandler
558
559 .align 1
560 .thumb_func
561 .weak DMA8_IRQHandler
562 .type DMA8_IRQHandler, %function
563DMA8_IRQHandler:
564 ldr r0,=DMA8_DriverIRQHandler
565 bx r0
566 .size DMA8_IRQHandler, . - DMA8_IRQHandler
567
568 .align 1
569 .thumb_func
570 .weak DMA9_IRQHandler
571 .type DMA9_IRQHandler, %function
572DMA9_IRQHandler:
573 ldr r0,=DMA9_DriverIRQHandler
574 bx r0
575 .size DMA9_IRQHandler, . - DMA9_IRQHandler
576
577 .align 1
578 .thumb_func
579 .weak DMA10_IRQHandler
580 .type DMA10_IRQHandler, %function
581DMA10_IRQHandler:
582 ldr r0,=DMA10_DriverIRQHandler
583 bx r0
584 .size DMA10_IRQHandler, . - DMA10_IRQHandler
585
586 .align 1
587 .thumb_func
588 .weak DMA11_IRQHandler
589 .type DMA11_IRQHandler, %function
590DMA11_IRQHandler:
591 ldr r0,=DMA11_DriverIRQHandler
592 bx r0
593 .size DMA11_IRQHandler, . - DMA11_IRQHandler
594
595 .align 1
596 .thumb_func
597 .weak DMA12_IRQHandler
598 .type DMA12_IRQHandler, %function
599DMA12_IRQHandler:
600 ldr r0,=DMA12_DriverIRQHandler
601 bx r0
602 .size DMA12_IRQHandler, . - DMA12_IRQHandler
603
604 .align 1
605 .thumb_func
606 .weak DMA13_IRQHandler
607 .type DMA13_IRQHandler, %function
608DMA13_IRQHandler:
609 ldr r0,=DMA13_DriverIRQHandler
610 bx r0
611 .size DMA13_IRQHandler, . - DMA13_IRQHandler
612
613 .align 1
614 .thumb_func
615 .weak DMA14_IRQHandler
616 .type DMA14_IRQHandler, %function
617DMA14_IRQHandler:
618 ldr r0,=DMA14_DriverIRQHandler
619 bx r0
620 .size DMA14_IRQHandler, . - DMA14_IRQHandler
621
622 .align 1
623 .thumb_func
624 .weak DMA15_IRQHandler
625 .type DMA15_IRQHandler, %function
626DMA15_IRQHandler:
627 ldr r0,=DMA15_DriverIRQHandler
628 bx r0
629 .size DMA15_IRQHandler, . - DMA15_IRQHandler
630
631 .align 1
632 .thumb_func
633 .weak DMA_ERROR_IRQHandler
634 .type DMA_ERROR_IRQHandler, %function
635DMA_ERROR_IRQHandler:
636 ldr r0,=DMA_ERROR_DriverIRQHandler
637 bx r0
638 .size DMA_ERROR_IRQHandler, . - DMA_ERROR_IRQHandler
639
640 .align 1
641 .thumb_func
642 .weak LPUART1_IRQHandler
643 .type LPUART1_IRQHandler, %function
644LPUART1_IRQHandler:
645 ldr r0,=LPUART1_DriverIRQHandler
646 bx r0
647 .size LPUART1_IRQHandler, . - LPUART1_IRQHandler
648
649 .align 1
650 .thumb_func
651 .weak LPUART2_IRQHandler
652 .type LPUART2_IRQHandler, %function
653LPUART2_IRQHandler:
654 ldr r0,=LPUART2_DriverIRQHandler
655 bx r0
656 .size LPUART2_IRQHandler, . - LPUART2_IRQHandler
657
658 .align 1
659 .thumb_func
660 .weak LPUART3_IRQHandler
661 .type LPUART3_IRQHandler, %function
662LPUART3_IRQHandler:
663 ldr r0,=LPUART3_DriverIRQHandler
664 bx r0
665 .size LPUART3_IRQHandler, . - LPUART3_IRQHandler
666
667 .align 1
668 .thumb_func
669 .weak LPUART4_IRQHandler
670 .type LPUART4_IRQHandler, %function
671LPUART4_IRQHandler:
672 ldr r0,=LPUART4_DriverIRQHandler
673 bx r0
674 .size LPUART4_IRQHandler, . - LPUART4_IRQHandler
675
676 .align 1
677 .thumb_func
678 .weak FLEXSPI_IRQHandler
679 .type FLEXSPI_IRQHandler, %function
680FLEXSPI_IRQHandler:
681 ldr r0,=FLEXSPI_DriverIRQHandler
682 bx r0
683 .size FLEXSPI_IRQHandler, . - FLEXSPI_IRQHandler
684
685 .align 1
686 .thumb_func
687 .weak LPI2C1_IRQHandler
688 .type LPI2C1_IRQHandler, %function
689LPI2C1_IRQHandler:
690 ldr r0,=LPI2C1_DriverIRQHandler
691 bx r0
692 .size LPI2C1_IRQHandler, . - LPI2C1_IRQHandler
693
694 .align 1
695 .thumb_func
696 .weak LPI2C2_IRQHandler
697 .type LPI2C2_IRQHandler, %function
698LPI2C2_IRQHandler:
699 ldr r0,=LPI2C2_DriverIRQHandler
700 bx r0
701 .size LPI2C2_IRQHandler, . - LPI2C2_IRQHandler
702
703 .align 1
704 .thumb_func
705 .weak LPSPI1_IRQHandler
706 .type LPSPI1_IRQHandler, %function
707LPSPI1_IRQHandler:
708 ldr r0,=LPSPI1_DriverIRQHandler
709 bx r0
710 .size LPSPI1_IRQHandler, . - LPSPI1_IRQHandler
711
712 .align 1
713 .thumb_func
714 .weak LPSPI2_IRQHandler
715 .type LPSPI2_IRQHandler, %function
716LPSPI2_IRQHandler:
717 ldr r0,=LPSPI2_DriverIRQHandler
718 bx r0
719 .size LPSPI2_IRQHandler, . - LPSPI2_IRQHandler
720
721 .align 1
722 .thumb_func
723 .weak SAI1_IRQHandler
724 .type SAI1_IRQHandler, %function
725SAI1_IRQHandler:
726 ldr r0,=SAI1_DriverIRQHandler
727 bx r0
728 .size SAI1_IRQHandler, . - SAI1_IRQHandler
729
730 .align 1
731 .thumb_func
732 .weak SAI3_RX_IRQHandler
733 .type SAI3_RX_IRQHandler, %function
734SAI3_RX_IRQHandler:
735 ldr r0,=SAI3_RX_DriverIRQHandler
736 bx r0
737 .size SAI3_RX_IRQHandler, . - SAI3_RX_IRQHandler
738
739 .align 1
740 .thumb_func
741 .weak SAI3_TX_IRQHandler
742 .type SAI3_TX_IRQHandler, %function
743SAI3_TX_IRQHandler:
744 ldr r0,=SAI3_TX_DriverIRQHandler
745 bx r0
746 .size SAI3_TX_IRQHandler, . - SAI3_TX_IRQHandler
747
748 .align 1
749 .thumb_func
750 .weak SPDIF_IRQHandler
751 .type SPDIF_IRQHandler, %function
752SPDIF_IRQHandler:
753 ldr r0,=SPDIF_DriverIRQHandler
754 bx r0
755 .size SPDIF_IRQHandler, . - SPDIF_IRQHandler
756
757 .align 1
758 .thumb_func
759 .weak FLEXIO1_IRQHandler
760 .type FLEXIO1_IRQHandler, %function
761FLEXIO1_IRQHandler:
762 ldr r0,=FLEXIO1_DriverIRQHandler
763 bx r0
764 .size FLEXIO1_IRQHandler, . - FLEXIO1_IRQHandler
765
766
767/* Macro to define default handlers. Default handler
768 * will be weak symbol and just dead loops. They can be
769 * overwritten by other handlers */
770 .macro def_irq_handler handler_name
771 .weak \handler_name
772 .set \handler_name, DefaultISR
773 .endm
774
775/* Exception Handlers */
776 def_irq_handler MemManage_Handler
777 def_irq_handler BusFault_Handler
778 def_irq_handler UsageFault_Handler
779 def_irq_handler DebugMon_Handler
780 def_irq_handler DMA0_DriverIRQHandler
781 def_irq_handler DMA1_DriverIRQHandler
782 def_irq_handler DMA2_DriverIRQHandler
783 def_irq_handler DMA3_DriverIRQHandler
784 def_irq_handler DMA4_DriverIRQHandler
785 def_irq_handler DMA5_DriverIRQHandler
786 def_irq_handler DMA6_DriverIRQHandler
787 def_irq_handler DMA7_DriverIRQHandler
788 def_irq_handler DMA8_DriverIRQHandler
789 def_irq_handler DMA9_DriverIRQHandler
790 def_irq_handler DMA10_DriverIRQHandler
791 def_irq_handler DMA11_DriverIRQHandler
792 def_irq_handler DMA12_DriverIRQHandler
793 def_irq_handler DMA13_DriverIRQHandler
794 def_irq_handler DMA14_DriverIRQHandler
795 def_irq_handler DMA15_DriverIRQHandler
796 def_irq_handler DMA_ERROR_DriverIRQHandler
797 def_irq_handler CTI0_ERROR_IRQHandler
798 def_irq_handler CTI1_ERROR_IRQHandler
799 def_irq_handler CORE_IRQHandler
800 def_irq_handler LPUART1_DriverIRQHandler
801 def_irq_handler LPUART2_DriverIRQHandler
802 def_irq_handler LPUART3_DriverIRQHandler
803 def_irq_handler LPUART4_DriverIRQHandler
804 def_irq_handler PIT_IRQHandler
805 def_irq_handler USB_OTG1_IRQHandler
806 def_irq_handler FLEXSPI_DriverIRQHandler
807 def_irq_handler FLEXRAM_IRQHandler
808 def_irq_handler LPI2C1_DriverIRQHandler
809 def_irq_handler LPI2C2_DriverIRQHandler
810 def_irq_handler GPT1_IRQHandler
811 def_irq_handler GPT2_IRQHandler
812 def_irq_handler LPSPI1_DriverIRQHandler
813 def_irq_handler LPSPI2_DriverIRQHandler
814 def_irq_handler PWM1_0_IRQHandler
815 def_irq_handler PWM1_1_IRQHandler
816 def_irq_handler PWM1_2_IRQHandler
817 def_irq_handler PWM1_3_IRQHandler
818 def_irq_handler PWM1_FAULT_IRQHandler
819 def_irq_handler KPP_IRQHandler
820 def_irq_handler SRC_IRQHandler
821 def_irq_handler GPR_IRQ_IRQHandler
822 def_irq_handler CCM_1_IRQHandler
823 def_irq_handler CCM_2_IRQHandler
824 def_irq_handler EWM_IRQHandler
825 def_irq_handler WDOG2_IRQHandler
826 def_irq_handler SNVS_HP_WRAPPER_IRQHandler
827 def_irq_handler SNVS_HP_WRAPPER_TZ_IRQHandler
828 def_irq_handler SNVS_LP_WRAPPER_IRQHandler
829 def_irq_handler CSU_IRQHandler
830 def_irq_handler DCP_IRQHandler
831 def_irq_handler DCP_VMI_IRQHandler
832 def_irq_handler Reserved68_IRQHandler
833 def_irq_handler TRNG_IRQHandler
834 def_irq_handler Reserved70_IRQHandler
835 def_irq_handler Reserved71_IRQHandler
836 def_irq_handler SAI1_DriverIRQHandler
837 def_irq_handler RTWDOG_IRQHandler
838 def_irq_handler SAI3_RX_DriverIRQHandler
839 def_irq_handler SAI3_TX_DriverIRQHandler
840 def_irq_handler SPDIF_DriverIRQHandler
841 def_irq_handler PMU_IRQHandler
842 def_irq_handler XBAR1_IRQ_0_1_2_3_IRQHandler
843 def_irq_handler TEMP_LOW_HIGH_IRQHandler
844 def_irq_handler TEMP_PANIC_IRQHandler
845 def_irq_handler USB_PHY_IRQHandler
846 def_irq_handler GPC_IRQHandler
847 def_irq_handler ADC1_IRQHandler
848 def_irq_handler FLEXIO1_DriverIRQHandler
849 def_irq_handler DCDC_IRQHandler
850 def_irq_handler GPIO1_Combined_0_15_IRQHandler
851 def_irq_handler GPIO1_Combined_16_31_IRQHandler
852 def_irq_handler GPIO2_Combined_0_15_IRQHandler
853 def_irq_handler GPIO5_Combined_0_15_IRQHandler
854 def_irq_handler WDOG1_IRQHandler
855 def_irq_handler ADC_ETC_IRQ0_IRQHandler
856 def_irq_handler ADC_ETC_IRQ1_IRQHandler
857 def_irq_handler ADC_ETC_IRQ2_IRQHandler
858 def_irq_handler ADC_ETC_IRQ3_IRQHandler
859 def_irq_handler ADC_ETC_ERROR_IRQ_IRQHandler
860
861 .end
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 09:59:08 +0100