aboutsummaryrefslogtreecommitdiff
path: root/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h
diff options
context:
space:
mode:
Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h')
-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h726
1 files changed, 726 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h
new file mode 100644
index 000000000..3726c9609
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMXRT633S/drivers/fsl_iap.h
@@ -0,0 +1,726 @@
1/*
2 * Copyright 2018-2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef __FSL_IAP_H_
9#define __FSL_IAP_H_
10
11#include "fsl_common.h"
12/*!
13 * @addtogroup IAP_driver
14 * @{
15 */
16
17/*! @file */
18
19/*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22/*! @name Driver version */
23/*@{*/
24/*! @brief IAP driver version 2.1.1. */
25#define FSL_IAP_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
26/*@}*/
27
28/*!
29 * @addtogroup iap_flexspi_driver
30 * @{
31 */
32
33/*! @brief FlexSPI LUT command */
34#define NOR_CMD_INDEX_READ CMD_INDEX_READ /*!< 0 */
35#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS /*!< 1 */
36#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE /*!< 2 */
37#define NOR_CMD_INDEX_ERASESECTOR 3 /*!< 3 */
38#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE /*!< 4 */
39#define NOR_CMD_INDEX_CHIPERASE 5 /*!< 5 */
40#define NOR_CMD_INDEX_DUMMY 6 /*!< 6 */
41#define NOR_CMD_INDEX_ERASEBLOCK 7 /*!< 7 */
42
43#define NOR_CMD_LUT_SEQ_IDX_READ \
44 CMD_LUT_SEQ_IDX_READ /*!< 0 READ LUT sequence id in lookupTable stored in config block */
45#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
46 CMD_LUT_SEQ_IDX_READSTATUS /*!< 1 Read Status LUT sequence id in lookupTable stored in config block */
47#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
48 2 /*!< 2 Read status DPI/QPI/OPI sequence id in lookupTable stored in config block */
49#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
50 CMD_LUT_SEQ_IDX_WRITEENABLE /*!< 3 Write Enable sequence id in lookupTable stored in config block */
51#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
52 4 /*!< 4 Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block */
53#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 /*!< 5 Erase Sector sequence id in lookupTable stored in config block */
54#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8 /*!< 8 Erase Block sequence id in lookupTable stored in config block */
55#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
56 CMD_LUT_SEQ_IDX_WRITE /*!< 9 Program sequence id in lookupTable stored in config block */
57#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 /*!< 11 Chip Erase sequence in lookupTable id stored in config block */
58#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 /*!< 13 Read SFDP sequence in lookupTable id stored in config block */
59#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
60 14 /*!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block */
61#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
62 15 /*!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk */
63
64/*!
65 * @name FlexSPI status.
66 * @{
67 */
68/*! @brief FlexSPI Driver status group. */
69enum
70{
71 kStatusGroup_FlexSPI = 60,
72 kStatusGroup_FlexSPINOR = 201,
73};
74
75/*! @brief FlexSPI Driver status. */
76enum _flexspi_status
77{
78 kStatus_FLEXSPI_Success = MAKE_STATUS(kStatusGroup_Generic, 0), /*!< API is executed successfully*/
79 kStatus_FLEXSPI_Fail = MAKE_STATUS(kStatusGroup_Generic, 1), /*!< API is executed fails*/
80 kStatus_FLEXSPI_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4), /*!< Invalid argument*/
81 kStatus_FLEXSPI_SequenceExecutionTimeout =
82 MAKE_STATUS(kStatusGroup_FlexSPI, 0), /*!< The FlexSPI Sequence Execution timeout*/
83 kStatus_FLEXSPI_InvalidSequence = MAKE_STATUS(kStatusGroup_FlexSPI, 1), /*!< The FlexSPI LUT sequence invalid*/
84 kStatus_FLEXSPI_DeviceTimeout = MAKE_STATUS(kStatusGroup_FlexSPI, 2), /*!< The FlexSPI device timeout*/
85 kStatus_FLEXSPINOR_ProgramFail =
86 MAKE_STATUS(kStatusGroup_FlexSPINOR, 0), /*!< Status for Page programming failure */
87 kStatus_FLEXSPINOR_EraseSectorFail =
88 MAKE_STATUS(kStatusGroup_FlexSPINOR, 1), /*!< Status for Sector Erase failure */
89 kStatus_FLEXSPINOR_EraseAllFail = MAKE_STATUS(kStatusGroup_FlexSPINOR, 2), /*!< Status for Chip Erase failure */
90 kStatus_FLEXSPINOR_WaitTimeout = MAKE_STATUS(kStatusGroup_FlexSPINOR, 3), /*!< Status for timeout */
91 kStatus_FLEXSPINOR_NotSupported = MAKE_STATUS(kStatusGroup_FlexSPINOR, 4), /* Status for PageSize overflow */
92 kStatus_FLEXSPINOR_WriteAlignmentError =
93 MAKE_STATUS(kStatusGroup_FlexSPINOR, 5), /*!< Status for Alignement error */
94 kStatus_FLEXSPINOR_CommandFailure =
95 MAKE_STATUS(kStatusGroup_FlexSPINOR, 6), /*!< Status for Erase/Program Verify Error */
96 kStatus_FLEXSPINOR_SFDP_NotFound = MAKE_STATUS(kStatusGroup_FlexSPINOR, 7), /*!< Status for SFDP read failure */
97 kStatus_FLEXSPINOR_Unsupported_SFDP_Version =
98 MAKE_STATUS(kStatusGroup_FlexSPINOR, 8), /*!< Status for Unrecognized SFDP version */
99 kStatus_FLEXSPINOR_Flash_NotFound =
100 MAKE_STATUS(kStatusGroup_FlexSPINOR, 9), /*!< Status for Flash detection failure */
101 kStatus_FLEXSPINOR_DTRRead_DummyProbeFailed =
102 MAKE_STATUS(kStatusGroup_FlexSPINOR, 10), /*!< Status for DDR Read dummy probe failure */
103};
104/*! @} */
105
106/*! @brief Flash Configuration Option0 device_type. */
107enum
108{
109 kSerialNorCfgOption_Tag = 0x0c,
110 kSerialNorCfgOption_DeviceType_ReadSFDP_SDR = 0,
111 kSerialNorCfgOption_DeviceType_ReadSFDP_DDR = 1,
112 kSerialNorCfgOption_DeviceType_HyperFLASH1V8 = 2,
113 kSerialNorCfgOption_DeviceType_HyperFLASH3V0 = 3,
114 kSerialNorCfgOption_DeviceType_MacronixOctalDDR = 4,
115 kSerialNorCfgOption_DeviceType_MacronixOctalSDR = 5, /* For RT600 devcies only. */
116 kSerialNorCfgOption_DeviceType_MicronOctalDDR = 6,
117 kSerialNorCfgOption_DeviceType_MicronOctalSDR = 7, /* For RT600 devcies only. */
118 kSerialNorCfgOption_DeviceType_AdestoOctalDDR = 8,
119 kSerialNorCfgOption_DeviceType_AdestoOctalSDR = 9, /* For RT600 devcies only. */
120};
121
122/*! @brief Flash Configuration Option0 quad_mode_setting. */
123enum
124{
125 kSerialNorQuadMode_NotConfig = 0,
126 kSerialNorQuadMode_StatusReg1_Bit6 = 1,
127 kSerialNorQuadMode_StatusReg2_Bit1 = 2,
128 kSerialNorQuadMode_StatusReg2_Bit7 = 3,
129 kSerialNorQuadMode_StatusReg2_Bit1_0x31 = 4,
130};
131
132/*! @brief Flash Configuration Option0 misc_mode. */
133enum
134{
135 kSerialNorEnhanceMode_Disabled = 0,
136 kSerialNorEnhanceMode_0_4_4_Mode = 1,
137 kSerialNorEnhanceMode_0_8_8_Mode = 2,
138 kSerialNorEnhanceMode_DataOrderSwapped = 3,
139 kSerialNorEnhanceMode_2ndPinMux = 4,
140};
141
142/*! @brief FLEXSPI_RESET_PIN boot configurations in OTP */
143enum
144{
145 kFlashResetLogic_Disabled = 0,
146 kFlashResetLogic_ResetPin = 1,
147 kFlashResetLogic_JedecHwReset = 2,
148};
149
150/*! @brief Flash Configuration Option1 flash_connection. */
151enum
152{
153 kSerialNorConnection_SinglePortA,
154 kSerialNorConnection_Parallel,
155 kSerialNorConnection_SinglePortB,
156 kSerialNorConnection_BothPorts
157};
158
159/*! @brief Serial NOR Configuration Option */
160typedef struct _serial_nor_config_option
161{
162 union
163 {
164 struct
165 {
166 uint32_t max_freq : 4; /*!< Maximum supported Frequency */
167 uint32_t misc_mode : 4; /*!< miscellaneous mode */
168 uint32_t quad_mode_setting : 4; /*!< Quad mode setting */
169 uint32_t cmd_pads : 4; /*!< Command pads */
170 uint32_t query_pads : 4; /*!< SFDP read pads */
171 uint32_t device_type : 4; /*!< Device type */
172 uint32_t option_size : 4; /*!< Option size, in terms of uint32_t, size = (option_size + 1) * 4 */
173 uint32_t tag : 4; /*!< Tag, must be 0x0E */
174 } B;
175 uint32_t U;
176 } option0;
177
178 union
179 {
180 struct
181 {
182 uint32_t dummy_cycles : 8; /*!< Dummy cycles before read */
183 uint32_t status_override : 8; /*!< Override status register value during device mode configuration */
184 uint32_t pinmux_group : 4; /*!< The pinmux group selection */
185 uint32_t dqs_pinmux_group : 4; /*!< The DQS Pinmux Group Selection */
186 uint32_t drive_strength : 4; /*!< The Drive Strength of FlexSPI Pads */
187 uint32_t flash_connection : 4; /*!< Flash connection option: 0 - Single Flash connected to port A, 1 - */
188 /*! Parallel mode, 2 - Single Flash connected to Port B */
189 } B;
190 uint32_t U;
191 } option1;
192
193} serial_nor_config_option_t;
194
195/*! @brief Flash Run Context */
196typedef union
197{
198 struct
199 {
200 uint8_t por_mode;
201 uint8_t current_mode;
202 uint8_t exit_no_cmd_sequence;
203 uint8_t restore_sequence;
204 } B;
205 uint32_t U;
206} flash_run_context_t;
207
208/*!@brief Flash Device Mode Configuration Sequence */
209enum
210{
211 kRestoreSequence_None = 0,
212 kRestoreSequence_HW_Reset = 1,
213 kRestoreSequence_4QPI_FF = 2,
214 kRestoreSequence_5QPI_FF = 3,
215 kRestoreSequence_8QPI_FF = 4,
216 kRestoreSequence_Send_F0 = 5,
217 kRestoreSequence_Send_66_99 = 6,
218 kRestoreSequence_Send_6699_9966 = 7,
219 kRestoreSequence_Send_06_FF = 8, /* Adesto EcoXIP */
220};
221
222/*!@brief Flash Config Mode Definition */
223enum
224{
225 kFlashInstMode_ExtendedSpi = 0x00,
226 kFlashInstMode_0_4_4_SDR = 0x01,
227 kFlashInstMode_0_4_4_DDR = 0x02,
228 kFlashInstMode_QPI_SDR = 0x41,
229 kFlashInstMode_QPI_DDR = 0x42,
230 kFlashInstMode_OPI_SDR = 0x81, /* For RT600 devices only. */
231 kFlashInstMode_OPI_DDR = 0x82,
232};
233
234/*!@brief Flash Device Type Definition */
235enum
236{
237 kFlexSpiDeviceType_SerialNOR = 1, /*!< Flash devices are Serial NOR */
238 kFlexSpiDeviceType_SerialNAND = 2, /*!< Flash devices are Serial NAND */
239 kFlexSpiDeviceType_SerialRAM = 3, /*!< Flash devices are Serial RAM/HyperFLASH */
240 kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, /*!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND */
241 kFlexSpiDeviceType_MCP_NOR_RAM = 0x13, /*!< Flash deivce is MCP device, A1 is Serial NOR, A2 is Serial RAMs */
242};
243
244/*!@brief Flash Pad Definitions */
245enum
246{
247 kSerialFlash_1Pad = 1,
248 kSerialFlash_2Pads = 2,
249 kSerialFlash_4Pads = 4,
250 kSerialFlash_8Pads = 8,
251};
252
253/*!@brief FlexSPI LUT Sequence structure */
254typedef struct _lut_sequence
255{
256 uint8_t seqNum; /*!< Sequence Number, valid number: 1-16 */
257 uint8_t seqId; /*!< Sequence Index, valid number: 0-15 */
258 uint16_t reserved;
259} flexspi_lut_seq_t;
260
261/*!@brief Flash Configuration Command Type */
262enum
263{
264 kDeviceConfigCmdType_Generic, /*!< Generic command, for example: configure dummy cycles, drive strength, etc */
265 kDeviceConfigCmdType_QuadEnable, /*!< Quad Enable command */
266 kDeviceConfigCmdType_Spi2Xpi, /*!< Switch from SPI to DPI/QPI/OPI mode */
267 kDeviceConfigCmdType_Xpi2Spi, /*!< Switch from DPI/QPI/OPI to SPI mode */
268 kDeviceConfigCmdType_Spi2NoCmd, /*!< Switch to 0-4-4/0-8-8 mode */
269 kDeviceConfigCmdType_Reset, /*!< Reset device command */
270};
271
272/*!@brief FlexSPI Dll Time Block */
273typedef struct
274{
275 uint8_t time_100ps; /* Data valid time, in terms of 100ps */
276 uint8_t delay_cells; /* Data valid time, in terms of delay cells */
277} flexspi_dll_time_t;
278
279/*!@brief FlexSPI Memory Configuration Block */
280typedef struct _FlexSPIConfig
281{
282 uint32_t tag; /*!< [0x000-0x003] Tag, fixed value 0x42464346UL */
283 uint32_t version; /*!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix */
284 uint32_t reserved0; /*!< [0x008-0x00b] Reserved for future use */
285 uint8_t readSampleClkSrc; /*!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3 */
286 uint8_t csHoldTime; /*!< [0x00d-0x00d] CS hold time, default value: 3 */
287 uint8_t csSetupTime; /*!< [0x00e-0x00e] CS setup time, default value: 3 */
288 uint8_t columnAddressWidth; /*!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For */
289 /*! Serial NAND, need to refer to datasheet */
290 uint8_t deviceModeCfgEnable; /*!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable */
291 uint8_t
292 deviceModeType; /*!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch, */
293 /*! Generic configuration, etc. */
294 uint16_t waitTimeCfgCommands; /*!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for */
295 /*! DPI/QPI/OPI switch or reset command */
296 flexspi_lut_seq_t
297 deviceModeSeq; /*!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt */
298 /*! sequence number, [31:16] Reserved */
299 uint32_t deviceModeArg; /*!< [0x018-0x01b] Argument/Parameter for device configuration */
300 uint8_t configCmdEnable; /*!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable */
301 uint8_t configModeType[3]; /*!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe */
302 flexspi_lut_seq_t
303 configCmdSeqs[3]; /*!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq */
304 uint32_t reserved1; /*!< [0x02c-0x02f] Reserved for future use */
305 uint32_t configCmdArgs[3]; /*!< [0x030-0x03b] Arguments/Parameters for device Configuration commands */
306 uint32_t reserved2; /*!< [0x03c-0x03f] Reserved for future use */
307 uint32_t
308 controllerMiscOption; /*!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more */
309 /*! details */
310 uint8_t deviceType; /*!< [0x044-0x044] Device Type: See Flash Type Definition for more details */
311 uint8_t sflashPadType; /*!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */
312 uint8_t serialClkFreq; /*!< [0x046-0x046] Serial Flash Frequencey, device specific definitions, See System Boot */
313 /*! Chapter for more details */
314 uint8_t
315 lutCustomSeqEnable; /*!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot */
316 /*! be done using 1 LUT sequence, currently, only applicable to HyperFLASH */
317 uint32_t reserved3[2]; /*!< [0x048-0x04f] Reserved for future use */
318 uint32_t sflashA1Size; /*!< [0x050-0x053] Size of Flash connected to A1 */
319 uint32_t sflashA2Size; /*!< [0x054-0x057] Size of Flash connected to A2 */
320 uint32_t sflashB1Size; /*!< [0x058-0x05b] Size of Flash connected to B1 */
321 uint32_t sflashB2Size; /*!< [0x05c-0x05f] Size of Flash connected to B2 */
322 uint32_t csPadSettingOverride; /*!< [0x060-0x063] CS pad setting override value */
323 uint32_t sclkPadSettingOverride; /*!< [0x064-0x067] SCK pad setting override value */
324 uint32_t dataPadSettingOverride; /*!< [0x068-0x06b] data pad setting override value */
325 uint32_t dqsPadSettingOverride; /*!< [0x06c-0x06f] DQS pad setting override value */
326 uint32_t timeoutInMs; /*!< [0x070-0x073] Timeout threshold for read status command */
327 uint32_t commandInterval; /*!< [0x074-0x077] CS deselect interval between two commands */
328 flexspi_dll_time_t dataValidTime[2]; /*!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B */
329 uint16_t busyOffset; /*!< [0x07c-0x07d] Busy offset, valid value: 0-31 */
330 uint16_t
331 busyBitPolarity; /*!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 - */
332 /*! busy flag is 0 when flash device is busy */
333 uint32_t lookupTable[64]; /*!< [0x080-0x17f] Lookup table holds Flash command sequences */
334 flexspi_lut_seq_t lutCustomSeq[12]; /*!< [0x180-0x1af] Customizable LUT Sequences */
335 uint32_t reserved4[4]; /*!< [0x1b0-0x1bf] Reserved for future use */
336} flexspi_mem_config_t;
337
338/*!@brief FlexSPI Operation Type */
339typedef enum _FlexSPIOperationType
340{
341 kFlexSpiOperation_Command = 0, /*!< FlexSPI operation: Only command, both TX and */
342 /*! RX buffer are ignored. */
343 kFlexSpiOperation_Config = 1, /*!< FlexSPI operation: Configure device mode, the */
344 /*! TX FIFO size is fixed in LUT. */
345 kFlexSpiOperation_Write = 2, /*!< FlexSPI operation: Write, only TX buffer is */
346 /*! effective */
347 kFlexSpiOperation_Read = 3, /*!< FlexSPI operation: Read, only Rx Buffer is */
348 /*! effective. */
349 kFlexSpiOperation_End = kFlexSpiOperation_Read,
350} flexspi_operation_t;
351
352/*!@brief FlexSPI Transfer Context */
353typedef struct _FlexSpiXfer
354{
355 flexspi_operation_t operation; /*!< FlexSPI operation */
356 uint32_t baseAddress; /*!< FlexSPI operation base address */
357 uint32_t seqId; /*!< Sequence Id */
358 uint32_t seqNum; /*!< Sequence Number */
359 bool isParallelModeEnable; /*!< Is a parallel transfer */
360 uint32_t *txBuffer; /*!< Tx buffer */
361 uint32_t txSize; /*!< Tx size in bytes */
362 uint32_t *rxBuffer; /*!< Rx buffer */
363 uint32_t rxSize; /*!< Rx size in bytes */
364} flexspi_xfer_t;
365
366/*!@brief Serial NOR configuration block */
367typedef struct _flexspi_nor_config
368{
369 flexspi_mem_config_t memConfig; /*!< Common memory configuration info via FlexSPI */
370 uint32_t pageSize; /*!< Page size of Serial NOR */
371 uint32_t sectorSize; /*!< Sector size of Serial NOR */
372 uint8_t ipcmdSerialClkFreq; /*!< Clock frequency for IP command */
373 uint8_t isUniformBlockSize; /*!< Sector/Block size is the same */
374 uint8_t isDataOrderSwapped; /*!< Data order (D0, D1, D2, D3) is swapped (D1,D0, D3, D2) */
375 uint8_t reserved0[1]; /*!< Reserved for future use */
376 uint8_t serialNorType; /*!< Serial NOR Flash type: 0/1/2/3 */
377 uint8_t needExitNoCmdMode; /*!< Need to exit NoCmd mode before other IP command */
378 uint8_t halfClkForNonReadCmd; /*!< Half the Serial Clock for non-read command: true/false */
379 uint8_t needRestoreNoCmdMode; /*!< Need to Restore NoCmd mode after IP commmand execution */
380 uint32_t blockSize; /*!< Block size */
381 uint32_t flashStateCtx; /*!< Flash State Context */
382 uint32_t reserve2[10]; /*!< Reserved for future use */
383} flexspi_nor_config_t;
384/*! @} */
385
386/*!
387 * @addtogroup iap_otp_driver
388 * @{
389 */
390
391/*! @brief OTP Status Group */
392enum
393{
394 kStatusGroup_OtpGroup = 0x210,
395};
396
397/*! @brief OTP Error Status definitions */
398enum
399{
400 kStatus_OTP_InvalidAddress = MAKE_STATUS(kStatusGroup_OtpGroup, 1), /*!< Invalid OTP address */
401 kStatus_OTP_ProgramFail = MAKE_STATUS(kStatusGroup_OtpGroup, 2), /*!< Program Fail */
402 kStatus_OTP_CrcFail = MAKE_STATUS(kStatusGroup_OtpGroup, 3), /*!< CrcCheck Fail */
403 kStatus_OTP_Error = MAKE_STATUS(kStatusGroup_OtpGroup, 4), /*!< Errors happened during OTP operation */
404 kStatus_OTP_EccCheckFail = MAKE_STATUS(kStatusGroup_OtpGroup, 5), /*!< Ecc Check failed during OTP operation */
405 kStatus_OTP_Locked = MAKE_STATUS(kStatusGroup_OtpGroup, 6), /*!< OTP Fuse field has been locked */
406 kStatus_OTP_Timeout = MAKE_STATUS(kStatusGroup_OtpGroup, 7), /*!< OTP operation time out */
407 kStatus_OTP_CrcCheckPass = MAKE_STATUS(kStatusGroup_OtpGroup, 8), /*!< OTP CRC Check Pass */
408};
409/*! @} */
410
411/*!
412 * @addtogroup iap_boot_driver
413 * @{
414 */
415
416/*! @brief IAP boot option. */
417typedef struct _iap_boot_option
418{
419 union
420 {
421 struct
422 {
423 uint32_t reserved : 8; /*! reserved field. */
424 uint32_t bootImageIndex : 4; /*! FlexSPI boot image index for FlexSPI NOR flash. */
425 uint32_t instance : 4; /*! Only used when boot interface is FlexSPI/SD/MMC. */
426 uint32_t bootInterface : 4; /*! RT500: 0: USART 2: SPI 3: USB HID 4:FlexSPI 6:SD 7:MMC.
427 RT600: 0: USART 1: I2C 2: SPI 3: USB HID 4:FlexSPI 7:SD 8:MMC*/
428 uint32_t mode : 4; /* boot mode, 0: Master boot mode; 1: ISP boot */
429 uint32_t tag : 8; /*! tag, should always be "0xEB". */
430 } B;
431 uint32_t U;
432 } option;
433} iap_boot_option_t;
434
435/*! IAP boot option tag */
436#define IAP_BOOT_OPTION_TAG (0xEBU)
437/*! IAP boot option mode */
438#define IAP_BOOT_OPTION_MODE_MASTER (0U)
439#define IAP_BOOT_OPTION_MODE_ISP (1U)
440
441/*! @} */
442
443/*******************************************************************************
444 * API
445 ******************************************************************************/
446#if defined(__cplusplus)
447extern "C" {
448#endif
449
450/*!
451 * @addtogroup iap_boot_driver
452 * @{
453 */
454
455/*!
456 * @brief Invoke into ROM with specified boot parameters.
457 *
458 * @param option Boot parameters. Refer to #iap_boot_option_t.
459 */
460void IAP_RunBootLoader(iap_boot_option_t *option);
461/*! @} */
462
463/*!
464 * @addtogroup iap_flexspi_driver
465 * @{
466 */
467
468/*!
469 * @brief Initialize Serial NOR devices via FlexSPI.
470 *
471 * This function configures the FlexSPI controller with the arguments pointed by param config.
472 *
473 * @param instance FlexSPI controller instance, only support 0.
474 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
475 * @return The status flags. This is a member of the
476 * enumeration ::_flexspi_status
477 */
478status_t IAP_FlexspiNorInit(uint32_t instance, flexspi_nor_config_t *config);
479
480/*!
481 * @brief Program data to Serial NOR via FlexSPI.
482 *
483 * This function Program data to specified destination address.
484 *
485 * @param instance FlexSPI controller instance, only support 0.
486 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
487 * @param dstAddr The destination address to be programmed.
488 * @param src Points to the buffer which hold the data to be programmed.
489 * @return The status flags. This is a member of the
490 * enumeration ::_flexspi_status
491 */
492status_t IAP_FlexspiNorPageProgram(uint32_t instance,
493 flexspi_nor_config_t *config,
494 uint32_t dstAddr,
495 const uint32_t *src);
496
497/*!
498 * @brief Erase all the Serial NOR devices connected on FlexSPI.
499 *
500 * @param instance FlexSPI controller instance, only support 0.
501 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
502 * @return The status flags. This is a member of the
503 * enumeration ::_flexspi_status
504 */
505status_t IAP_FlexspiNorEraseAll(uint32_t instance, flexspi_nor_config_t *config);
506
507/*!
508 * @brief Erase Flash Region specified by address and length.
509 *
510 * @param instance FlexSPI controller instance, only support 0.
511 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
512 * @param start The start address to be erased.
513 * @param length The length to be erased.
514 * @return The status flags. This is a member of the
515 * enumeration ::_flexspi_status
516 */
517status_t IAP_FlexspiNorErase(uint32_t instance, flexspi_nor_config_t *config, uint32_t start, uint32_t length);
518
519/*!
520 * @brief Erase one sector specified by address.
521 *
522 * @param instance FlexSPI controller instance, only support 0.
523 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
524 * @param address The address of the sector to be erased.
525 * @return The status flags. This is a member of the
526 * enumeration ::_flexspi_status
527 */
528status_t IAP_FlexspiNorEraseSector(uint32_t instance, flexspi_nor_config_t *config, uint32_t address);
529
530/*!
531 * @brief Erase one block specified by address.
532 *
533 * @param instance FlexSPI controller instance, only support 0.
534 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
535 * @param address The address of the block to be erased.
536 * @return The status flags. This is a member of the
537 * enumeration ::_flexspi_status
538 */
539status_t IAP_FlexspiNorEraseBlock(uint32_t instance, flexspi_nor_config_t *config, uint32_t address);
540
541/*!
542 * @brief Get FlexSPI NOR Configuration Block based on specified option.
543 *
544 * @param instance FlexSPI controller instance, only support 0.
545 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
546 * @param option The Flash Configuration Option block. Refer to #serial_nor_config_option_t.
547 * @return The status flags. This is a member of the
548 * enumeration ::_flexspi_status
549 */
550status_t IAP_FlexspiNorGetConfig(uint32_t instance, flexspi_nor_config_t *config, serial_nor_config_option_t *option);
551
552/*!
553 * @brief Read data from Flexspi NOR Flash.
554 *
555 * @param instance FlexSPI controller instance, only support 0.
556 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
557 * @param dst Buffer address used to store the read data.
558 * @param start The Read address.
559 * @param bytes The Read size
560 * @return The status flags. This is a member of the
561 * enumeration ::_flexspi_status
562 */
563status_t IAP_FlexspiNorRead(
564 uint32_t instance, flexspi_nor_config_t *config, uint32_t *dst, uint32_t start, uint32_t bytes);
565
566/*!
567 * @brief Get FlexSPI Xfer data.
568 *
569 * @param instance FlexSPI controller instance, only support 0.
570 * @param xfer The FlexSPI Transfer Context block. Refer to #flexspi_xfer_t.
571 * @return The status flags. This is a member of the
572 * enumeration ::_flexspi_status
573 */
574status_t IAP_FlexspiXfer(uint32_t instance, flexspi_xfer_t *xfer);
575
576/*!
577 * @brief Update FlexSPI Lookup table.
578 *
579 * @param instance FlexSPI controller instance, only support 0.
580 * @param seqIndex The index of FlexSPI LUT to be updated.
581 * @param lutBase Points to the buffer which hold the LUT data to be programmed.
582 * @param numberOfSeq The number of LUT seq that need to be updated.
583 * @return The status flags. This is a member of the
584 * enumeration ::_flexspi_status
585 */
586status_t IAP_FlexspiUpdateLut(uint32_t instance, uint32_t seqIndex, const uint32_t *lutBase, uint32_t numberOfSeq);
587
588/*!
589 * @brief Set the clock source for FlexSPI.
590 *
591 * @param clockSrc Clock source for flexspi interface.
592 * @return The status flags. This is a member of the
593 * enumeration ::_flexspi_status
594 */
595status_t IAP_FlexspiSetClockSource(uint32_t clockSrc);
596
597/*!
598 * @brief Configure the flexspi interface clock frequency and data sample mode.
599 *
600 * @param instance FlexSPI controller instance, only support 0.
601 * @param freqOption FlexSPI interface clock frequency selection.
602 * @param sampleClkMode FlexSPI controller data sample mode.
603 * @return The status flags. This is a member of the
604 * enumeration ::_flexspi_status
605 */
606void IAP_FlexspiConfigClock(uint32_t instance, uint32_t freqOption, uint32_t sampleClkMode);
607
608/*!
609 * @brief Configure flexspi nor automatically.
610 *
611 * @param instance FlexSPI controller instance, only support 0.
612 * @param config The Flash configuration block. Refer to #flexspi_nor_config_t.
613 * @param option The Flash Configuration Option block. Refer to #serial_nor_config_option_t.
614 * @return The status flags. This is a member of the
615 * enumeration ::_flexspi_status
616 */
617#if defined(DOXYGEN_OUTPUT) && DOXYGEN_OUTPUT
618status_t IAP_FlexspiNorAutoConfig(uint32_t instance, flexspi_nor_config_t *config, serial_nor_config_option_t *option);
619#else
620AT_QUICKACCESS_SECTION_CODE(status_t IAP_FlexspiNorAutoConfig(uint32_t instance,
621 flexspi_nor_config_t *config,
622 serial_nor_config_option_t *option));
623#endif
624/*! @} */
625
626/*!
627 * @addtogroup iap_otp_driver
628 * @{
629 */
630
631/*!
632 * @brief Initialize OTP controller
633 *
634 * This function enables OTP Controller clock.
635 *
636 * @param src_clk_freq The Frequency of the source clock of OTP controller
637 * @return kStatus_Success
638 */
639status_t IAP_OtpInit(uint32_t src_clk_freq);
640
641/*!
642 * @brief De-Initialize OTP controller
643 *
644 * This functin disables OTP Controller Clock.
645 * @return kStatus_Success
646 */
647status_t IAP_OtpDeinit(void);
648
649/*!
650 * @brief Read Fuse value from OTP Fuse Block
651 *
652 * This function read fuse data from OTP Fuse block to specified data buffer.
653 *
654 * @param addr Fuse address
655 * @param data Buffer to hold the data read from OTP Fuse block
656 * @return kStatus_Success - Data read from OTP Fuse block successfully
657 * kStatus_InvalidArgument - data pointer is invalid
658 * kStatus_OTP_EccCheckFail - Ecc Check Failed
659 * kStatus_OTP_Error - Other Errors
660 */
661status_t IAP_OtpFuseRead(uint32_t addr, uint32_t *data);
662
663/*!
664 * @brief Program value to OTP Fuse block
665 *
666 * This function program data to specified OTP Fuse address.
667 *
668 * @param addr Fuse address
669 * @param data data to be programmed into OTP Fuse block
670 * @param lock lock the fuse field or not
671 * @return kStatus_Success - Data has been programmed into OTP Fuse block successfully
672 * kStatus_OTP_ProgramFail - Fuse programming failed
673 * kStatus_OTP_Locked - The address to be programmed into is locked
674 * kStatus_OTP_Error - Other Errors
675 */
676status_t IAP_OtpFuseProgram(uint32_t addr, uint32_t data, bool lock);
677
678/*!
679 * @brief Reload all shadow registers from OTP fuse block
680 *
681 * This function reloads all the shadow registers from OTP Fuse block
682 *
683 * @return kStatus_Success - Shadow registers' reloadding succeeded.
684 * kStatus_OTP_EccCheckFail - Ecc Check Failed
685 * kStatus_OTP_Error - Other Errors
686 */
687status_t IAP_OtpShadowRegisterReload(void);
688
689/*!
690 * @brief Do CRC Check via OTP controller
691 *
692 * This function checks whether data in specified fuse address ranges match the crc value in the specified CRC address
693 * and return the actual crc value as needed.
694 *
695 * @param start_addr Start address of selected Fuse address range
696 * @param end_addr End address of selected Fuse address range
697 * @param crc_addr Address that hold CRC data
698 *
699 * @return kStatus_Success CRC check succeeded, CRC value matched.
700 * kStatus_InvalidArgument - Invalid Argument
701 * kStatus_OTP_EccCheckFail Ecc Check Failed
702 * kStatus_OTP_CrcFail CRC Check Failed
703 */
704status_t IAP_OtpCrcCheck(uint32_t start_addr, uint32_t end_addr, uint32_t crc_addr);
705
706/*!
707 * @brief Calculate the CRC checksum for specified data for OTP
708 *
709 * This function calculates the CRC checksum for specified data for OTP
710 *
711 * @param src the source address of data
712 * @param numberOfWords number of Fuse words
713 * @param crcChecksum Buffer to store the CRC checksum
714 *
715 * @return kStatus_Success CRC checksum is computed successfully.
716 * kStatus_InvalidArgument - Invalid Argument
717 */
718status_t IAP_OtpCrcCalc(uint32_t *src, uint32_t numberOfWords, uint32_t *crcChecksum);
719/*! @} */
720#if defined(__cplusplus)
721}
722#endif
723
724/*! @}*/
725
726#endif /* __FSL_IAP_H_ */
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 20:23:11 +0100