1 files changed, 191 insertions, 0 deletions

diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MK66F18/project_template/board.h b/lib/chibios-contrib/ext/mcux-sdk/devices/MK66F18/project_template/board.h
new file mode 100644
index 000000000..f68f00c82
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MK66F18/project_template/board.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2015, Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include "clock_config.h"
+#include "fsl_gpio.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*! @brief The board name */
+#define BOARD_NAME "FRDM-K66F"
+
+/*! @brief The UART to use for debug messages. */
+#define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART
+#define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART0
+#define BOARD_DEBUG_UART_INSTANCE 0U
+#define BOARD_DEBUG_UART_CLKSRC SYS_CLK
+#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq()
+#define BOARD_UART_IRQ UART0_RX_TX_IRQn
+#define BOARD_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
+
+#ifndef BOARD_DEBUG_UART_BAUDRATE
+#define BOARD_DEBUG_UART_BAUDRATE 115200
+#endif /* BOARD_DEBUG_UART_BAUDRATE */
+
+#define BOARD_ACCEL_I2C_BASE I2C0
+
+/*! @brief The CAN instance used for board. */
+#define BOARD_CAN_BASEADDR CAN0
+
+/*! @brief The i2c instance used for i2c connection by default */
+#define BOARD_I2C_BASEADDR I2C1
+
+/*! @brief The TPM instance/channel used for board */
+#define BOARD_TPM_BASEADDR TPM2
+#define BOARD_TPM_CHANNEL 1U
+
+#define BOARD_FTM_BASEADDR FTM3
+#define BOARD_FTM_X_CHANNEL 0U
+#define BOARD_FTM_Y_CHANNEL 1U
+#define BOARD_FTM_PERIOD_HZ 100
+#define BOARD_FTM_IRQ_HANDLER FTM0_IRQHandler
+#define BOARD_FTM_IRQ_VECTOR FTM0_IRQn
+
+/*! @brief The bubble level demo information */
+#define BOARD_FXOS8700_ADDR 0x1D
+#define BOARD_ACCEL_ADDR BOARD_FXOS8700_ADDR
+#define BOARD_ACCEL_BAUDRATE 100
+#define BOARD_ACCEL_I2C_BASEADDR I2C0
+
+/*! @brief The Enet instance used for board */
+#define BOARD_ENET_BASEADDR ENET
+
+/*! @brief The FlexBus instance used for board.*/
+#define BOARD_FLEXBUS_BASEADDR FB
+
+/*! @brief The SDHC instance/channel used for board. */
+#define BOARD_SDHC_BASEADDR SDHC
+#define BOARD_SDHC_CD_GPIO_IRQ_HANDLER PORTD_IRQHandler
+
+/*! @brief The CMP instance/channel used for board. */
+#define BOARD_CMP_BASEADDR CMP2
+#define BOARD_CMP_CHANNEL 2U
+
+/*! @brief The i2c instance used for board. */
+#define BOARD_SAI_DEMO_I2C_BASEADDR I2C0
+
+/*! @brief The rtc instance used for board. */
+#define BOARD_RTC_FUNC_BASEADDR RTC
+
+/*! @brief If connected the TWR_MEM, this is spi sd card */
+#define BOARD_SDCARD_CARD_DETECTION_GPIO_PORT GPIOD
+#define SDCARD_CARD_DETECTION_GPIO_PIN 10U
+#define SDCARD_CARD_INSERTED 0U
+
+/* Board led color mapping */
+#define LOGIC_LED_ON 0U
+#define LOGIC_LED_OFF 1U
+#ifndef BOARD_LED_RED_GPIO
+#define BOARD_LED_RED_GPIO GPIOC
+#endif
+#define BOARD_LED_RED_GPIO_PORT PORTC
+#ifndef BOARD_LED_RED_GPIO_PIN
+#define BOARD_LED_RED_GPIO_PIN 9U
+#endif
+#ifndef BOARD_LED_GREEN_GPIO
+#define BOARD_LED_GREEN_GPIO GPIOE
+#endif
+#define BOARD_LED_GREEN_GPIO_PORT PORTE
+#ifndef BOARD_LED_GREEN_GPIO_PIN
+#define BOARD_LED_GREEN_GPIO_PIN 6U
+#endif
+#ifndef BOARD_LED_BLUE_GPIO
+#define BOARD_LED_BLUE_GPIO GPIOA
+#endif
+#define BOARD_LED_BLUE_GPIO_PORT PORTA
+#ifndef BOARD_LED_BLUE_GPIO_PIN
+#define BOARD_LED_BLUE_GPIO_PIN 11U
+#endif
+
+#define LED_RED_INIT(output)                                                 \
+    GPIO_PinWrite(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PIN, output); \
+    BOARD_LED_RED_GPIO->PDDR |= (1U << BOARD_LED_RED_GPIO_PIN) /*!< Enable target LED_RED */
+#define LED_RED_ON() \
+    GPIO_PortClear(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
+#define LED_RED_OFF() \
+    GPIO_PortSet(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
+#define LED_RED_TOGGLE() \
+    GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
+
+#define LED_GREEN_INIT(output)                                                   \
+    GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \
+    BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */
+#define LED_GREEN_ON() \
+    GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
+#define LED_GREEN_OFF() \
+    GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
+#define LED_GREEN_TOGGLE() \
+    GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
+
+#define LED_BLUE_INIT(output)                                                  \
+    GPIO_PinWrite(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output); \
+    BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */
+#define LED_BLUE_ON() \
+    GPIO_PortClear(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
+#define LED_BLUE_OFF() \
+    GPIO_PortSet(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
+#define LED_BLUE_TOGGLE() \
+    GPIO_PortToggle(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
+
+/*! @brief Define the port interrupt number for the usb id gpio pin */
+#define BOARD_ID_GPIO GPIOE
+#define BOARD_ID_PORT PORTE
+#define BOARD_ID_GPIO_PIN 10U
+#define BOARD_ID_IRQ PORTE_IRQn
+
+/* SDHC base address, clock and card detection pin */
+#define BOARD_SDHC_BASEADDR SDHC
+#define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk
+#define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_CoreSysClk)
+#define BOARD_SDHC_IRQ SDHC_IRQn
+#define BOARD_SDHC_CD_GPIO_BASE GPIOD
+#ifndef BOARD_SDHC_CD_GPIO_PIN
+#define BOARD_SDHC_CD_GPIO_PIN 10U
+#endif
+#define BOARD_SDHC_CD_PORT_BASE PORTD
+#define BOARD_SDHC_CD_PORT_IRQ PORTD_IRQn
+#define BOARD_SDHC_CD_PORT_IRQ_HANDLER PORTD_IRQHandler
+#define BOARD_SDHC_CD_LOGIC_RISING
+
+/* ERPC DSPI configuration */
+#define ERPC_BOARD_DSPI_BASEADDR SPI0
+#define ERPC_BOARD_DSPI_BAUDRATE 500000U
+#define ERPC_BOARD_DSPI_CLKSRC DSPI0_CLK_SRC
+#define ERPC_BOARD_DSPI_CLK_FREQ CLOCK_GetFreq(DSPI0_CLK_SRC)
+#define ERPC_BOARD_DSPI_INT_GPIO GPIOB
+#define ERPC_BOARD_DSPI_INT_PORT PORTB
+#define ERPC_BOARD_DSPI_INT_PIN 2U
+#define ERPC_BOARD_DSPI_INT_PIN_IRQ PORTB_IRQn
+#define ERPC_BOARD_DSPI_INT_PIN_IRQ_HANDLER PORTB_IRQHandler
+
+/* DAC base address */
+#define BOARD_DAC_BASEADDR DAC0
+
+/* Board accelerometer driver */
+#define BOARD_ACCEL_FXOS
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/*******************************************************************************
+ * API
+ ******************************************************************************/
+
+void BOARD_InitDebugConsole(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus */
+
+#endif /* _BOARD_H_ */