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-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/Makefile219
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/boarddef.h29
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/chconf.h757
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf.h533
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf_community.h187
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/main.c42
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf.h216
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf_community.h157
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/readme.txt32
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/Makefile217
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/chconf.h757
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf.h533
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf_community.h187
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/main.c54
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf.h216
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf_community.h157
-rw-r--r--lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/readme.txt27
17 files changed, 4320 insertions, 0 deletions
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/Makefile b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/Makefile
new file mode 100644
index 000000000..6309604f6
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/Makefile
@@ -0,0 +1,219 @@
1##############################################################################
2# Build global options
3# NOTE: Can be overridden externally.
4#
5
6# Compiler options here.
7ifeq ($(USE_OPT),)
8 USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
9endif
10
11# C specific options here (added to USE_OPT).
12ifeq ($(USE_COPT),)
13 USE_COPT =
14endif
15
16# C++ specific options here (added to USE_OPT).
17ifeq ($(USE_CPPOPT),)
18 USE_CPPOPT = -fno-rtti
19endif
20
21# Enable this if you want the linker to remove unused code and data
22ifeq ($(USE_LINK_GC),)
23 USE_LINK_GC = yes
24endif
25
26# Linker extra options here.
27ifeq ($(USE_LDOPT),)
28 USE_LDOPT =
29endif
30
31# Enable this if you want link time optimizations (LTO)
32ifeq ($(USE_LTO),)
33 USE_LTO = yes
34endif
35
36# If enabled, this option allows to compile the application in THUMB mode.
37ifeq ($(USE_THUMB),)
38 USE_THUMB = yes
39endif
40
41# Enable this if you want to see the full log while compiling.
42ifeq ($(USE_VERBOSE_COMPILE),)
43 USE_VERBOSE_COMPILE = no
44endif
45
46# If enabled, this option makes the build process faster by not compiling
47# modules not used in the current configuration.
48ifeq ($(USE_SMART_BUILD),)
49 USE_SMART_BUILD = yes
50endif
51
52#
53# Build global options
54##############################################################################
55
56##############################################################################
57# Architecture or project specific options
58#
59
60# Stack size to be allocated to the Cortex-M process stack. This stack is
61# the stack used by the main() thread.
62ifeq ($(USE_PROCESS_STACKSIZE),)
63 USE_PROCESS_STACKSIZE = 0x400
64endif
65
66# Stack size to the allocated to the Cortex-M main/exceptions stack. This
67# stack is used for processing interrupts and exceptions.
68ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
69 USE_EXCEPTIONS_STACKSIZE = 0x400
70endif
71
72# Enables the use of FPU (no, softfp, hard).
73ifeq ($(USE_FPU),)
74 USE_FPU = no
75endif
76
77#
78# Architecture or project specific options
79##############################################################################
80
81##############################################################################
82# Project, sources and paths
83#
84
85# Define project name here
86PROJECT = ch
87
88# Imported source files and paths
89CHIBIOS = ../../../../../ChibiOS
90CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
91TESTHAL = $(CHIBIOS_CONTRIB)/testhal/common/onewire
92
93# Licensing files.
94include $(CHIBIOS)/os/license/license.mk
95# Startup files.
96include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
97# HAL-OSAL files (optional).
98include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
99include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F1xx/platform.mk
100include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_P103/board.mk
101include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
102# RTOS files (optional).
103include $(CHIBIOS)/os/rt/rt.mk
104include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
105# Other files (optional).
106include $(CHIBIOS)/test/lib/test.mk
107include $(CHIBIOS)/test/rt/rt_test.mk
108include $(CHIBIOS)/test/oslib/oslib_test.mk
109include $(CHIBIOS)/os/hal/lib/streams/streams.mk
110include $(CHIBIOS)/os/various/shell/shell.mk
111
112# Define linker script file here
113LDSCRIPT= $(STARTUPLD)/STM32F103xB.ld
114
115# C sources that can be compiled in ARM or THUMB mode depending on the global
116# setting.
117CSRC = $(ALLCSRC) \
118 $(TESTSRC) \
119 $(TESTHAL)/testhal_onewire.c \
120 main.c
121
122# C++ sources that can be compiled in ARM or THUMB mode depending on the global
123# setting.
124CPPSRC = $(ALLCPPSRC)
125
126# C sources to be compiled in ARM mode regardless of the global setting.
127# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
128# option that results in lower performance and larger code size.
129ACSRC =
130
131# C++ sources to be compiled in ARM mode regardless of the global setting.
132# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
133# option that results in lower performance and larger code size.
134ACPPSRC =
135
136# C sources to be compiled in THUMB mode regardless of the global setting.
137# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
138# option that results in lower performance and larger code size.
139TCSRC =
140
141# C sources to be compiled in THUMB mode regardless of the global setting.
142# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
143# option that results in lower performance and larger code size.
144TCPPSRC =
145
146# List ASM source files here
147ASMSRC = $(ALLASMSRC)
148ASMXSRC = $(ALLXASMSRC)
149
150INCDIR = $(ALLINC) $(TESTINC) $(TESTHAL)
151
152#
153# Project, sources and paths
154##############################################################################
155
156##############################################################################
157# Compiler settings
158#
159
160MCU = cortex-m3
161
162#TRGT = arm-elf-
163TRGT = arm-none-eabi-
164CC = $(TRGT)gcc
165CPPC = $(TRGT)g++
166# Enable loading with g++ only if you need C++ runtime support.
167# NOTE: You can use C++ even without C++ support if you are careful. C++
168# runtime support makes code size explode.
169LD = $(TRGT)gcc
170#LD = $(TRGT)g++
171CP = $(TRGT)objcopy
172AS = $(TRGT)gcc -x assembler-with-cpp
173AR = $(TRGT)ar
174OD = $(TRGT)objdump
175SZ = $(TRGT)size
176HEX = $(CP) -O ihex
177BIN = $(CP) -O binary
178
179# ARM-specific options here
180AOPT =
181
182# THUMB-specific options here
183TOPT = -mthumb -DTHUMB
184
185# Define C warning options here
186CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
187
188# Define C++ warning options here
189CPPWARN = -Wall -Wextra -Wundef
190
191#
192# Compiler settings
193##############################################################################
194
195##############################################################################
196# Start of user section
197#
198
199# List all user C define here, like -D_DEBUG=1
200UDEFS =
201
202# Define ASM defines here
203UADEFS =
204
205# List all user directories here
206UINCDIR =
207
208# List the user directory to look for the libraries here
209ULIBDIR =
210
211# List all user libraries here
212ULIBS =
213
214#
215# End of user defines
216##############################################################################
217
218RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
219include $(RULESPATH)/rules.mk
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/boarddef.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/boarddef.h
new file mode 100644
index 000000000..2b1b46684
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/boarddef.h
@@ -0,0 +1,29 @@
1/*
2 ChibiOS/RT - Copyright (C) 2016 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef BOARDDEF_H_
18#define BOARDDEF_H_
19
20#define ONEWIRE_PORT GPIOB
21#define ONEWIRE_PIN 0
22#define ONEWIRE_PAD_MODE_IDLE PAL_MODE_INPUT
23#define ONEWIRE_PAD_MODE_ACTIVE PAL_MODE_STM32_ALTERNATE_OPENDRAIN
24#define search_led_on() (palClearPad(GPIOC, GPIOC_LED))
25#define search_led_off() (palSetPad(GPIOC, GPIOC_LED))
26#define ONEWIRE_MASTER_CHANNEL 2
27#define ONEWIRE_SAMPLE_CHANNEL 3
28
29#endif /* BOARDDEF_H_ */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/chconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/chconf.h
new file mode 100644
index 000000000..bd1bc9d19
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/chconf.h
@@ -0,0 +1,757 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_1_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 16
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Idle thread automatic spawn suppression.
113 * @details When this option is activated the function @p chSysInit()
114 * does not spawn the idle thread. The application @p main()
115 * function becomes the idle thread and must implement an
116 * infinite loop.
117 */
118#if !defined(CH_CFG_NO_IDLE_THREAD)
119#define CH_CFG_NO_IDLE_THREAD FALSE
120#endif
121
122/** @} */
123
124/*===========================================================================*/
125/**
126 * @name Performance options
127 * @{
128 */
129/*===========================================================================*/
130
131/**
132 * @brief OS optimization.
133 * @details If enabled then time efficient rather than space efficient code
134 * is used when two possible implementations exist.
135 *
136 * @note This is not related to the compiler optimization options.
137 * @note The default is @p TRUE.
138 */
139#if !defined(CH_CFG_OPTIMIZE_SPEED)
140#define CH_CFG_OPTIMIZE_SPEED TRUE
141#endif
142
143/** @} */
144
145/*===========================================================================*/
146/**
147 * @name Subsystem options
148 * @{
149 */
150/*===========================================================================*/
151
152/**
153 * @brief Time Measurement APIs.
154 * @details If enabled then the time measurement APIs are included in
155 * the kernel.
156 *
157 * @note The default is @p TRUE.
158 */
159#if !defined(CH_CFG_USE_TM)
160#define CH_CFG_USE_TM TRUE
161#endif
162
163/**
164 * @brief Threads registry APIs.
165 * @details If enabled then the registry APIs are included in the kernel.
166 *
167 * @note The default is @p TRUE.
168 */
169#if !defined(CH_CFG_USE_REGISTRY)
170#define CH_CFG_USE_REGISTRY TRUE
171#endif
172
173/**
174 * @brief Threads synchronization APIs.
175 * @details If enabled then the @p chThdWait() function is included in
176 * the kernel.
177 *
178 * @note The default is @p TRUE.
179 */
180#if !defined(CH_CFG_USE_WAITEXIT)
181#define CH_CFG_USE_WAITEXIT TRUE
182#endif
183
184/**
185 * @brief Semaphores APIs.
186 * @details If enabled then the Semaphores APIs are included in the kernel.
187 *
188 * @note The default is @p TRUE.
189 */
190#if !defined(CH_CFG_USE_SEMAPHORES)
191#define CH_CFG_USE_SEMAPHORES TRUE
192#endif
193
194/**
195 * @brief Semaphores queuing mode.
196 * @details If enabled then the threads are enqueued on semaphores by
197 * priority rather than in FIFO order.
198 *
199 * @note The default is @p FALSE. Enable this if you have special
200 * requirements.
201 * @note Requires @p CH_CFG_USE_SEMAPHORES.
202 */
203#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
204#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
205#endif
206
207/**
208 * @brief Mutexes APIs.
209 * @details If enabled then the mutexes APIs are included in the kernel.
210 *
211 * @note The default is @p TRUE.
212 */
213#if !defined(CH_CFG_USE_MUTEXES)
214#define CH_CFG_USE_MUTEXES TRUE
215#endif
216
217/**
218 * @brief Enables recursive behavior on mutexes.
219 * @note Recursive mutexes are heavier and have an increased
220 * memory footprint.
221 *
222 * @note The default is @p FALSE.
223 * @note Requires @p CH_CFG_USE_MUTEXES.
224 */
225#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
226#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
227#endif
228
229/**
230 * @brief Conditional Variables APIs.
231 * @details If enabled then the conditional variables APIs are included
232 * in the kernel.
233 *
234 * @note The default is @p TRUE.
235 * @note Requires @p CH_CFG_USE_MUTEXES.
236 */
237#if !defined(CH_CFG_USE_CONDVARS)
238#define CH_CFG_USE_CONDVARS TRUE
239#endif
240
241/**
242 * @brief Conditional Variables APIs with timeout.
243 * @details If enabled then the conditional variables APIs with timeout
244 * specification are included in the kernel.
245 *
246 * @note The default is @p TRUE.
247 * @note Requires @p CH_CFG_USE_CONDVARS.
248 */
249#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
250#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
251#endif
252
253/**
254 * @brief Events Flags APIs.
255 * @details If enabled then the event flags APIs are included in the kernel.
256 *
257 * @note The default is @p TRUE.
258 */
259#if !defined(CH_CFG_USE_EVENTS)
260#define CH_CFG_USE_EVENTS TRUE
261#endif
262
263/**
264 * @brief Events Flags APIs with timeout.
265 * @details If enabled then the events APIs with timeout specification
266 * are included in the kernel.
267 *
268 * @note The default is @p TRUE.
269 * @note Requires @p CH_CFG_USE_EVENTS.
270 */
271#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
272#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
273#endif
274
275/**
276 * @brief Synchronous Messages APIs.
277 * @details If enabled then the synchronous messages APIs are included
278 * in the kernel.
279 *
280 * @note The default is @p TRUE.
281 */
282#if !defined(CH_CFG_USE_MESSAGES)
283#define CH_CFG_USE_MESSAGES TRUE
284#endif
285
286/**
287 * @brief Synchronous Messages queuing mode.
288 * @details If enabled then messages are served by priority rather than in
289 * FIFO order.
290 *
291 * @note The default is @p FALSE. Enable this if you have special
292 * requirements.
293 * @note Requires @p CH_CFG_USE_MESSAGES.
294 */
295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
296#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
297#endif
298
299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC TRUE
310#endif
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
322 * @brief Mailboxes APIs.
323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
324 * included in the kernel.
325 *
326 * @note The default is @p TRUE.
327 * @note Requires @p CH_CFG_USE_SEMAPHORES.
328 */
329#if !defined(CH_CFG_USE_MAILBOXES)
330#define CH_CFG_USE_MAILBOXES TRUE
331#endif
332
333/**
334 * @brief Core Memory Manager APIs.
335 * @details If enabled then the core memory manager APIs are included
336 * in the kernel.
337 *
338 * @note The default is @p TRUE.
339 */
340#if !defined(CH_CFG_USE_MEMCORE)
341#define CH_CFG_USE_MEMCORE TRUE
342#endif
343
344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
360 * @brief Heap Allocator APIs.
361 * @details If enabled then the memory heap allocator APIs are included
362 * in the kernel.
363 *
364 * @note The default is @p TRUE.
365 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
366 * @p CH_CFG_USE_SEMAPHORES.
367 * @note Mutexes are recommended.
368 */
369#if !defined(CH_CFG_USE_HEAP)
370#define CH_CFG_USE_HEAP TRUE
371#endif
372
373/**
374 * @brief Memory Pools Allocator APIs.
375 * @details If enabled then the memory pools allocator APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_MEMPOOLS)
381#define CH_CFG_USE_MEMPOOLS TRUE
382#endif
383
384/**
385 * @brief Objects FIFOs APIs.
386 * @details If enabled then the objects FIFOs APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 */
391#if !defined(CH_CFG_USE_OBJ_FIFOS)
392#define CH_CFG_USE_OBJ_FIFOS TRUE
393#endif
394
395/**
396 * @brief Pipes APIs.
397 * @details If enabled then the pipes APIs are included
398 * in the kernel.
399 *
400 * @note The default is @p TRUE.
401 */
402#if !defined(CH_CFG_USE_PIPES)
403#define CH_CFG_USE_PIPES TRUE
404#endif
405
406/**
407 * @brief Objects Caches APIs.
408 * @details If enabled then the objects caches APIs are included
409 * in the kernel.
410 *
411 * @note The default is @p TRUE.
412 */
413#if !defined(CH_CFG_USE_OBJ_CACHES)
414#define CH_CFG_USE_OBJ_CACHES TRUE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES TRUE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS TRUE
437#endif
438
439/** @} */
440
441/*===========================================================================*/
442/**
443 * @name Objects factory options
444 * @{
445 */
446/*===========================================================================*/
447
448/**
449 * @brief Objects Factory APIs.
450 * @details If enabled then the objects factory APIs are included in the
451 * kernel.
452 *
453 * @note The default is @p FALSE.
454 */
455#if !defined(CH_CFG_USE_FACTORY)
456#define CH_CFG_USE_FACTORY TRUE
457#endif
458
459/**
460 * @brief Maximum length for object names.
461 * @details If the specified length is zero then the name is stored by
462 * pointer but this could have unintended side effects.
463 */
464#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
465#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
466#endif
467
468/**
469 * @brief Enables the registry of generic objects.
470 */
471#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
472#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
473#endif
474
475/**
476 * @brief Enables factory for generic buffers.
477 */
478#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
479#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
480#endif
481
482/**
483 * @brief Enables factory for semaphores.
484 */
485#if !defined(CH_CFG_FACTORY_SEMAPHORES)
486#define CH_CFG_FACTORY_SEMAPHORES TRUE
487#endif
488
489/**
490 * @brief Enables factory for mailboxes.
491 */
492#if !defined(CH_CFG_FACTORY_MAILBOXES)
493#define CH_CFG_FACTORY_MAILBOXES TRUE
494#endif
495
496/**
497 * @brief Enables factory for objects FIFOs.
498 */
499#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
500#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
501#endif
502
503/**
504 * @brief Enables factory for Pipes.
505 */
506#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
507#define CH_CFG_FACTORY_PIPES TRUE
508#endif
509
510/** @} */
511
512/*===========================================================================*/
513/**
514 * @name Debug options
515 * @{
516 */
517/*===========================================================================*/
518
519/**
520 * @brief Debug option, kernel statistics.
521 *
522 * @note The default is @p FALSE.
523 */
524#if !defined(CH_DBG_STATISTICS)
525#define CH_DBG_STATISTICS FALSE
526#endif
527
528/**
529 * @brief Debug option, system state check.
530 * @details If enabled the correct call protocol for system APIs is checked
531 * at runtime.
532 *
533 * @note The default is @p FALSE.
534 */
535#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
536#define CH_DBG_SYSTEM_STATE_CHECK TRUE
537#endif
538
539/**
540 * @brief Debug option, parameters checks.
541 * @details If enabled then the checks on the API functions input
542 * parameters are activated.
543 *
544 * @note The default is @p FALSE.
545 */
546#if !defined(CH_DBG_ENABLE_CHECKS)
547#define CH_DBG_ENABLE_CHECKS TRUE
548#endif
549
550/**
551 * @brief Debug option, consistency checks.
552 * @details If enabled then all the assertions in the kernel code are
553 * activated. This includes consistency checks inside the kernel,
554 * runtime anomalies and port-defined checks.
555 *
556 * @note The default is @p FALSE.
557 */
558#if !defined(CH_DBG_ENABLE_ASSERTS)
559#define CH_DBG_ENABLE_ASSERTS TRUE
560#endif
561
562/**
563 * @brief Debug option, trace buffer.
564 * @details If enabled then the trace buffer is activated.
565 *
566 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
567 */
568#if !defined(CH_DBG_TRACE_MASK)
569#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
570#endif
571
572/**
573 * @brief Trace buffer entries.
574 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
575 * different from @p CH_DBG_TRACE_MASK_DISABLED.
576 */
577#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
578#define CH_DBG_TRACE_BUFFER_SIZE 128
579#endif
580
581/**
582 * @brief Debug option, stack checks.
583 * @details If enabled then a runtime stack check is performed.
584 *
585 * @note The default is @p FALSE.
586 * @note The stack check is performed in a architecture/port dependent way.
587 * It may not be implemented or some ports.
588 * @note The default failure mode is to halt the system with the global
589 * @p panic_msg variable set to @p NULL.
590 */
591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
592#define CH_DBG_ENABLE_STACK_CHECK TRUE
593#endif
594
595/**
596 * @brief Debug option, stacks initialization.
597 * @details If enabled then the threads working area is filled with a byte
598 * value when a thread is created. This can be useful for the
599 * runtime measurement of the used stack.
600 *
601 * @note The default is @p FALSE.
602 */
603#if !defined(CH_DBG_FILL_THREADS)
604#define CH_DBG_FILL_THREADS TRUE
605#endif
606
607/**
608 * @brief Debug option, threads profiling.
609 * @details If enabled then a field is added to the @p thread_t structure that
610 * counts the system ticks occurred while executing the thread.
611 *
612 * @note The default is @p FALSE.
613 * @note This debug option is not currently compatible with the
614 * tickless mode.
615 */
616#if !defined(CH_DBG_THREADS_PROFILING)
617#define CH_DBG_THREADS_PROFILING FALSE
618#endif
619
620/** @} */
621
622/*===========================================================================*/
623/**
624 * @name Kernel hooks
625 * @{
626 */
627/*===========================================================================*/
628
629/**
630 * @brief System structure extension.
631 * @details User fields added to the end of the @p ch_system_t structure.
632 */
633#define CH_CFG_SYSTEM_EXTRA_FIELDS \
634 /* Add threads custom fields here.*/
635
636/**
637 * @brief System initialization hook.
638 * @details User initialization code added to the @p chSysInit() function
639 * just before interrupts are enabled globally.
640 */
641#define CH_CFG_SYSTEM_INIT_HOOK() { \
642 /* Add threads initialization code here.*/ \
643}
644
645/**
646 * @brief Threads descriptor structure extension.
647 * @details User fields added to the end of the @p thread_t structure.
648 */
649#define CH_CFG_THREAD_EXTRA_FIELDS \
650 /* Add threads custom fields here.*/
651
652/**
653 * @brief Threads initialization hook.
654 * @details User initialization code added to the @p _thread_init() function.
655 *
656 * @note It is invoked from within @p _thread_init() and implicitly from all
657 * the threads creation APIs.
658 */
659#define CH_CFG_THREAD_INIT_HOOK(tp) { \
660 /* Add threads initialization code here.*/ \
661}
662
663/**
664 * @brief Threads finalization hook.
665 * @details User finalization code added to the @p chThdExit() API.
666 */
667#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
668 /* Add threads finalization code here.*/ \
669}
670
671/**
672 * @brief Context switch hook.
673 * @details This hook is invoked just before switching between threads.
674 */
675#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
676 /* Context switch code here.*/ \
677}
678
679/**
680 * @brief ISR enter hook.
681 */
682#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
683 /* IRQ prologue code here.*/ \
684}
685
686/**
687 * @brief ISR exit hook.
688 */
689#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
690 /* IRQ epilogue code here.*/ \
691}
692
693/**
694 * @brief Idle thread enter hook.
695 * @note This hook is invoked within a critical zone, no OS functions
696 * should be invoked from here.
697 * @note This macro can be used to activate a power saving mode.
698 */
699#define CH_CFG_IDLE_ENTER_HOOK() { \
700 /* Idle-enter code here.*/ \
701}
702
703/**
704 * @brief Idle thread leave hook.
705 * @note This hook is invoked within a critical zone, no OS functions
706 * should be invoked from here.
707 * @note This macro can be used to deactivate a power saving mode.
708 */
709#define CH_CFG_IDLE_LEAVE_HOOK() { \
710 /* Idle-leave code here.*/ \
711}
712
713/**
714 * @brief Idle Loop hook.
715 * @details This hook is continuously invoked by the idle thread loop.
716 */
717#define CH_CFG_IDLE_LOOP_HOOK() { \
718 /* Idle loop code here.*/ \
719}
720
721/**
722 * @brief System tick event hook.
723 * @details This hook is invoked in the system tick handler immediately
724 * after processing the virtual timers queue.
725 */
726#define CH_CFG_SYSTEM_TICK_HOOK() { \
727 /* System tick event code here.*/ \
728}
729
730/**
731 * @brief System halt hook.
732 * @details This hook is invoked in case to a system halting error before
733 * the system is halted.
734 */
735#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
736 /* System halt code here.*/ \
737}
738
739/**
740 * @brief Trace hook.
741 * @details This hook is invoked each time a new record is written in the
742 * trace buffer.
743 */
744#define CH_CFG_TRACE_HOOK(tep) { \
745 /* Trace code here.*/ \
746}
747
748
749/** @} */
750
751/*===========================================================================*/
752/* Port-specific settings (override port settings defaulted in chcore.h). */
753/*===========================================================================*/
754
755#endif /* CHCONF_H */
756
757/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf.h
new file mode 100644
index 000000000..ee9bc6615
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf.h
@@ -0,0 +1,533 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_1_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
76#endif
77
78/**
79 * @brief Enables the GPT subsystem.
80 */
81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
82#define HAL_USE_GPT FALSE
83#endif
84
85/**
86 * @brief Enables the I2C subsystem.
87 */
88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
89#define HAL_USE_I2C FALSE
90#endif
91
92/**
93 * @brief Enables the I2S subsystem.
94 */
95#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
96#define HAL_USE_I2S FALSE
97#endif
98
99/**
100 * @brief Enables the ICU subsystem.
101 */
102#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
103#define HAL_USE_ICU FALSE
104#endif
105
106/**
107 * @brief Enables the MAC subsystem.
108 */
109#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
110#define HAL_USE_MAC FALSE
111#endif
112
113/**
114 * @brief Enables the MMC_SPI subsystem.
115 */
116#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
117#define HAL_USE_MMC_SPI FALSE
118#endif
119
120/**
121 * @brief Enables the PWM subsystem.
122 */
123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
124#define HAL_USE_PWM TRUE
125#endif
126
127/**
128 * @brief Enables the RTC subsystem.
129 */
130#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
131#define HAL_USE_RTC FALSE
132#endif
133
134/**
135 * @brief Enables the SDC subsystem.
136 */
137#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
138#define HAL_USE_SDC FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL subsystem.
143 */
144#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL FALSE
146#endif
147
148/**
149 * @brief Enables the SERIAL over USB subsystem.
150 */
151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
152#define HAL_USE_SERIAL_USB FALSE
153#endif
154
155/**
156 * @brief Enables the SIO subsystem.
157 */
158#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
159#define HAL_USE_SIO FALSE
160#endif
161
162/**
163 * @brief Enables the SPI subsystem.
164 */
165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
166#define HAL_USE_SPI FALSE
167#endif
168
169/**
170 * @brief Enables the TRNG subsystem.
171 */
172#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
173#define HAL_USE_TRNG FALSE
174#endif
175
176/**
177 * @brief Enables the UART subsystem.
178 */
179#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
180#define HAL_USE_UART FALSE
181#endif
182
183/**
184 * @brief Enables the USB subsystem.
185 */
186#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
187#define HAL_USE_USB FALSE
188#endif
189
190/**
191 * @brief Enables the WDG subsystem.
192 */
193#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
194#define HAL_USE_WDG FALSE
195#endif
196
197/**
198 * @brief Enables the WSPI subsystem.
199 */
200#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
201#define HAL_USE_WSPI FALSE
202#endif
203
204/*===========================================================================*/
205/* PAL driver related settings. */
206/*===========================================================================*/
207
208/**
209 * @brief Enables synchronous APIs.
210 * @note Disabling this option saves both code and data space.
211 */
212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
213#define PAL_USE_CALLBACKS FALSE
214#endif
215
216/**
217 * @brief Enables synchronous APIs.
218 * @note Disabling this option saves both code and data space.
219 */
220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
221#define PAL_USE_WAIT FALSE
222#endif
223
224/*===========================================================================*/
225/* ADC driver related settings. */
226/*===========================================================================*/
227
228/**
229 * @brief Enables synchronous APIs.
230 * @note Disabling this option saves both code and data space.
231 */
232#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
233#define ADC_USE_WAIT TRUE
234#endif
235
236/**
237 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
238 * @note Disabling this option saves both code and data space.
239 */
240#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
241#define ADC_USE_MUTUAL_EXCLUSION TRUE
242#endif
243
244/*===========================================================================*/
245/* CAN driver related settings. */
246/*===========================================================================*/
247
248/**
249 * @brief Sleep mode related APIs inclusion switch.
250 */
251#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
252#define CAN_USE_SLEEP_MODE TRUE
253#endif
254
255/**
256 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
257 */
258#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
259#define CAN_ENFORCE_USE_CALLBACKS FALSE
260#endif
261
262/*===========================================================================*/
263/* CRY driver related settings. */
264/*===========================================================================*/
265
266/**
267 * @brief Enables the SW fall-back of the cryptographic driver.
268 * @details When enabled, this option, activates a fall-back software
269 * implementation for algorithms not supported by the underlying
270 * hardware.
271 * @note Fall-back implementations may not be present for all algorithms.
272 */
273#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_USE_FALLBACK FALSE
275#endif
276
277/**
278 * @brief Makes the driver forcibly use the fall-back implementations.
279 */
280#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
281#define HAL_CRY_ENFORCE_FALLBACK FALSE
282#endif
283
284/*===========================================================================*/
285/* DAC driver related settings. */
286/*===========================================================================*/
287
288/**
289 * @brief Enables synchronous APIs.
290 * @note Disabling this option saves both code and data space.
291 */
292#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
293#define DAC_USE_WAIT TRUE
294#endif
295
296/**
297 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
298 * @note Disabling this option saves both code and data space.
299 */
300#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
301#define DAC_USE_MUTUAL_EXCLUSION TRUE
302#endif
303
304/*===========================================================================*/
305/* I2C driver related settings. */
306/*===========================================================================*/
307
308/**
309 * @brief Enables the mutual exclusion APIs on the I2C bus.
310 */
311#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
312#define I2C_USE_MUTUAL_EXCLUSION TRUE
313#endif
314
315/*===========================================================================*/
316/* MAC driver related settings. */
317/*===========================================================================*/
318
319/**
320 * @brief Enables the zero-copy API.
321 */
322#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
323#define MAC_USE_ZERO_COPY FALSE
324#endif
325
326/**
327 * @brief Enables an event sources for incoming packets.
328 */
329#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
330#define MAC_USE_EVENTS TRUE
331#endif
332
333/*===========================================================================*/
334/* MMC_SPI driver related settings. */
335/*===========================================================================*/
336
337/**
338 * @brief Delays insertions.
339 * @details If enabled this options inserts delays into the MMC waiting
340 * routines releasing some extra CPU time for the threads with
341 * lower priority, this may slow down the driver a bit however.
342 * This option is recommended also if the SPI driver does not
343 * use a DMA channel and heavily loads the CPU.
344 */
345#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
346#define MMC_NICE_WAITING TRUE
347#endif
348
349/*===========================================================================*/
350/* SDC driver related settings. */
351/*===========================================================================*/
352
353/**
354 * @brief Number of initialization attempts before rejecting the card.
355 * @note Attempts are performed at 10mS intervals.
356 */
357#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
358#define SDC_INIT_RETRY 100
359#endif
360
361/**
362 * @brief Include support for MMC cards.
363 * @note MMC support is not yet implemented so this option must be kept
364 * at @p FALSE.
365 */
366#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
367#define SDC_MMC_SUPPORT FALSE
368#endif
369
370/**
371 * @brief Delays insertions.
372 * @details If enabled this options inserts delays into the MMC waiting
373 * routines releasing some extra CPU time for the threads with
374 * lower priority, this may slow down the driver a bit however.
375 */
376#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
377#define SDC_NICE_WAITING TRUE
378#endif
379
380/**
381 * @brief OCR initialization constant for V20 cards.
382 */
383#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR_V20 0x50FF8000U
385#endif
386
387/**
388 * @brief OCR initialization constant for non-V20 cards.
389 */
390#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
391#define SDC_INIT_OCR 0x80100000U
392#endif
393
394/*===========================================================================*/
395/* SERIAL driver related settings. */
396/*===========================================================================*/
397
398/**
399 * @brief Default bit rate.
400 * @details Configuration parameter, this is the baud rate selected for the
401 * default configuration.
402 */
403#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
404#define SERIAL_DEFAULT_BITRATE 38400
405#endif
406
407/**
408 * @brief Serial buffers size.
409 * @details Configuration parameter, you can change the depth of the queue
410 * buffers depending on the requirements of your application.
411 * @note The default is 16 bytes for both the transmission and receive
412 * buffers.
413 */
414#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
415#define SERIAL_BUFFERS_SIZE 16
416#endif
417
418/*===========================================================================*/
419/* SERIAL_USB driver related setting. */
420/*===========================================================================*/
421
422/**
423 * @brief Serial over USB buffers size.
424 * @details Configuration parameter, the buffer size must be a multiple of
425 * the USB data endpoint maximum packet size.
426 * @note The default is 256 bytes for both the transmission and receive
427 * buffers.
428 */
429#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
430#define SERIAL_USB_BUFFERS_SIZE 256
431#endif
432
433/**
434 * @brief Serial over USB number of buffers.
435 * @note The default is 2 buffers.
436 */
437#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
438#define SERIAL_USB_BUFFERS_NUMBER 2
439#endif
440
441/*===========================================================================*/
442/* SPI driver related settings. */
443/*===========================================================================*/
444
445/**
446 * @brief Enables synchronous APIs.
447 * @note Disabling this option saves both code and data space.
448 */
449#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
450#define SPI_USE_WAIT TRUE
451#endif
452
453/**
454 * @brief Enables circular transfers APIs.
455 * @note Disabling this option saves both code and data space.
456 */
457#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
458#define SPI_USE_CIRCULAR FALSE
459#endif
460
461/**
462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
463 * @note Disabling this option saves both code and data space.
464 */
465#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
466#define SPI_USE_MUTUAL_EXCLUSION TRUE
467#endif
468
469/**
470 * @brief Handling method for SPI CS line.
471 * @note Disabling this option saves both code and data space.
472 */
473#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
474#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
475#endif
476
477/*===========================================================================*/
478/* UART driver related settings. */
479/*===========================================================================*/
480
481/**
482 * @brief Enables synchronous APIs.
483 * @note Disabling this option saves both code and data space.
484 */
485#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
486#define UART_USE_WAIT FALSE
487#endif
488
489/**
490 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
491 * @note Disabling this option saves both code and data space.
492 */
493#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
494#define UART_USE_MUTUAL_EXCLUSION FALSE
495#endif
496
497/*===========================================================================*/
498/* USB driver related settings. */
499/*===========================================================================*/
500
501/**
502 * @brief Enables synchronous APIs.
503 * @note Disabling this option saves both code and data space.
504 */
505#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
506#define USB_USE_WAIT FALSE
507#endif
508
509/*===========================================================================*/
510/* WSPI driver related settings. */
511/*===========================================================================*/
512
513/**
514 * @brief Enables synchronous APIs.
515 * @note Disabling this option saves both code and data space.
516 */
517#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
518#define WSPI_USE_WAIT TRUE
519#endif
520
521/**
522 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
523 * @note Disabling this option saves both code and data space.
524 */
525#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
526#define WSPI_USE_MUTUAL_EXCLUSION TRUE
527#endif
528
529#include "halconf_community.h"
530
531#endif /* HALCONF_H */
532
533/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf_community.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf_community.h
new file mode 100644
index 000000000..633d24598
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/halconf_community.h
@@ -0,0 +1,187 @@
1/*
2 ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef HALCONF_COMMUNITY_H
18#define HALCONF_COMMUNITY_H
19
20/**
21 * @brief Enables the community overlay.
22 */
23#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
24#define HAL_USE_COMMUNITY TRUE
25#endif
26
27/**
28 * @brief Enables the FSMC subsystem.
29 */
30#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
31#define HAL_USE_FSMC FALSE
32#endif
33
34/**
35 * @brief Enables the SDRAM subsystem.
36 */
37#if !defined(HAL_USE_SDRAM) || defined(__DOXYGEN__)
38#define HAL_USE_SDRAM FALSE
39#endif
40
41/**
42 * @brief Enables the SRAM subsystem.
43 */
44#if !defined(HAL_USE_SRAM) || defined(__DOXYGEN__)
45#define HAL_USE_SRAM FALSE
46#endif
47
48/**
49 * @brief Enables the NAND subsystem.
50 */
51#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
52#define HAL_USE_NAND FALSE
53#endif
54
55/**
56 * @brief Enables the 1-wire subsystem.
57 */
58#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
59#define HAL_USE_ONEWIRE TRUE
60#endif
61
62/**
63 * @brief Enables the EICU subsystem.
64 */
65#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
66#define HAL_USE_EICU FALSE
67#endif
68
69/**
70 * @brief Enables the CRC subsystem.
71 */
72#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
73#define HAL_USE_CRC FALSE
74#endif
75
76/**
77 * @brief Enables the RNG subsystem.
78 */
79#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
80#define HAL_USE_RNG FALSE
81#endif
82
83/**
84 * @brief Enables the EEPROM subsystem.
85 */
86#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)
87#define HAL_USE_EEPROM FALSE
88#endif
89
90/**
91 * @brief Enables the TIMCAP subsystem.
92 */
93#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)
94#define HAL_USE_TIMCAP FALSE
95#endif
96
97/**
98 * @brief Enables the TIMCAP subsystem.
99 */
100#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)
101#define HAL_USE_COMP FALSE
102#endif
103
104/**
105 * @brief Enables the QEI subsystem.
106 */
107#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
108#define HAL_USE_QEI FALSE
109#endif
110
111/**
112 * @brief Enables the USBH subsystem.
113 */
114#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)
115#define HAL_USE_USBH FALSE
116#endif
117
118/**
119 * @brief Enables the USB_MSD subsystem.
120 */
121#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__)
122#define HAL_USE_USB_MSD FALSE
123#endif
124
125/*===========================================================================*/
126/* FSMCNAND driver related settings. */
127/*===========================================================================*/
128
129/**
130 * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
131 * @note Disabling this option saves both code and data space.
132 */
133#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
134#define NAND_USE_MUTUAL_EXCLUSION TRUE
135#endif
136
137/*===========================================================================*/
138/* 1-wire driver related settings. */
139/*===========================================================================*/
140/**
141 * @brief Enables strong pull up feature.
142 * @note Disabling this option saves both code and data space.
143 */
144#define ONEWIRE_USE_STRONG_PULLUP FALSE
145
146/**
147 * @brief Enables search ROM feature.
148 * @note Disabling this option saves both code and data space.
149 */
150#define ONEWIRE_USE_SEARCH_ROM TRUE
151
152/*===========================================================================*/
153/* QEI driver related settings. */
154/*===========================================================================*/
155
156/**
157 * @brief Enables discard of overlow
158 */
159#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__)
160#define QEI_USE_OVERFLOW_DISCARD FALSE
161#endif
162
163/**
164 * @brief Enables min max of overlow
165 */
166#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__)
167#define QEI_USE_OVERFLOW_MINMAX FALSE
168#endif
169
170/*===========================================================================*/
171/* EEProm driver related settings. */
172/*===========================================================================*/
173
174/**
175 * @brief Enables 24xx series I2C eeprom device driver.
176 * @note Disabling this option saves both code and data space.
177 */
178#define EEPROM_USE_EE24XX FALSE
179 /**
180 * @brief Enables 25xx series SPI eeprom device driver.
181 * @note Disabling this option saves both code and data space.
182 */
183#define EEPROM_USE_EE25XX FALSE
184
185#endif /* HALCONF_COMMUNITY_H */
186
187/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/main.c b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/main.c
new file mode 100644
index 000000000..4ac380bd0
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/main.c
@@ -0,0 +1,42 @@
1/*
2 ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "ch.h"
18#include "hal.h"
19
20#include "testhal_onewire.h"
21
22/*
23 * Application entry point.
24 */
25int main(void) {
26
27 /*
28 * System initializations.
29 * - HAL initialization, this also initializes the configured device drivers
30 * and performs the board-specific initializations.
31 * - Kernel initialization, the main() function becomes a thread and the
32 * RTOS is active.
33 */
34 halInit();
35 chSysInit();
36
37 /*
38 * Executes infinite onewire test code.
39 */
40 onewireTest();
41 return 0;
42}
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf.h
new file mode 100644
index 000000000..aef6b6d1d
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf.h
@@ -0,0 +1,216 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20#define STM32F103_MCUCONF
21
22/*
23 * STM32F103 drivers configuration.
24 * The following settings override the default settings present in
25 * the various device driver implementation headers.
26 * Note that the settings for each driver only have effect if the whole
27 * driver is enabled in halconf.h.
28 *
29 * IRQ priorities:
30 * 15...0 Lowest...Highest.
31 *
32 * DMA priorities:
33 * 0...3 Lowest...Highest.
34 */
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED FALSE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_SW STM32_SW_PLL
45#define STM32_PLLSRC STM32_PLLSRC_HSE
46#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
47#define STM32_PLLMUL_VALUE 9
48#define STM32_HPRE STM32_HPRE_DIV1
49#define STM32_PPRE1 STM32_PPRE1_DIV2
50#define STM32_PPRE2 STM32_PPRE2_DIV2
51#define STM32_ADCPRE STM32_ADCPRE_DIV4
52#define STM32_USB_CLOCK_REQUIRED TRUE
53#define STM32_USBPRE STM32_USBPRE_DIV1P5
54#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
55#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
56#define STM32_PVD_ENABLE FALSE
57#define STM32_PLS STM32_PLS_LEV0
58
59/*
60 * IRQ system settings.
61 */
62#define STM32_IRQ_EXTI0_PRIORITY 6
63#define STM32_IRQ_EXTI1_PRIORITY 6
64#define STM32_IRQ_EXTI2_PRIORITY 6
65#define STM32_IRQ_EXTI3_PRIORITY 6
66#define STM32_IRQ_EXTI4_PRIORITY 6
67#define STM32_IRQ_EXTI5_9_PRIORITY 6
68#define STM32_IRQ_EXTI10_15_PRIORITY 6
69#define STM32_IRQ_EXTI16_PRIORITY 6
70#define STM32_IRQ_EXTI17_PRIORITY 6
71#define STM32_IRQ_EXTI18_PRIORITY 6
72#define STM32_IRQ_EXTI19_PRIORITY 6
73
74/*
75 * ADC driver system settings.
76 */
77#define STM32_ADC_USE_ADC1 FALSE
78#define STM32_ADC_ADC1_DMA_PRIORITY 2
79#define STM32_ADC_ADC1_IRQ_PRIORITY 6
80
81/*
82 * CAN driver system settings.
83 */
84#define STM32_CAN_USE_CAN1 FALSE
85#define STM32_CAN_CAN1_IRQ_PRIORITY 11
86
87/*
88 * GPT driver system settings.
89 */
90#define STM32_GPT_USE_TIM1 FALSE
91#define STM32_GPT_USE_TIM2 FALSE
92#define STM32_GPT_USE_TIM3 FALSE
93#define STM32_GPT_USE_TIM4 FALSE
94#define STM32_GPT_USE_TIM5 FALSE
95#define STM32_GPT_USE_TIM8 FALSE
96#define STM32_GPT_TIM1_IRQ_PRIORITY 7
97#define STM32_GPT_TIM2_IRQ_PRIORITY 7
98#define STM32_GPT_TIM3_IRQ_PRIORITY 7
99#define STM32_GPT_TIM4_IRQ_PRIORITY 7
100#define STM32_GPT_TIM5_IRQ_PRIORITY 7
101#define STM32_GPT_TIM8_IRQ_PRIORITY 7
102
103/*
104 * I2C driver system settings.
105 */
106#define STM32_I2C_USE_I2C1 FALSE
107#define STM32_I2C_USE_I2C2 FALSE
108#define STM32_I2C_BUSY_TIMEOUT 50
109#define STM32_I2C_I2C1_IRQ_PRIORITY 5
110#define STM32_I2C_I2C2_IRQ_PRIORITY 5
111#define STM32_I2C_I2C1_DMA_PRIORITY 3
112#define STM32_I2C_I2C2_DMA_PRIORITY 3
113#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
114
115/*
116 * ICU driver system settings.
117 */
118#define STM32_ICU_USE_TIM1 FALSE
119#define STM32_ICU_USE_TIM2 FALSE
120#define STM32_ICU_USE_TIM3 FALSE
121#define STM32_ICU_USE_TIM4 FALSE
122#define STM32_ICU_USE_TIM5 FALSE
123#define STM32_ICU_USE_TIM8 FALSE
124#define STM32_ICU_TIM1_IRQ_PRIORITY 7
125#define STM32_ICU_TIM2_IRQ_PRIORITY 7
126#define STM32_ICU_TIM3_IRQ_PRIORITY 7
127#define STM32_ICU_TIM4_IRQ_PRIORITY 7
128#define STM32_ICU_TIM5_IRQ_PRIORITY 7
129#define STM32_ICU_TIM8_IRQ_PRIORITY 7
130
131/*
132 * PWM driver system settings.
133 */
134#define STM32_PWM_USE_ADVANCED FALSE
135#define STM32_PWM_USE_TIM1 FALSE
136#define STM32_PWM_USE_TIM2 FALSE
137#define STM32_PWM_USE_TIM3 TRUE
138#define STM32_PWM_USE_TIM4 FALSE
139#define STM32_PWM_USE_TIM5 FALSE
140#define STM32_PWM_USE_TIM8 FALSE
141#define STM32_PWM_TIM1_IRQ_PRIORITY 7
142#define STM32_PWM_TIM2_IRQ_PRIORITY 7
143#define STM32_PWM_TIM3_IRQ_PRIORITY 7
144#define STM32_PWM_TIM4_IRQ_PRIORITY 7
145#define STM32_PWM_TIM5_IRQ_PRIORITY 7
146#define STM32_PWM_TIM8_IRQ_PRIORITY 7
147
148/*
149 * RTC driver system settings.
150 */
151#define STM32_RTC_IRQ_PRIORITY 15
152
153/*
154 * SERIAL driver system settings.
155 */
156#define STM32_SERIAL_USE_USART1 FALSE
157#define STM32_SERIAL_USE_USART2 FALSE
158#define STM32_SERIAL_USE_USART3 FALSE
159#define STM32_SERIAL_USE_UART4 FALSE
160#define STM32_SERIAL_USE_UART5 FALSE
161#define STM32_SERIAL_USART1_PRIORITY 12
162#define STM32_SERIAL_USART2_PRIORITY 12
163#define STM32_SERIAL_USART3_PRIORITY 12
164#define STM32_SERIAL_UART4_PRIORITY 12
165#define STM32_SERIAL_UART5_PRIORITY 12
166
167/*
168 * SPI driver system settings.
169 */
170#define STM32_SPI_USE_SPI1 FALSE
171#define STM32_SPI_USE_SPI2 FALSE
172#define STM32_SPI_USE_SPI3 FALSE
173#define STM32_SPI_SPI1_DMA_PRIORITY 1
174#define STM32_SPI_SPI2_DMA_PRIORITY 1
175#define STM32_SPI_SPI3_DMA_PRIORITY 1
176#define STM32_SPI_SPI1_IRQ_PRIORITY 10
177#define STM32_SPI_SPI2_IRQ_PRIORITY 10
178#define STM32_SPI_SPI3_IRQ_PRIORITY 10
179#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
180
181/*
182 * ST driver system settings.
183 */
184#define STM32_ST_IRQ_PRIORITY 8
185#define STM32_ST_USE_TIMER 2
186
187/*
188 * UART driver system settings.
189 */
190#define STM32_UART_USE_USART1 FALSE
191#define STM32_UART_USE_USART2 FALSE
192#define STM32_UART_USE_USART3 FALSE
193#define STM32_UART_USART1_IRQ_PRIORITY 12
194#define STM32_UART_USART2_IRQ_PRIORITY 12
195#define STM32_UART_USART3_IRQ_PRIORITY 12
196#define STM32_UART_USART1_DMA_PRIORITY 0
197#define STM32_UART_USART2_DMA_PRIORITY 0
198#define STM32_UART_USART3_DMA_PRIORITY 0
199#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
200
201/*
202 * USB driver system settings.
203 */
204#define STM32_USB_USE_USB1 TRUE
205#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
206#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
207#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
208
209/*
210 * WDG driver system settings.
211 */
212#define STM32_WDG_USE_IWDG FALSE
213
214#include "mcuconf_community.h"
215
216#endif /* MCUCONF_H */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf_community.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf_community.h
new file mode 100644
index 000000000..377e1bdcd
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/mcuconf_community.h
@@ -0,0 +1,157 @@
1/*
2 ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * FSMC driver system settings.
19 */
20#define STM32_FSMC_USE_FSMC1 FALSE
21#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10
22
23/*
24 * FSMC NAND driver system settings.
25 */
26#define STM32_NAND_USE_NAND1 FALSE
27#define STM32_NAND_USE_NAND2 FALSE
28#define STM32_NAND_USE_EXT_INT FALSE
29#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
30#define STM32_NAND_DMA_PRIORITY 0
31#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure")
32
33/*
34 * FSMC SRAM driver system settings.
35 */
36#define STM32_USE_FSMC_SRAM FALSE
37#define STM32_SRAM_USE_FSMC_SRAM1 FALSE
38#define STM32_SRAM_USE_FSMC_SRAM2 FALSE
39#define STM32_SRAM_USE_FSMC_SRAM3 FALSE
40#define STM32_SRAM_USE_FSMC_SRAM4 FALSE
41
42/*
43 * FSMC SDRAM driver system settings.
44 */
45#define STM32_USE_FSMC_SDRAM FALSE
46#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE
47#define STM32_SDRAM_USE_FSMC_SDRAM2 TRUE
48
49/*
50 * TIMCAP driver system settings.
51 */
52#define STM32_TIMCAP_USE_TIM1 TRUE
53#define STM32_TIMCAP_USE_TIM2 FALSE
54#define STM32_TIMCAP_USE_TIM3 TRUE
55#define STM32_TIMCAP_USE_TIM4 TRUE
56#define STM32_TIMCAP_USE_TIM5 TRUE
57#define STM32_TIMCAP_USE_TIM8 TRUE
58#define STM32_TIMCAP_USE_TIM9 TRUE
59#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3
60#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3
61#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3
62#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3
63#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3
64#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3
65#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3
66
67/*
68 * COMP driver system settings.
69 */
70#define STM32_COMP_USE_COMP1 TRUE
71#define STM32_COMP_USE_COMP2 TRUE
72#define STM32_COMP_USE_COMP3 TRUE
73#define STM32_COMP_USE_COMP4 TRUE
74#define STM32_COMP_USE_COMP5 TRUE
75#define STM32_COMP_USE_COMP6 TRUE
76#define STM32_COMP_USE_COMP7 TRUE
77
78#define STM32_COMP_USE_INTERRUPTS TRUE
79#define STM32_COMP_1_2_3_IRQ_PRIORITY 5
80#define STM32_COMP_4_5_6_IRQ_PRIORITY 5
81#define STM32_COMP_7_IRQ_PRIORITY 5
82
83#if STM32_COMP_USE_INTERRUPTS
84#define STM32_DISABLE_EXTI21_22_29_HANDLER
85#define STM32_DISABLE_EXTI30_32_HANDLER
86#define STM32_DISABLE_EXTI33_HANDLER
87#endif
88
89/*
90 * USBH driver system settings.
91 */
92#define STM32_OTG_FS_CHANNELS_NUMBER 8
93#define STM32_OTG_HS_CHANNELS_NUMBER 12
94
95#define STM32_USBH_USE_OTG1 1
96#define STM32_OTG_FS_RXFIFO_SIZE 1024
97#define STM32_OTG_FS_PTXFIFO_SIZE 128
98#define STM32_OTG_FS_NPTXFIFO_SIZE 128
99
100#define STM32_USBH_USE_OTG2 0
101#define STM32_OTG_HS_RXFIFO_SIZE 2048
102#define STM32_OTG_HS_PTXFIFO_SIZE 1024
103#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
104
105#define STM32_USBH_MIN_QSPACE 4
106#define STM32_USBH_CHANNELS_NP 4
107
108/*
109 * CRC driver system settings.
110 */
111#define STM32_CRC_USE_CRC1 TRUE
112#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1
113#define STM32_CRC_CRC1_DMA_PRIORITY 2
114#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2
115
116#define CRCSW_USE_CRC1 FALSE
117#define CRCSW_CRC32_TABLE TRUE
118#define CRCSW_CRC16_TABLE TRUE
119#define CRCSW_PROGRAMMABLE TRUE
120
121/*
122 * EICU driver system settings.
123 */
124#define STM32_EICU_USE_TIM1 TRUE
125#define STM32_EICU_USE_TIM2 FALSE
126#define STM32_EICU_USE_TIM3 TRUE
127#define STM32_EICU_USE_TIM4 TRUE
128#define STM32_EICU_USE_TIM5 TRUE
129#define STM32_EICU_USE_TIM8 TRUE
130#define STM32_EICU_USE_TIM9 TRUE
131#define STM32_EICU_USE_TIM10 TRUE
132#define STM32_EICU_USE_TIM11 TRUE
133#define STM32_EICU_USE_TIM12 TRUE
134#define STM32_EICU_USE_TIM13 TRUE
135#define STM32_EICU_USE_TIM14 TRUE
136#define STM32_EICU_TIM1_IRQ_PRIORITY 7
137#define STM32_EICU_TIM2_IRQ_PRIORITY 7
138#define STM32_EICU_TIM3_IRQ_PRIORITY 7
139#define STM32_EICU_TIM4_IRQ_PRIORITY 7
140#define STM32_EICU_TIM5_IRQ_PRIORITY 7
141#define STM32_EICU_TIM8_IRQ_PRIORITY 7
142#define STM32_EICU_TIM9_IRQ_PRIORITY 7
143#define STM32_EICU_TIM10_IRQ_PRIORITY 7
144#define STM32_EICU_TIM11_IRQ_PRIORITY 7
145#define STM32_EICU_TIM12_IRQ_PRIORITY 7
146#define STM32_EICU_TIM13_IRQ_PRIORITY 7
147#define STM32_EICU_TIM14_IRQ_PRIORITY 7
148
149/*
150 * QEI driver system settings.
151 */
152#define STM32_QEI_USE_TIM1 TRUE
153#define STM32_QEI_USE_TIM2 FALSE
154#define STM32_QEI_USE_TIM3 TRUE
155#define STM32_QEI_TIM1_IRQ_PRIORITY 3
156#define STM32_QEI_TIM2_IRQ_PRIORITY 3
157#define STM32_QEI_TIM3_IRQ_PRIORITY 3
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/readme.txt b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/readme.txt
new file mode 100644
index 000000000..2bb17f58f
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/onewire/readme.txt
@@ -0,0 +1,32 @@
1*****************************************************************************
2** ChibiOS/RT HAL - 1-Wire driver demo for STM32F1xx. **
3*****************************************************************************
4
5** TARGET **
6
7The demo will on an Olimex STM32_103STK board.
8
9** The Demo **
10
11The application demonstrates the use of the STM32F1xx 1-Wire driver.
12
13** Board Setup **
14
15To use demo you have to power your 1-wire device from 5V bus on board
16and connect DQ line to PB0 pin. Do not forget about external pullup
17resistor to 5V (4k7 recommended).
18
19** Build Procedure **
20
21The demo has been tested using the free Codesourcery GCC-based toolchain
22and YAGARTO.
23Just modify the TRGT line in the makefile in order to use different GCC ports.
24
25** Notes **
26
27Some files used by the demo are not part of ChibiOS/RT but are copyright of
28ST Microelectronics and are licensed under a different license.
29Also note that not all the files present in the ST library are distributed
30with ChibiOS/RT, you can find the whole library on the ST web site:
31
32 http://www.st.com
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/Makefile b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/Makefile
new file mode 100644
index 000000000..7e253ef96
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/Makefile
@@ -0,0 +1,217 @@
1##############################################################################
2# Build global options
3# NOTE: Can be overridden externally.
4#
5
6# Compiler options here.
7ifeq ($(USE_OPT),)
8 USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
9endif
10
11# C specific options here (added to USE_OPT).
12ifeq ($(USE_COPT),)
13 USE_COPT =
14endif
15
16# C++ specific options here (added to USE_OPT).
17ifeq ($(USE_CPPOPT),)
18 USE_CPPOPT = -fno-rtti
19endif
20
21# Enable this if you want the linker to remove unused code and data
22ifeq ($(USE_LINK_GC),)
23 USE_LINK_GC = yes
24endif
25
26# Linker extra options here.
27ifeq ($(USE_LDOPT),)
28 USE_LDOPT =
29endif
30
31# Enable this if you want link time optimizations (LTO)
32ifeq ($(USE_LTO),)
33 USE_LTO = yes
34endif
35
36# If enabled, this option allows to compile the application in THUMB mode.
37ifeq ($(USE_THUMB),)
38 USE_THUMB = yes
39endif
40
41# Enable this if you want to see the full log while compiling.
42ifeq ($(USE_VERBOSE_COMPILE),)
43 USE_VERBOSE_COMPILE = no
44endif
45
46# If enabled, this option makes the build process faster by not compiling
47# modules not used in the current configuration.
48ifeq ($(USE_SMART_BUILD),)
49 USE_SMART_BUILD = yes
50endif
51
52#
53# Build global options
54##############################################################################
55
56##############################################################################
57# Architecture or project specific options
58#
59
60# Stack size to be allocated to the Cortex-M process stack. This stack is
61# the stack used by the main() thread.
62ifeq ($(USE_PROCESS_STACKSIZE),)
63 USE_PROCESS_STACKSIZE = 0x400
64endif
65
66# Stack size to the allocated to the Cortex-M main/exceptions stack. This
67# stack is used for processing interrupts and exceptions.
68ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
69 USE_EXCEPTIONS_STACKSIZE = 0x400
70endif
71
72# Enables the use of FPU (no, softfp, hard).
73ifeq ($(USE_FPU),)
74 USE_FPU = no
75endif
76
77#
78# Architecture or project specific options
79##############################################################################
80
81##############################################################################
82# Project, sources and paths
83#
84
85# Define project name here
86PROJECT = ch
87
88# Imported source files and paths
89CHIBIOS = ../../../../../ChibiOS
90CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
91
92# Licensing files.
93include $(CHIBIOS)/os/license/license.mk
94# Startup files.
95include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
96# HAL-OSAL files (optional).
97include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
98include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F1xx/platform.mk
99include $(CHIBIOS)/os/hal/boards/OLIMEX_STM32_P103/board.mk
100include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
101# RTOS files (optional).
102include $(CHIBIOS)/os/rt/rt.mk
103include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
104# Other files (optional).
105include $(CHIBIOS)/test/lib/test.mk
106include $(CHIBIOS)/test/rt/rt_test.mk
107include $(CHIBIOS)/test/oslib/oslib_test.mk
108include $(CHIBIOS)/os/hal/lib/streams/streams.mk
109include $(CHIBIOS)/os/various/shell/shell.mk
110
111# Define linker script file here
112LDSCRIPT= $(STARTUPLD)/STM32F103xB.ld
113
114# C sources that can be compiled in ARM or THUMB mode depending on the global
115# setting.
116CSRC = $(ALLCSRC) \
117 $(TESTSRC) \
118 main.c
119
120# C++ sources that can be compiled in ARM or THUMB mode depending on the global
121# setting.
122CPPSRC = $(ALLCPPSRC)
123
124# C sources to be compiled in ARM mode regardless of the global setting.
125# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
126# option that results in lower performance and larger code size.
127ACSRC =
128
129# C++ sources to be compiled in ARM mode regardless of the global setting.
130# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
131# option that results in lower performance and larger code size.
132ACPPSRC =
133
134# C sources to be compiled in THUMB mode regardless of the global setting.
135# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
136# option that results in lower performance and larger code size.
137TCSRC =
138
139# C sources to be compiled in THUMB mode regardless of the global setting.
140# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
141# option that results in lower performance and larger code size.
142TCPPSRC =
143
144# List ASM source files here
145ASMSRC = $(ALLASMSRC)
146ASMXSRC = $(ALLXASMSRC)
147
148INCDIR = $(ALLINC) $(TESTINC)
149
150#
151# Project, sources and paths
152##############################################################################
153
154##############################################################################
155# Compiler settings
156#
157
158MCU = cortex-m3
159
160#TRGT = arm-elf-
161TRGT = arm-none-eabi-
162CC = $(TRGT)gcc
163CPPC = $(TRGT)g++
164# Enable loading with g++ only if you need C++ runtime support.
165# NOTE: You can use C++ even without C++ support if you are careful. C++
166# runtime support makes code size explode.
167LD = $(TRGT)gcc
168#LD = $(TRGT)g++
169CP = $(TRGT)objcopy
170AS = $(TRGT)gcc -x assembler-with-cpp
171AR = $(TRGT)ar
172OD = $(TRGT)objdump
173SZ = $(TRGT)size
174HEX = $(CP) -O ihex
175BIN = $(CP) -O binary
176
177# ARM-specific options here
178AOPT =
179
180# THUMB-specific options here
181TOPT = -mthumb -DTHUMB
182
183# Define C warning options here
184CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
185
186# Define C++ warning options here
187CPPWARN = -Wall -Wextra -Wundef
188
189#
190# Compiler settings
191##############################################################################
192
193##############################################################################
194# Start of user section
195#
196
197# List all user C define here, like -D_DEBUG=1
198UDEFS =
199
200# Define ASM defines here
201UADEFS =
202
203# List all user directories here
204UINCDIR =
205
206# List the user directory to look for the libraries here
207ULIBDIR =
208
209# List all user libraries here
210ULIBS =
211
212#
213# End of user defines
214##############################################################################
215
216RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
217include $(RULESPATH)/rules.mk
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/chconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/chconf.h
new file mode 100644
index 000000000..bd1bc9d19
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/chconf.h
@@ -0,0 +1,757 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_1_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 16
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Idle thread automatic spawn suppression.
113 * @details When this option is activated the function @p chSysInit()
114 * does not spawn the idle thread. The application @p main()
115 * function becomes the idle thread and must implement an
116 * infinite loop.
117 */
118#if !defined(CH_CFG_NO_IDLE_THREAD)
119#define CH_CFG_NO_IDLE_THREAD FALSE
120#endif
121
122/** @} */
123
124/*===========================================================================*/
125/**
126 * @name Performance options
127 * @{
128 */
129/*===========================================================================*/
130
131/**
132 * @brief OS optimization.
133 * @details If enabled then time efficient rather than space efficient code
134 * is used when two possible implementations exist.
135 *
136 * @note This is not related to the compiler optimization options.
137 * @note The default is @p TRUE.
138 */
139#if !defined(CH_CFG_OPTIMIZE_SPEED)
140#define CH_CFG_OPTIMIZE_SPEED TRUE
141#endif
142
143/** @} */
144
145/*===========================================================================*/
146/**
147 * @name Subsystem options
148 * @{
149 */
150/*===========================================================================*/
151
152/**
153 * @brief Time Measurement APIs.
154 * @details If enabled then the time measurement APIs are included in
155 * the kernel.
156 *
157 * @note The default is @p TRUE.
158 */
159#if !defined(CH_CFG_USE_TM)
160#define CH_CFG_USE_TM TRUE
161#endif
162
163/**
164 * @brief Threads registry APIs.
165 * @details If enabled then the registry APIs are included in the kernel.
166 *
167 * @note The default is @p TRUE.
168 */
169#if !defined(CH_CFG_USE_REGISTRY)
170#define CH_CFG_USE_REGISTRY TRUE
171#endif
172
173/**
174 * @brief Threads synchronization APIs.
175 * @details If enabled then the @p chThdWait() function is included in
176 * the kernel.
177 *
178 * @note The default is @p TRUE.
179 */
180#if !defined(CH_CFG_USE_WAITEXIT)
181#define CH_CFG_USE_WAITEXIT TRUE
182#endif
183
184/**
185 * @brief Semaphores APIs.
186 * @details If enabled then the Semaphores APIs are included in the kernel.
187 *
188 * @note The default is @p TRUE.
189 */
190#if !defined(CH_CFG_USE_SEMAPHORES)
191#define CH_CFG_USE_SEMAPHORES TRUE
192#endif
193
194/**
195 * @brief Semaphores queuing mode.
196 * @details If enabled then the threads are enqueued on semaphores by
197 * priority rather than in FIFO order.
198 *
199 * @note The default is @p FALSE. Enable this if you have special
200 * requirements.
201 * @note Requires @p CH_CFG_USE_SEMAPHORES.
202 */
203#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
204#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
205#endif
206
207/**
208 * @brief Mutexes APIs.
209 * @details If enabled then the mutexes APIs are included in the kernel.
210 *
211 * @note The default is @p TRUE.
212 */
213#if !defined(CH_CFG_USE_MUTEXES)
214#define CH_CFG_USE_MUTEXES TRUE
215#endif
216
217/**
218 * @brief Enables recursive behavior on mutexes.
219 * @note Recursive mutexes are heavier and have an increased
220 * memory footprint.
221 *
222 * @note The default is @p FALSE.
223 * @note Requires @p CH_CFG_USE_MUTEXES.
224 */
225#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
226#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
227#endif
228
229/**
230 * @brief Conditional Variables APIs.
231 * @details If enabled then the conditional variables APIs are included
232 * in the kernel.
233 *
234 * @note The default is @p TRUE.
235 * @note Requires @p CH_CFG_USE_MUTEXES.
236 */
237#if !defined(CH_CFG_USE_CONDVARS)
238#define CH_CFG_USE_CONDVARS TRUE
239#endif
240
241/**
242 * @brief Conditional Variables APIs with timeout.
243 * @details If enabled then the conditional variables APIs with timeout
244 * specification are included in the kernel.
245 *
246 * @note The default is @p TRUE.
247 * @note Requires @p CH_CFG_USE_CONDVARS.
248 */
249#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
250#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
251#endif
252
253/**
254 * @brief Events Flags APIs.
255 * @details If enabled then the event flags APIs are included in the kernel.
256 *
257 * @note The default is @p TRUE.
258 */
259#if !defined(CH_CFG_USE_EVENTS)
260#define CH_CFG_USE_EVENTS TRUE
261#endif
262
263/**
264 * @brief Events Flags APIs with timeout.
265 * @details If enabled then the events APIs with timeout specification
266 * are included in the kernel.
267 *
268 * @note The default is @p TRUE.
269 * @note Requires @p CH_CFG_USE_EVENTS.
270 */
271#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
272#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
273#endif
274
275/**
276 * @brief Synchronous Messages APIs.
277 * @details If enabled then the synchronous messages APIs are included
278 * in the kernel.
279 *
280 * @note The default is @p TRUE.
281 */
282#if !defined(CH_CFG_USE_MESSAGES)
283#define CH_CFG_USE_MESSAGES TRUE
284#endif
285
286/**
287 * @brief Synchronous Messages queuing mode.
288 * @details If enabled then messages are served by priority rather than in
289 * FIFO order.
290 *
291 * @note The default is @p FALSE. Enable this if you have special
292 * requirements.
293 * @note Requires @p CH_CFG_USE_MESSAGES.
294 */
295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
296#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
297#endif
298
299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC TRUE
310#endif
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
322 * @brief Mailboxes APIs.
323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
324 * included in the kernel.
325 *
326 * @note The default is @p TRUE.
327 * @note Requires @p CH_CFG_USE_SEMAPHORES.
328 */
329#if !defined(CH_CFG_USE_MAILBOXES)
330#define CH_CFG_USE_MAILBOXES TRUE
331#endif
332
333/**
334 * @brief Core Memory Manager APIs.
335 * @details If enabled then the core memory manager APIs are included
336 * in the kernel.
337 *
338 * @note The default is @p TRUE.
339 */
340#if !defined(CH_CFG_USE_MEMCORE)
341#define CH_CFG_USE_MEMCORE TRUE
342#endif
343
344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
360 * @brief Heap Allocator APIs.
361 * @details If enabled then the memory heap allocator APIs are included
362 * in the kernel.
363 *
364 * @note The default is @p TRUE.
365 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
366 * @p CH_CFG_USE_SEMAPHORES.
367 * @note Mutexes are recommended.
368 */
369#if !defined(CH_CFG_USE_HEAP)
370#define CH_CFG_USE_HEAP TRUE
371#endif
372
373/**
374 * @brief Memory Pools Allocator APIs.
375 * @details If enabled then the memory pools allocator APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_MEMPOOLS)
381#define CH_CFG_USE_MEMPOOLS TRUE
382#endif
383
384/**
385 * @brief Objects FIFOs APIs.
386 * @details If enabled then the objects FIFOs APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 */
391#if !defined(CH_CFG_USE_OBJ_FIFOS)
392#define CH_CFG_USE_OBJ_FIFOS TRUE
393#endif
394
395/**
396 * @brief Pipes APIs.
397 * @details If enabled then the pipes APIs are included
398 * in the kernel.
399 *
400 * @note The default is @p TRUE.
401 */
402#if !defined(CH_CFG_USE_PIPES)
403#define CH_CFG_USE_PIPES TRUE
404#endif
405
406/**
407 * @brief Objects Caches APIs.
408 * @details If enabled then the objects caches APIs are included
409 * in the kernel.
410 *
411 * @note The default is @p TRUE.
412 */
413#if !defined(CH_CFG_USE_OBJ_CACHES)
414#define CH_CFG_USE_OBJ_CACHES TRUE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES TRUE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS TRUE
437#endif
438
439/** @} */
440
441/*===========================================================================*/
442/**
443 * @name Objects factory options
444 * @{
445 */
446/*===========================================================================*/
447
448/**
449 * @brief Objects Factory APIs.
450 * @details If enabled then the objects factory APIs are included in the
451 * kernel.
452 *
453 * @note The default is @p FALSE.
454 */
455#if !defined(CH_CFG_USE_FACTORY)
456#define CH_CFG_USE_FACTORY TRUE
457#endif
458
459/**
460 * @brief Maximum length for object names.
461 * @details If the specified length is zero then the name is stored by
462 * pointer but this could have unintended side effects.
463 */
464#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
465#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
466#endif
467
468/**
469 * @brief Enables the registry of generic objects.
470 */
471#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
472#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
473#endif
474
475/**
476 * @brief Enables factory for generic buffers.
477 */
478#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
479#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
480#endif
481
482/**
483 * @brief Enables factory for semaphores.
484 */
485#if !defined(CH_CFG_FACTORY_SEMAPHORES)
486#define CH_CFG_FACTORY_SEMAPHORES TRUE
487#endif
488
489/**
490 * @brief Enables factory for mailboxes.
491 */
492#if !defined(CH_CFG_FACTORY_MAILBOXES)
493#define CH_CFG_FACTORY_MAILBOXES TRUE
494#endif
495
496/**
497 * @brief Enables factory for objects FIFOs.
498 */
499#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
500#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
501#endif
502
503/**
504 * @brief Enables factory for Pipes.
505 */
506#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
507#define CH_CFG_FACTORY_PIPES TRUE
508#endif
509
510/** @} */
511
512/*===========================================================================*/
513/**
514 * @name Debug options
515 * @{
516 */
517/*===========================================================================*/
518
519/**
520 * @brief Debug option, kernel statistics.
521 *
522 * @note The default is @p FALSE.
523 */
524#if !defined(CH_DBG_STATISTICS)
525#define CH_DBG_STATISTICS FALSE
526#endif
527
528/**
529 * @brief Debug option, system state check.
530 * @details If enabled the correct call protocol for system APIs is checked
531 * at runtime.
532 *
533 * @note The default is @p FALSE.
534 */
535#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
536#define CH_DBG_SYSTEM_STATE_CHECK TRUE
537#endif
538
539/**
540 * @brief Debug option, parameters checks.
541 * @details If enabled then the checks on the API functions input
542 * parameters are activated.
543 *
544 * @note The default is @p FALSE.
545 */
546#if !defined(CH_DBG_ENABLE_CHECKS)
547#define CH_DBG_ENABLE_CHECKS TRUE
548#endif
549
550/**
551 * @brief Debug option, consistency checks.
552 * @details If enabled then all the assertions in the kernel code are
553 * activated. This includes consistency checks inside the kernel,
554 * runtime anomalies and port-defined checks.
555 *
556 * @note The default is @p FALSE.
557 */
558#if !defined(CH_DBG_ENABLE_ASSERTS)
559#define CH_DBG_ENABLE_ASSERTS TRUE
560#endif
561
562/**
563 * @brief Debug option, trace buffer.
564 * @details If enabled then the trace buffer is activated.
565 *
566 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
567 */
568#if !defined(CH_DBG_TRACE_MASK)
569#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
570#endif
571
572/**
573 * @brief Trace buffer entries.
574 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
575 * different from @p CH_DBG_TRACE_MASK_DISABLED.
576 */
577#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
578#define CH_DBG_TRACE_BUFFER_SIZE 128
579#endif
580
581/**
582 * @brief Debug option, stack checks.
583 * @details If enabled then a runtime stack check is performed.
584 *
585 * @note The default is @p FALSE.
586 * @note The stack check is performed in a architecture/port dependent way.
587 * It may not be implemented or some ports.
588 * @note The default failure mode is to halt the system with the global
589 * @p panic_msg variable set to @p NULL.
590 */
591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
592#define CH_DBG_ENABLE_STACK_CHECK TRUE
593#endif
594
595/**
596 * @brief Debug option, stacks initialization.
597 * @details If enabled then the threads working area is filled with a byte
598 * value when a thread is created. This can be useful for the
599 * runtime measurement of the used stack.
600 *
601 * @note The default is @p FALSE.
602 */
603#if !defined(CH_DBG_FILL_THREADS)
604#define CH_DBG_FILL_THREADS TRUE
605#endif
606
607/**
608 * @brief Debug option, threads profiling.
609 * @details If enabled then a field is added to the @p thread_t structure that
610 * counts the system ticks occurred while executing the thread.
611 *
612 * @note The default is @p FALSE.
613 * @note This debug option is not currently compatible with the
614 * tickless mode.
615 */
616#if !defined(CH_DBG_THREADS_PROFILING)
617#define CH_DBG_THREADS_PROFILING FALSE
618#endif
619
620/** @} */
621
622/*===========================================================================*/
623/**
624 * @name Kernel hooks
625 * @{
626 */
627/*===========================================================================*/
628
629/**
630 * @brief System structure extension.
631 * @details User fields added to the end of the @p ch_system_t structure.
632 */
633#define CH_CFG_SYSTEM_EXTRA_FIELDS \
634 /* Add threads custom fields here.*/
635
636/**
637 * @brief System initialization hook.
638 * @details User initialization code added to the @p chSysInit() function
639 * just before interrupts are enabled globally.
640 */
641#define CH_CFG_SYSTEM_INIT_HOOK() { \
642 /* Add threads initialization code here.*/ \
643}
644
645/**
646 * @brief Threads descriptor structure extension.
647 * @details User fields added to the end of the @p thread_t structure.
648 */
649#define CH_CFG_THREAD_EXTRA_FIELDS \
650 /* Add threads custom fields here.*/
651
652/**
653 * @brief Threads initialization hook.
654 * @details User initialization code added to the @p _thread_init() function.
655 *
656 * @note It is invoked from within @p _thread_init() and implicitly from all
657 * the threads creation APIs.
658 */
659#define CH_CFG_THREAD_INIT_HOOK(tp) { \
660 /* Add threads initialization code here.*/ \
661}
662
663/**
664 * @brief Threads finalization hook.
665 * @details User finalization code added to the @p chThdExit() API.
666 */
667#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
668 /* Add threads finalization code here.*/ \
669}
670
671/**
672 * @brief Context switch hook.
673 * @details This hook is invoked just before switching between threads.
674 */
675#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
676 /* Context switch code here.*/ \
677}
678
679/**
680 * @brief ISR enter hook.
681 */
682#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
683 /* IRQ prologue code here.*/ \
684}
685
686/**
687 * @brief ISR exit hook.
688 */
689#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
690 /* IRQ epilogue code here.*/ \
691}
692
693/**
694 * @brief Idle thread enter hook.
695 * @note This hook is invoked within a critical zone, no OS functions
696 * should be invoked from here.
697 * @note This macro can be used to activate a power saving mode.
698 */
699#define CH_CFG_IDLE_ENTER_HOOK() { \
700 /* Idle-enter code here.*/ \
701}
702
703/**
704 * @brief Idle thread leave hook.
705 * @note This hook is invoked within a critical zone, no OS functions
706 * should be invoked from here.
707 * @note This macro can be used to deactivate a power saving mode.
708 */
709#define CH_CFG_IDLE_LEAVE_HOOK() { \
710 /* Idle-leave code here.*/ \
711}
712
713/**
714 * @brief Idle Loop hook.
715 * @details This hook is continuously invoked by the idle thread loop.
716 */
717#define CH_CFG_IDLE_LOOP_HOOK() { \
718 /* Idle loop code here.*/ \
719}
720
721/**
722 * @brief System tick event hook.
723 * @details This hook is invoked in the system tick handler immediately
724 * after processing the virtual timers queue.
725 */
726#define CH_CFG_SYSTEM_TICK_HOOK() { \
727 /* System tick event code here.*/ \
728}
729
730/**
731 * @brief System halt hook.
732 * @details This hook is invoked in case to a system halting error before
733 * the system is halted.
734 */
735#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
736 /* System halt code here.*/ \
737}
738
739/**
740 * @brief Trace hook.
741 * @details This hook is invoked each time a new record is written in the
742 * trace buffer.
743 */
744#define CH_CFG_TRACE_HOOK(tep) { \
745 /* Trace code here.*/ \
746}
747
748
749/** @} */
750
751/*===========================================================================*/
752/* Port-specific settings (override port settings defaulted in chcore.h). */
753/*===========================================================================*/
754
755#endif /* CHCONF_H */
756
757/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf.h
new file mode 100644
index 000000000..33fddbaa4
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf.h
@@ -0,0 +1,533 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_1_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC FALSE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
76#endif
77
78/**
79 * @brief Enables the GPT subsystem.
80 */
81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
82#define HAL_USE_GPT FALSE
83#endif
84
85/**
86 * @brief Enables the I2C subsystem.
87 */
88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
89#define HAL_USE_I2C FALSE
90#endif
91
92/**
93 * @brief Enables the I2S subsystem.
94 */
95#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
96#define HAL_USE_I2S FALSE
97#endif
98
99/**
100 * @brief Enables the ICU subsystem.
101 */
102#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
103#define HAL_USE_ICU FALSE
104#endif
105
106/**
107 * @brief Enables the MAC subsystem.
108 */
109#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
110#define HAL_USE_MAC FALSE
111#endif
112
113/**
114 * @brief Enables the MMC_SPI subsystem.
115 */
116#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
117#define HAL_USE_MMC_SPI FALSE
118#endif
119
120/**
121 * @brief Enables the PWM subsystem.
122 */
123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
124#define HAL_USE_PWM FALSE
125#endif
126
127/**
128 * @brief Enables the RTC subsystem.
129 */
130#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
131#define HAL_USE_RTC FALSE
132#endif
133
134/**
135 * @brief Enables the SDC subsystem.
136 */
137#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
138#define HAL_USE_SDC FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL subsystem.
143 */
144#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL FALSE
146#endif
147
148/**
149 * @brief Enables the SERIAL over USB subsystem.
150 */
151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
152#define HAL_USE_SERIAL_USB TRUE
153#endif
154
155/**
156 * @brief Enables the SIO subsystem.
157 */
158#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
159#define HAL_USE_SIO FALSE
160#endif
161
162/**
163 * @brief Enables the SPI subsystem.
164 */
165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
166#define HAL_USE_SPI FALSE
167#endif
168
169/**
170 * @brief Enables the TRNG subsystem.
171 */
172#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
173#define HAL_USE_TRNG FALSE
174#endif
175
176/**
177 * @brief Enables the UART subsystem.
178 */
179#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
180#define HAL_USE_UART FALSE
181#endif
182
183/**
184 * @brief Enables the USB subsystem.
185 */
186#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
187#define HAL_USE_USB TRUE
188#endif
189
190/**
191 * @brief Enables the WDG subsystem.
192 */
193#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
194#define HAL_USE_WDG FALSE
195#endif
196
197/**
198 * @brief Enables the WSPI subsystem.
199 */
200#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
201#define HAL_USE_WSPI FALSE
202#endif
203
204/*===========================================================================*/
205/* PAL driver related settings. */
206/*===========================================================================*/
207
208/**
209 * @brief Enables synchronous APIs.
210 * @note Disabling this option saves both code and data space.
211 */
212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
213#define PAL_USE_CALLBACKS FALSE
214#endif
215
216/**
217 * @brief Enables synchronous APIs.
218 * @note Disabling this option saves both code and data space.
219 */
220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
221#define PAL_USE_WAIT FALSE
222#endif
223
224/*===========================================================================*/
225/* ADC driver related settings. */
226/*===========================================================================*/
227
228/**
229 * @brief Enables synchronous APIs.
230 * @note Disabling this option saves both code and data space.
231 */
232#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
233#define ADC_USE_WAIT TRUE
234#endif
235
236/**
237 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
238 * @note Disabling this option saves both code and data space.
239 */
240#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
241#define ADC_USE_MUTUAL_EXCLUSION TRUE
242#endif
243
244/*===========================================================================*/
245/* CAN driver related settings. */
246/*===========================================================================*/
247
248/**
249 * @brief Sleep mode related APIs inclusion switch.
250 */
251#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
252#define CAN_USE_SLEEP_MODE TRUE
253#endif
254
255/**
256 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
257 */
258#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
259#define CAN_ENFORCE_USE_CALLBACKS FALSE
260#endif
261
262/*===========================================================================*/
263/* CRY driver related settings. */
264/*===========================================================================*/
265
266/**
267 * @brief Enables the SW fall-back of the cryptographic driver.
268 * @details When enabled, this option, activates a fall-back software
269 * implementation for algorithms not supported by the underlying
270 * hardware.
271 * @note Fall-back implementations may not be present for all algorithms.
272 */
273#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_USE_FALLBACK FALSE
275#endif
276
277/**
278 * @brief Makes the driver forcibly use the fall-back implementations.
279 */
280#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
281#define HAL_CRY_ENFORCE_FALLBACK FALSE
282#endif
283
284/*===========================================================================*/
285/* DAC driver related settings. */
286/*===========================================================================*/
287
288/**
289 * @brief Enables synchronous APIs.
290 * @note Disabling this option saves both code and data space.
291 */
292#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
293#define DAC_USE_WAIT TRUE
294#endif
295
296/**
297 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
298 * @note Disabling this option saves both code and data space.
299 */
300#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
301#define DAC_USE_MUTUAL_EXCLUSION TRUE
302#endif
303
304/*===========================================================================*/
305/* I2C driver related settings. */
306/*===========================================================================*/
307
308/**
309 * @brief Enables the mutual exclusion APIs on the I2C bus.
310 */
311#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
312#define I2C_USE_MUTUAL_EXCLUSION TRUE
313#endif
314
315/*===========================================================================*/
316/* MAC driver related settings. */
317/*===========================================================================*/
318
319/**
320 * @brief Enables the zero-copy API.
321 */
322#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
323#define MAC_USE_ZERO_COPY FALSE
324#endif
325
326/**
327 * @brief Enables an event sources for incoming packets.
328 */
329#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
330#define MAC_USE_EVENTS TRUE
331#endif
332
333/*===========================================================================*/
334/* MMC_SPI driver related settings. */
335/*===========================================================================*/
336
337/**
338 * @brief Delays insertions.
339 * @details If enabled this options inserts delays into the MMC waiting
340 * routines releasing some extra CPU time for the threads with
341 * lower priority, this may slow down the driver a bit however.
342 * This option is recommended also if the SPI driver does not
343 * use a DMA channel and heavily loads the CPU.
344 */
345#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
346#define MMC_NICE_WAITING TRUE
347#endif
348
349/*===========================================================================*/
350/* SDC driver related settings. */
351/*===========================================================================*/
352
353/**
354 * @brief Number of initialization attempts before rejecting the card.
355 * @note Attempts are performed at 10mS intervals.
356 */
357#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
358#define SDC_INIT_RETRY 100
359#endif
360
361/**
362 * @brief Include support for MMC cards.
363 * @note MMC support is not yet implemented so this option must be kept
364 * at @p FALSE.
365 */
366#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
367#define SDC_MMC_SUPPORT FALSE
368#endif
369
370/**
371 * @brief Delays insertions.
372 * @details If enabled this options inserts delays into the MMC waiting
373 * routines releasing some extra CPU time for the threads with
374 * lower priority, this may slow down the driver a bit however.
375 */
376#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
377#define SDC_NICE_WAITING TRUE
378#endif
379
380/**
381 * @brief OCR initialization constant for V20 cards.
382 */
383#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR_V20 0x50FF8000U
385#endif
386
387/**
388 * @brief OCR initialization constant for non-V20 cards.
389 */
390#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
391#define SDC_INIT_OCR 0x80100000U
392#endif
393
394/*===========================================================================*/
395/* SERIAL driver related settings. */
396/*===========================================================================*/
397
398/**
399 * @brief Default bit rate.
400 * @details Configuration parameter, this is the baud rate selected for the
401 * default configuration.
402 */
403#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
404#define SERIAL_DEFAULT_BITRATE 38400
405#endif
406
407/**
408 * @brief Serial buffers size.
409 * @details Configuration parameter, you can change the depth of the queue
410 * buffers depending on the requirements of your application.
411 * @note The default is 16 bytes for both the transmission and receive
412 * buffers.
413 */
414#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
415#define SERIAL_BUFFERS_SIZE 16
416#endif
417
418/*===========================================================================*/
419/* SERIAL_USB driver related setting. */
420/*===========================================================================*/
421
422/**
423 * @brief Serial over USB buffers size.
424 * @details Configuration parameter, the buffer size must be a multiple of
425 * the USB data endpoint maximum packet size.
426 * @note The default is 256 bytes for both the transmission and receive
427 * buffers.
428 */
429#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
430#define SERIAL_USB_BUFFERS_SIZE 256
431#endif
432
433/**
434 * @brief Serial over USB number of buffers.
435 * @note The default is 2 buffers.
436 */
437#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
438#define SERIAL_USB_BUFFERS_NUMBER 2
439#endif
440
441/*===========================================================================*/
442/* SPI driver related settings. */
443/*===========================================================================*/
444
445/**
446 * @brief Enables synchronous APIs.
447 * @note Disabling this option saves both code and data space.
448 */
449#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
450#define SPI_USE_WAIT TRUE
451#endif
452
453/**
454 * @brief Enables circular transfers APIs.
455 * @note Disabling this option saves both code and data space.
456 */
457#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
458#define SPI_USE_CIRCULAR FALSE
459#endif
460
461/**
462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
463 * @note Disabling this option saves both code and data space.
464 */
465#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
466#define SPI_USE_MUTUAL_EXCLUSION TRUE
467#endif
468
469/**
470 * @brief Handling method for SPI CS line.
471 * @note Disabling this option saves both code and data space.
472 */
473#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
474#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
475#endif
476
477/*===========================================================================*/
478/* UART driver related settings. */
479/*===========================================================================*/
480
481/**
482 * @brief Enables synchronous APIs.
483 * @note Disabling this option saves both code and data space.
484 */
485#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
486#define UART_USE_WAIT FALSE
487#endif
488
489/**
490 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
491 * @note Disabling this option saves both code and data space.
492 */
493#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
494#define UART_USE_MUTUAL_EXCLUSION FALSE
495#endif
496
497/*===========================================================================*/
498/* USB driver related settings. */
499/*===========================================================================*/
500
501/**
502 * @brief Enables synchronous APIs.
503 * @note Disabling this option saves both code and data space.
504 */
505#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
506#define USB_USE_WAIT FALSE
507#endif
508
509/*===========================================================================*/
510/* WSPI driver related settings. */
511/*===========================================================================*/
512
513/**
514 * @brief Enables synchronous APIs.
515 * @note Disabling this option saves both code and data space.
516 */
517#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
518#define WSPI_USE_WAIT TRUE
519#endif
520
521/**
522 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
523 * @note Disabling this option saves both code and data space.
524 */
525#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
526#define WSPI_USE_MUTUAL_EXCLUSION TRUE
527#endif
528
529#include "halconf_community.h"
530
531#endif /* HALCONF_H */
532
533/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf_community.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf_community.h
new file mode 100644
index 000000000..8eb854b23
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/halconf_community.h
@@ -0,0 +1,187 @@
1/*
2 ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef HALCONF_COMMUNITY_H
18#define HALCONF_COMMUNITY_H
19
20/**
21 * @brief Enables the community overlay.
22 */
23#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
24#define HAL_USE_COMMUNITY TRUE
25#endif
26
27/**
28 * @brief Enables the FSMC subsystem.
29 */
30#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
31#define HAL_USE_FSMC FALSE
32#endif
33
34/**
35 * @brief Enables the SDRAM subsystem.
36 */
37#if !defined(HAL_USE_SDRAM) || defined(__DOXYGEN__)
38#define HAL_USE_SDRAM FALSE
39#endif
40
41/**
42 * @brief Enables the SRAM subsystem.
43 */
44#if !defined(HAL_USE_SRAM) || defined(__DOXYGEN__)
45#define HAL_USE_SRAM FALSE
46#endif
47
48/**
49 * @brief Enables the NAND subsystem.
50 */
51#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
52#define HAL_USE_NAND FALSE
53#endif
54
55/**
56 * @brief Enables the 1-wire subsystem.
57 */
58#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
59#define HAL_USE_ONEWIRE FALSE
60#endif
61
62/**
63 * @brief Enables the EICU subsystem.
64 */
65#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
66#define HAL_USE_EICU FALSE
67#endif
68
69/**
70 * @brief Enables the CRC subsystem.
71 */
72#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
73#define HAL_USE_CRC FALSE
74#endif
75
76/**
77 * @brief Enables the RNG subsystem.
78 */
79#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
80#define HAL_USE_RNG FALSE
81#endif
82
83/**
84 * @brief Enables the EEPROM subsystem.
85 */
86#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)
87#define HAL_USE_EEPROM FALSE
88#endif
89
90/**
91 * @brief Enables the TIMCAP subsystem.
92 */
93#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)
94#define HAL_USE_TIMCAP FALSE
95#endif
96
97/**
98 * @brief Enables the TIMCAP subsystem.
99 */
100#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)
101#define HAL_USE_COMP FALSE
102#endif
103
104/**
105 * @brief Enables the QEI subsystem.
106 */
107#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
108#define HAL_USE_QEI TRUE
109#endif
110
111/**
112 * @brief Enables the USBH subsystem.
113 */
114#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__)
115#define HAL_USE_USBH FALSE
116#endif
117
118/**
119 * @brief Enables the USB_MSD subsystem.
120 */
121#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__)
122#define HAL_USE_USB_MSD FALSE
123#endif
124
125/*===========================================================================*/
126/* FSMCNAND driver related settings. */
127/*===========================================================================*/
128
129/**
130 * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
131 * @note Disabling this option saves both code and data space.
132 */
133#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
134#define NAND_USE_MUTUAL_EXCLUSION TRUE
135#endif
136
137/*===========================================================================*/
138/* 1-wire driver related settings. */
139/*===========================================================================*/
140/**
141 * @brief Enables strong pull up feature.
142 * @note Disabling this option saves both code and data space.
143 */
144#define ONEWIRE_USE_STRONG_PULLUP FALSE
145
146/**
147 * @brief Enables search ROM feature.
148 * @note Disabling this option saves both code and data space.
149 */
150#define ONEWIRE_USE_SEARCH_ROM TRUE
151
152/*===========================================================================*/
153/* QEI driver related settings. */
154/*===========================================================================*/
155
156/**
157 * @brief Enables discard of overlow
158 */
159#if !defined(QEI_USE_OVERFLOW_DISCARD) || defined(__DOXYGEN__)
160#define QEI_USE_OVERFLOW_DISCARD FALSE
161#endif
162
163/**
164 * @brief Enables min max of overlow
165 */
166#if !defined(QEI_USE_OVERFLOW_MINMAX) || defined(__DOXYGEN__)
167#define QEI_USE_OVERFLOW_MINMAX FALSE
168#endif
169
170/*===========================================================================*/
171/* EEProm driver related settings. */
172/*===========================================================================*/
173
174/**
175 * @brief Enables 24xx series I2C eeprom device driver.
176 * @note Disabling this option saves both code and data space.
177 */
178#define EEPROM_USE_EE24XX FALSE
179 /**
180 * @brief Enables 25xx series SPI eeprom device driver.
181 * @note Disabling this option saves both code and data space.
182 */
183#define EEPROM_USE_EE25XX FALSE
184
185#endif /* HALCONF_COMMUNITY_H */
186
187/** @} */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/main.c b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/main.c
new file mode 100644
index 000000000..499198989
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/main.c
@@ -0,0 +1,54 @@
1/*
2 ChibiOS - Copyright (C) 2006..2016 Nicolas Reinecke
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "ch.h"
18#include "hal.h"
19
20
21/*
22 * Application entry point.
23 */
24int main(void) {
25
26 /*
27 * System initializations.
28 * - HAL initialization, this also initializes the configured device drivers
29 * and performs the board-specific initializations.
30 * - Kernel initialization, the main() function becomes a thread and the
31 * RTOS is active.
32 */
33 halInit();
34 chSysInit();
35
36 static QEIConfig qeicfg = {
37 QEI_MODE_QUADRATURE,
38 QEI_BOTH_EDGES,
39 QEI_DIRINV_FALSE,
40 };
41
42 AFIO->MAPR |= AFIO_MAPR_TIM3_REMAP_FULLREMAP;
43 qeiStart(&QEID3, &qeicfg);
44 qeiEnable(&QEID3);
45
46 uint16_t qei;
47 while (1) {
48 qei = qeiGetCount(&QEID3);
49 if (qei & 1)
50 palSetPad(GPIOC, GPIOC_LED);
51 else
52 palClearPad(GPIOC, GPIOC_LED);
53 }
54}
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf.h
new file mode 100644
index 000000000..7db7a7ab6
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf.h
@@ -0,0 +1,216 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#ifndef MCUCONF_H
18#define MCUCONF_H
19
20#define STM32F103_MCUCONF
21
22/*
23 * STM32F103 drivers configuration.
24 * The following settings override the default settings present in
25 * the various device driver implementation headers.
26 * Note that the settings for each driver only have effect if the whole
27 * driver is enabled in halconf.h.
28 *
29 * IRQ priorities:
30 * 15...0 Lowest...Highest.
31 *
32 * DMA priorities:
33 * 0...3 Lowest...Highest.
34 */
35
36/*
37 * HAL driver system settings.
38 */
39#define STM32_NO_INIT FALSE
40#define STM32_HSI_ENABLED TRUE
41#define STM32_LSI_ENABLED FALSE
42#define STM32_HSE_ENABLED TRUE
43#define STM32_LSE_ENABLED FALSE
44#define STM32_SW STM32_SW_PLL
45#define STM32_PLLSRC STM32_PLLSRC_HSE
46#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
47#define STM32_PLLMUL_VALUE 9
48#define STM32_HPRE STM32_HPRE_DIV1
49#define STM32_PPRE1 STM32_PPRE1_DIV2
50#define STM32_PPRE2 STM32_PPRE2_DIV2
51#define STM32_ADCPRE STM32_ADCPRE_DIV4
52#define STM32_USB_CLOCK_REQUIRED TRUE
53#define STM32_USBPRE STM32_USBPRE_DIV1P5
54#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
55#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
56#define STM32_PVD_ENABLE FALSE
57#define STM32_PLS STM32_PLS_LEV0
58
59/*
60 * IRQ system settings.
61 */
62#define STM32_IRQ_EXTI0_PRIORITY 6
63#define STM32_IRQ_EXTI1_PRIORITY 6
64#define STM32_IRQ_EXTI2_PRIORITY 6
65#define STM32_IRQ_EXTI3_PRIORITY 6
66#define STM32_IRQ_EXTI4_PRIORITY 6
67#define STM32_IRQ_EXTI5_9_PRIORITY 6
68#define STM32_IRQ_EXTI10_15_PRIORITY 6
69#define STM32_IRQ_EXTI16_PRIORITY 6
70#define STM32_IRQ_EXTI17_PRIORITY 6
71#define STM32_IRQ_EXTI18_PRIORITY 6
72#define STM32_IRQ_EXTI19_PRIORITY 6
73
74/*
75 * ADC driver system settings.
76 */
77#define STM32_ADC_USE_ADC1 FALSE
78#define STM32_ADC_ADC1_DMA_PRIORITY 2
79#define STM32_ADC_ADC1_IRQ_PRIORITY 6
80
81/*
82 * CAN driver system settings.
83 */
84#define STM32_CAN_USE_CAN1 FALSE
85#define STM32_CAN_CAN1_IRQ_PRIORITY 11
86
87/*
88 * GPT driver system settings.
89 */
90#define STM32_GPT_USE_TIM1 FALSE
91#define STM32_GPT_USE_TIM2 FALSE
92#define STM32_GPT_USE_TIM3 FALSE
93#define STM32_GPT_USE_TIM4 FALSE
94#define STM32_GPT_USE_TIM5 FALSE
95#define STM32_GPT_USE_TIM8 FALSE
96#define STM32_GPT_TIM1_IRQ_PRIORITY 7
97#define STM32_GPT_TIM2_IRQ_PRIORITY 7
98#define STM32_GPT_TIM3_IRQ_PRIORITY 7
99#define STM32_GPT_TIM4_IRQ_PRIORITY 7
100#define STM32_GPT_TIM5_IRQ_PRIORITY 7
101#define STM32_GPT_TIM8_IRQ_PRIORITY 7
102
103/*
104 * I2C driver system settings.
105 */
106#define STM32_I2C_USE_I2C1 FALSE
107#define STM32_I2C_USE_I2C2 FALSE
108#define STM32_I2C_BUSY_TIMEOUT 50
109#define STM32_I2C_I2C1_IRQ_PRIORITY 5
110#define STM32_I2C_I2C2_IRQ_PRIORITY 5
111#define STM32_I2C_I2C1_DMA_PRIORITY 3
112#define STM32_I2C_I2C2_DMA_PRIORITY 3
113#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
114
115/*
116 * ICU driver system settings.
117 */
118#define STM32_ICU_USE_TIM1 FALSE
119#define STM32_ICU_USE_TIM2 FALSE
120#define STM32_ICU_USE_TIM3 FALSE
121#define STM32_ICU_USE_TIM4 FALSE
122#define STM32_ICU_USE_TIM5 FALSE
123#define STM32_ICU_USE_TIM8 FALSE
124#define STM32_ICU_TIM1_IRQ_PRIORITY 7
125#define STM32_ICU_TIM2_IRQ_PRIORITY 7
126#define STM32_ICU_TIM3_IRQ_PRIORITY 7
127#define STM32_ICU_TIM4_IRQ_PRIORITY 7
128#define STM32_ICU_TIM5_IRQ_PRIORITY 7
129#define STM32_ICU_TIM8_IRQ_PRIORITY 7
130
131/*
132 * PWM driver system settings.
133 */
134#define STM32_PWM_USE_ADVANCED FALSE
135#define STM32_PWM_USE_TIM1 FALSE
136#define STM32_PWM_USE_TIM2 FALSE
137#define STM32_PWM_USE_TIM3 FALSE
138#define STM32_PWM_USE_TIM4 FALSE
139#define STM32_PWM_USE_TIM5 FALSE
140#define STM32_PWM_USE_TIM8 FALSE
141#define STM32_PWM_TIM1_IRQ_PRIORITY 7
142#define STM32_PWM_TIM2_IRQ_PRIORITY 7
143#define STM32_PWM_TIM3_IRQ_PRIORITY 7
144#define STM32_PWM_TIM4_IRQ_PRIORITY 7
145#define STM32_PWM_TIM5_IRQ_PRIORITY 7
146#define STM32_PWM_TIM8_IRQ_PRIORITY 7
147
148/*
149 * RTC driver system settings.
150 */
151#define STM32_RTC_IRQ_PRIORITY 15
152
153/*
154 * SERIAL driver system settings.
155 */
156#define STM32_SERIAL_USE_USART1 FALSE
157#define STM32_SERIAL_USE_USART2 FALSE
158#define STM32_SERIAL_USE_USART3 FALSE
159#define STM32_SERIAL_USE_UART4 FALSE
160#define STM32_SERIAL_USE_UART5 FALSE
161#define STM32_SERIAL_USART1_PRIORITY 12
162#define STM32_SERIAL_USART2_PRIORITY 12
163#define STM32_SERIAL_USART3_PRIORITY 12
164#define STM32_SERIAL_UART4_PRIORITY 12
165#define STM32_SERIAL_UART5_PRIORITY 12
166
167/*
168 * SPI driver system settings.
169 */
170#define STM32_SPI_USE_SPI1 FALSE
171#define STM32_SPI_USE_SPI2 FALSE
172#define STM32_SPI_USE_SPI3 FALSE
173#define STM32_SPI_SPI1_DMA_PRIORITY 1
174#define STM32_SPI_SPI2_DMA_PRIORITY 1
175#define STM32_SPI_SPI3_DMA_PRIORITY 1
176#define STM32_SPI_SPI1_IRQ_PRIORITY 10
177#define STM32_SPI_SPI2_IRQ_PRIORITY 10
178#define STM32_SPI_SPI3_IRQ_PRIORITY 10
179#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
180
181/*
182 * ST driver system settings.
183 */
184#define STM32_ST_IRQ_PRIORITY 8
185#define STM32_ST_USE_TIMER 2
186
187/*
188 * UART driver system settings.
189 */
190#define STM32_UART_USE_USART1 FALSE
191#define STM32_UART_USE_USART2 FALSE
192#define STM32_UART_USE_USART3 FALSE
193#define STM32_UART_USART1_IRQ_PRIORITY 12
194#define STM32_UART_USART2_IRQ_PRIORITY 12
195#define STM32_UART_USART3_IRQ_PRIORITY 12
196#define STM32_UART_USART1_DMA_PRIORITY 0
197#define STM32_UART_USART2_DMA_PRIORITY 0
198#define STM32_UART_USART3_DMA_PRIORITY 0
199#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
200
201/*
202 * USB driver system settings.
203 */
204#define STM32_USB_USE_USB1 TRUE
205#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
206#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
207#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
208
209/*
210 * WDG driver system settings.
211 */
212#define STM32_WDG_USE_IWDG FALSE
213
214#include "mcuconf_community.h"
215
216#endif /* MCUCONF_H */
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf_community.h b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf_community.h
new file mode 100644
index 000000000..377e1bdcd
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/mcuconf_community.h
@@ -0,0 +1,157 @@
1/*
2 ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * FSMC driver system settings.
19 */
20#define STM32_FSMC_USE_FSMC1 FALSE
21#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10
22
23/*
24 * FSMC NAND driver system settings.
25 */
26#define STM32_NAND_USE_NAND1 FALSE
27#define STM32_NAND_USE_NAND2 FALSE
28#define STM32_NAND_USE_EXT_INT FALSE
29#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
30#define STM32_NAND_DMA_PRIORITY 0
31#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure")
32
33/*
34 * FSMC SRAM driver system settings.
35 */
36#define STM32_USE_FSMC_SRAM FALSE
37#define STM32_SRAM_USE_FSMC_SRAM1 FALSE
38#define STM32_SRAM_USE_FSMC_SRAM2 FALSE
39#define STM32_SRAM_USE_FSMC_SRAM3 FALSE
40#define STM32_SRAM_USE_FSMC_SRAM4 FALSE
41
42/*
43 * FSMC SDRAM driver system settings.
44 */
45#define STM32_USE_FSMC_SDRAM FALSE
46#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE
47#define STM32_SDRAM_USE_FSMC_SDRAM2 TRUE
48
49/*
50 * TIMCAP driver system settings.
51 */
52#define STM32_TIMCAP_USE_TIM1 TRUE
53#define STM32_TIMCAP_USE_TIM2 FALSE
54#define STM32_TIMCAP_USE_TIM3 TRUE
55#define STM32_TIMCAP_USE_TIM4 TRUE
56#define STM32_TIMCAP_USE_TIM5 TRUE
57#define STM32_TIMCAP_USE_TIM8 TRUE
58#define STM32_TIMCAP_USE_TIM9 TRUE
59#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3
60#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3
61#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3
62#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3
63#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3
64#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3
65#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3
66
67/*
68 * COMP driver system settings.
69 */
70#define STM32_COMP_USE_COMP1 TRUE
71#define STM32_COMP_USE_COMP2 TRUE
72#define STM32_COMP_USE_COMP3 TRUE
73#define STM32_COMP_USE_COMP4 TRUE
74#define STM32_COMP_USE_COMP5 TRUE
75#define STM32_COMP_USE_COMP6 TRUE
76#define STM32_COMP_USE_COMP7 TRUE
77
78#define STM32_COMP_USE_INTERRUPTS TRUE
79#define STM32_COMP_1_2_3_IRQ_PRIORITY 5
80#define STM32_COMP_4_5_6_IRQ_PRIORITY 5
81#define STM32_COMP_7_IRQ_PRIORITY 5
82
83#if STM32_COMP_USE_INTERRUPTS
84#define STM32_DISABLE_EXTI21_22_29_HANDLER
85#define STM32_DISABLE_EXTI30_32_HANDLER
86#define STM32_DISABLE_EXTI33_HANDLER
87#endif
88
89/*
90 * USBH driver system settings.
91 */
92#define STM32_OTG_FS_CHANNELS_NUMBER 8
93#define STM32_OTG_HS_CHANNELS_NUMBER 12
94
95#define STM32_USBH_USE_OTG1 1
96#define STM32_OTG_FS_RXFIFO_SIZE 1024
97#define STM32_OTG_FS_PTXFIFO_SIZE 128
98#define STM32_OTG_FS_NPTXFIFO_SIZE 128
99
100#define STM32_USBH_USE_OTG2 0
101#define STM32_OTG_HS_RXFIFO_SIZE 2048
102#define STM32_OTG_HS_PTXFIFO_SIZE 1024
103#define STM32_OTG_HS_NPTXFIFO_SIZE 1024
104
105#define STM32_USBH_MIN_QSPACE 4
106#define STM32_USBH_CHANNELS_NP 4
107
108/*
109 * CRC driver system settings.
110 */
111#define STM32_CRC_USE_CRC1 TRUE
112#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1
113#define STM32_CRC_CRC1_DMA_PRIORITY 2
114#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2
115
116#define CRCSW_USE_CRC1 FALSE
117#define CRCSW_CRC32_TABLE TRUE
118#define CRCSW_CRC16_TABLE TRUE
119#define CRCSW_PROGRAMMABLE TRUE
120
121/*
122 * EICU driver system settings.
123 */
124#define STM32_EICU_USE_TIM1 TRUE
125#define STM32_EICU_USE_TIM2 FALSE
126#define STM32_EICU_USE_TIM3 TRUE
127#define STM32_EICU_USE_TIM4 TRUE
128#define STM32_EICU_USE_TIM5 TRUE
129#define STM32_EICU_USE_TIM8 TRUE
130#define STM32_EICU_USE_TIM9 TRUE
131#define STM32_EICU_USE_TIM10 TRUE
132#define STM32_EICU_USE_TIM11 TRUE
133#define STM32_EICU_USE_TIM12 TRUE
134#define STM32_EICU_USE_TIM13 TRUE
135#define STM32_EICU_USE_TIM14 TRUE
136#define STM32_EICU_TIM1_IRQ_PRIORITY 7
137#define STM32_EICU_TIM2_IRQ_PRIORITY 7
138#define STM32_EICU_TIM3_IRQ_PRIORITY 7
139#define STM32_EICU_TIM4_IRQ_PRIORITY 7
140#define STM32_EICU_TIM5_IRQ_PRIORITY 7
141#define STM32_EICU_TIM8_IRQ_PRIORITY 7
142#define STM32_EICU_TIM9_IRQ_PRIORITY 7
143#define STM32_EICU_TIM10_IRQ_PRIORITY 7
144#define STM32_EICU_TIM11_IRQ_PRIORITY 7
145#define STM32_EICU_TIM12_IRQ_PRIORITY 7
146#define STM32_EICU_TIM13_IRQ_PRIORITY 7
147#define STM32_EICU_TIM14_IRQ_PRIORITY 7
148
149/*
150 * QEI driver system settings.
151 */
152#define STM32_QEI_USE_TIM1 TRUE
153#define STM32_QEI_USE_TIM2 FALSE
154#define STM32_QEI_USE_TIM3 TRUE
155#define STM32_QEI_TIM1_IRQ_PRIORITY 3
156#define STM32_QEI_TIM2_IRQ_PRIORITY 3
157#define STM32_QEI_TIM3_IRQ_PRIORITY 3
diff --git a/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/readme.txt b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/readme.txt
new file mode 100644
index 000000000..f415530d0
--- /dev/null
+++ b/lib/chibios-contrib/testhal/STM32/STM32F1xx/qei/readme.txt
@@ -0,0 +1,27 @@
1*****************************************************************************
2** ChibiOS/HAL - qei driver demo for STM32F1xx. **
3*****************************************************************************
4
5** TARGET **
6
7The demo runs on an Olimex STM32_103STK board.
8
9** The Demo **
10
11The application demonstrates the use of the STM32F1xx QEI encoder driver.
12
13** Board Setup **
14
15To use demo you have to connect an encoder to one of the timers that support
16the encoder mode to ch1 and ch2 and add an external pullup resistor to 3V3.
17For good results add 100n capacitors to GND.
18
19
20** Notes **
21
22Some files used by the demo are not part of ChibiOS/RT but are copyright of
23ST Microelectronics and are licensed under a different license.
24Also note that not all the files present in the ST library are distributed
25with ChibiOS/RT, you can find the whole library on the ST web site:
26
27 http://www.st.com
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 18:52:13 +0100