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-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/Makefile212
-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/chconf.h757
-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/debug/TM4C123x-ADC (OpenOCD, Flash and Run).launch52
-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/halconf.h531
-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/main.c165
-rw-r--r--lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/mcuconf.h180
6 files changed, 1897 insertions, 0 deletions
diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/Makefile b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/Makefile
new file mode 100644
index 000000000..a1f0fdeb5
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/Makefile
@@ -0,0 +1,212 @@
1##############################################################################
2# Build global options
3# NOTE: Can be overridden externally.
4#
5
6# Compiler options here.
7ifeq ($(USE_OPT),)
8 USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
9endif
10
11# C specific options here (added to USE_OPT).
12ifeq ($(USE_COPT),)
13 USE_COPT =
14endif
15
16# C++ specific options here (added to USE_OPT).
17ifeq ($(USE_CPPOPT),)
18 USE_CPPOPT = -fno-rtti
19endif
20
21# Enable this if you want the linker to remove unused code and data
22ifeq ($(USE_LINK_GC),)
23 USE_LINK_GC = yes
24endif
25
26# Linker extra options here.
27ifeq ($(USE_LDOPT),)
28 USE_LDOPT =
29endif
30
31# Enable this if you want link time optimizations (LTO)
32ifeq ($(USE_LTO),)
33 USE_LTO = yes
34endif
35
36# If enabled, this option allows to compile the application in THUMB mode.
37ifeq ($(USE_THUMB),)
38 USE_THUMB = yes
39endif
40
41# Enable this if you want to see the full log while compiling.
42ifeq ($(USE_VERBOSE_COMPILE),)
43 USE_VERBOSE_COMPILE = no
44endif
45
46# If enabled, this option makes the build process faster by not compiling
47# modules not used in the current configuration.
48ifeq ($(USE_SMART_BUILD),)
49 USE_SMART_BUILD = yes
50endif
51
52#
53# Build global options
54##############################################################################
55
56##############################################################################
57# Architecture or project specific options
58#
59
60# Stack size to be allocated to the Cortex-M process stack. This stack is
61# the stack used by the main() thread.
62ifeq ($(USE_PROCESS_STACKSIZE),)
63 USE_PROCESS_STACKSIZE = 0x400
64endif
65
66# Stack size to the allocated to the Cortex-M main/exceptions stack. This
67# stack is used for processing interrupts and exceptions.
68ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
69 USE_EXCEPTIONS_STACKSIZE = 0x400
70endif
71
72# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
73ifeq ($(USE_FPU),)
74 USE_FPU = no
75endif
76
77#
78# Architecture or project specific options
79##############################################################################
80
81##############################################################################
82# Project, sources and paths
83#
84
85# Define project name here
86PROJECT = ch
87
88# Imported source files and paths
89CHIBIOS = ../../../../../ChibiOS
90CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
91
92# Licensing files.
93include $(CHIBIOS)/os/license/license.mk
94# Startup files.
95include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_tm4c123x.mk
96# HAL-OSAL files (optional).
97include $(CHIBIOS)/os/hal/hal.mk
98include $(CHIBIOS_CONTRIB)/os/hal/ports/TIVA/TM4C123x/platform.mk
99include $(CHIBIOS_CONTRIB)/os/hal/boards/TI_TM4C123G_LAUNCHPAD/board.mk
100include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
101# RTOS files (optional).
102include $(CHIBIOS)/os/rt/rt.mk
103include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
104# Other files (optional).
105include $(CHIBIOS)/os/hal/lib/streams/streams.mk
106
107# Define linker script file here
108LDSCRIPT= $(STARTUPLD)/TM4C123xH6.ld
109
110# C sources that can be compiled in ARM or THUMB mode depending on the global
111# setting.
112CSRC = $(ALLCSRC) \
113 main.c
114
115# C++ sources that can be compiled in ARM or THUMB mode depending on the global
116# setting.
117CPPSRC = $(ALLCPPSRC)
118
119# C sources to be compiled in ARM mode regardless of the global setting.
120# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
121# option that results in lower performance and larger code size.
122ACSRC =
123
124# C++ sources to be compiled in ARM mode regardless of the global setting.
125# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
126# option that results in lower performance and larger code size.
127ACPPSRC =
128
129# C sources to be compiled in THUMB mode regardless of the global setting.
130# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
131# option that results in lower performance and larger code size.
132TCSRC =
133
134# C sources to be compiled in THUMB mode regardless of the global setting.
135# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
136# option that results in lower performance and larger code size.
137TCPPSRC =
138
139# List ASM source files here
140ASMSRC = $(ALLASMSRC)
141ASMXSRC = $(ALLXASMSRC)
142
143INCDIR = $(ALLINC)
144
145#
146# Project, sources and paths
147##############################################################################
148
149##############################################################################
150# Compiler settings
151#
152
153MCU = cortex-m4
154
155#TRGT = arm-elf-
156TRGT = arm-none-eabi-
157CC = $(TRGT)gcc
158CPPC = $(TRGT)g++
159# Enable loading with g++ only if you need C++ runtime support.
160# NOTE: You can use C++ even without C++ support if you are careful. C++
161# runtime support makes code size explode.
162LD = $(TRGT)gcc
163#LD = $(TRGT)g++
164CP = $(TRGT)objcopy
165AS = $(TRGT)gcc -x assembler-with-cpp
166AR = $(TRGT)ar
167OD = $(TRGT)objdump
168SZ = $(TRGT)size
169HEX = $(CP) -O ihex
170BIN = $(CP) -O binary
171
172# ARM-specific options here
173AOPT =
174
175# THUMB-specific options here
176TOPT = -mthumb -DTHUMB
177
178# Define C warning options here
179CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
180
181# Define C++ warning options here
182CPPWARN = -Wall -Wextra -Wundef
183
184#
185# Compiler settings
186##############################################################################
187
188##############################################################################
189# Start of user section
190#
191
192# List all user C define here, like -D_DEBUG=1
193UDEFS =
194
195# Define ASM defines here
196UADEFS =
197
198# List all user directories here
199UINCDIR =
200
201# List the user directory to look for the libraries here
202ULIBDIR =
203
204# List all user libraries here
205ULIBS =
206
207#
208# End of user defines
209##############################################################################
210
211RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
212include $(RULESPATH)/rules.mk
diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/chconf.h b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/chconf.h
new file mode 100644
index 000000000..b6753aba6
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/chconf.h
@@ -0,0 +1,757 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file rt/templates/chconf.h
19 * @brief Configuration file template.
20 * @details A copy of this file must be placed in each project directory, it
21 * contains the application specific kernel settings.
22 *
23 * @addtogroup config
24 * @details Kernel related settings and hooks.
25 * @{
26 */
27
28#ifndef CHCONF_H
29#define CHCONF_H
30
31#define _CHIBIOS_RT_CONF_
32#define _CHIBIOS_RT_CONF_VER_6_1_
33
34/*===========================================================================*/
35/**
36 * @name System timers settings
37 * @{
38 */
39/*===========================================================================*/
40
41/**
42 * @brief System time counter resolution.
43 * @note Allowed values are 16 or 32 bits.
44 */
45#if !defined(CH_CFG_ST_RESOLUTION)
46#define CH_CFG_ST_RESOLUTION 32
47#endif
48
49/**
50 * @brief System tick frequency.
51 * @details Frequency of the system timer that drives the system ticks. This
52 * setting also defines the system tick time unit.
53 */
54#if !defined(CH_CFG_ST_FREQUENCY)
55#define CH_CFG_ST_FREQUENCY 10000
56#endif
57
58/**
59 * @brief Time intervals data size.
60 * @note Allowed values are 16, 32 or 64 bits.
61 */
62#if !defined(CH_CFG_INTERVALS_SIZE)
63#define CH_CFG_INTERVALS_SIZE 32
64#endif
65
66/**
67 * @brief Time types data size.
68 * @note Allowed values are 16 or 32 bits.
69 */
70#if !defined(CH_CFG_TIME_TYPES_SIZE)
71#define CH_CFG_TIME_TYPES_SIZE 32
72#endif
73
74/**
75 * @brief Time delta constant for the tick-less mode.
76 * @note If this value is zero then the system uses the classic
77 * periodic tick. This value represents the minimum number
78 * of ticks that is safe to specify in a timeout directive.
79 * The value one is not valid, timeouts are rounded up to
80 * this value.
81 */
82#if !defined(CH_CFG_ST_TIMEDELTA)
83#define CH_CFG_ST_TIMEDELTA 2
84#endif
85
86/** @} */
87
88/*===========================================================================*/
89/**
90 * @name Kernel parameters and options
91 * @{
92 */
93/*===========================================================================*/
94
95/**
96 * @brief Round robin interval.
97 * @details This constant is the number of system ticks allowed for the
98 * threads before preemption occurs. Setting this value to zero
99 * disables the preemption for threads with equal priority and the
100 * round robin becomes cooperative. Note that higher priority
101 * threads can still preempt, the kernel is always preemptive.
102 * @note Disabling the round robin preemption makes the kernel more compact
103 * and generally faster.
104 * @note The round robin preemption is not supported in tickless mode and
105 * must be set to zero in that case.
106 */
107#if !defined(CH_CFG_TIME_QUANTUM)
108#define CH_CFG_TIME_QUANTUM 0
109#endif
110
111/**
112 * @brief Idle thread automatic spawn suppression.
113 * @details When this option is activated the function @p chSysInit()
114 * does not spawn the idle thread. The application @p main()
115 * function becomes the idle thread and must implement an
116 * infinite loop.
117 */
118#if !defined(CH_CFG_NO_IDLE_THREAD)
119#define CH_CFG_NO_IDLE_THREAD FALSE
120#endif
121
122/** @} */
123
124/*===========================================================================*/
125/**
126 * @name Performance options
127 * @{
128 */
129/*===========================================================================*/
130
131/**
132 * @brief OS optimization.
133 * @details If enabled then time efficient rather than space efficient code
134 * is used when two possible implementations exist.
135 *
136 * @note This is not related to the compiler optimization options.
137 * @note The default is @p TRUE.
138 */
139#if !defined(CH_CFG_OPTIMIZE_SPEED)
140#define CH_CFG_OPTIMIZE_SPEED TRUE
141#endif
142
143/** @} */
144
145/*===========================================================================*/
146/**
147 * @name Subsystem options
148 * @{
149 */
150/*===========================================================================*/
151
152/**
153 * @brief Time Measurement APIs.
154 * @details If enabled then the time measurement APIs are included in
155 * the kernel.
156 *
157 * @note The default is @p TRUE.
158 */
159#if !defined(CH_CFG_USE_TM)
160#define CH_CFG_USE_TM TRUE
161#endif
162
163/**
164 * @brief Threads registry APIs.
165 * @details If enabled then the registry APIs are included in the kernel.
166 *
167 * @note The default is @p TRUE.
168 */
169#if !defined(CH_CFG_USE_REGISTRY)
170#define CH_CFG_USE_REGISTRY TRUE
171#endif
172
173/**
174 * @brief Threads synchronization APIs.
175 * @details If enabled then the @p chThdWait() function is included in
176 * the kernel.
177 *
178 * @note The default is @p TRUE.
179 */
180#if !defined(CH_CFG_USE_WAITEXIT)
181#define CH_CFG_USE_WAITEXIT TRUE
182#endif
183
184/**
185 * @brief Semaphores APIs.
186 * @details If enabled then the Semaphores APIs are included in the kernel.
187 *
188 * @note The default is @p TRUE.
189 */
190#if !defined(CH_CFG_USE_SEMAPHORES)
191#define CH_CFG_USE_SEMAPHORES TRUE
192#endif
193
194/**
195 * @brief Semaphores queuing mode.
196 * @details If enabled then the threads are enqueued on semaphores by
197 * priority rather than in FIFO order.
198 *
199 * @note The default is @p FALSE. Enable this if you have special
200 * requirements.
201 * @note Requires @p CH_CFG_USE_SEMAPHORES.
202 */
203#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
204#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
205#endif
206
207/**
208 * @brief Mutexes APIs.
209 * @details If enabled then the mutexes APIs are included in the kernel.
210 *
211 * @note The default is @p TRUE.
212 */
213#if !defined(CH_CFG_USE_MUTEXES)
214#define CH_CFG_USE_MUTEXES TRUE
215#endif
216
217/**
218 * @brief Enables recursive behavior on mutexes.
219 * @note Recursive mutexes are heavier and have an increased
220 * memory footprint.
221 *
222 * @note The default is @p FALSE.
223 * @note Requires @p CH_CFG_USE_MUTEXES.
224 */
225#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
226#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
227#endif
228
229/**
230 * @brief Conditional Variables APIs.
231 * @details If enabled then the conditional variables APIs are included
232 * in the kernel.
233 *
234 * @note The default is @p TRUE.
235 * @note Requires @p CH_CFG_USE_MUTEXES.
236 */
237#if !defined(CH_CFG_USE_CONDVARS)
238#define CH_CFG_USE_CONDVARS TRUE
239#endif
240
241/**
242 * @brief Conditional Variables APIs with timeout.
243 * @details If enabled then the conditional variables APIs with timeout
244 * specification are included in the kernel.
245 *
246 * @note The default is @p TRUE.
247 * @note Requires @p CH_CFG_USE_CONDVARS.
248 */
249#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
250#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
251#endif
252
253/**
254 * @brief Events Flags APIs.
255 * @details If enabled then the event flags APIs are included in the kernel.
256 *
257 * @note The default is @p TRUE.
258 */
259#if !defined(CH_CFG_USE_EVENTS)
260#define CH_CFG_USE_EVENTS TRUE
261#endif
262
263/**
264 * @brief Events Flags APIs with timeout.
265 * @details If enabled then the events APIs with timeout specification
266 * are included in the kernel.
267 *
268 * @note The default is @p TRUE.
269 * @note Requires @p CH_CFG_USE_EVENTS.
270 */
271#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
272#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
273#endif
274
275/**
276 * @brief Synchronous Messages APIs.
277 * @details If enabled then the synchronous messages APIs are included
278 * in the kernel.
279 *
280 * @note The default is @p TRUE.
281 */
282#if !defined(CH_CFG_USE_MESSAGES)
283#define CH_CFG_USE_MESSAGES TRUE
284#endif
285
286/**
287 * @brief Synchronous Messages queuing mode.
288 * @details If enabled then messages are served by priority rather than in
289 * FIFO order.
290 *
291 * @note The default is @p FALSE. Enable this if you have special
292 * requirements.
293 * @note Requires @p CH_CFG_USE_MESSAGES.
294 */
295#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
296#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
297#endif
298
299/**
300 * @brief Dynamic Threads APIs.
301 * @details If enabled then the dynamic threads creation APIs are included
302 * in the kernel.
303 *
304 * @note The default is @p TRUE.
305 * @note Requires @p CH_CFG_USE_WAITEXIT.
306 * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
307 */
308#if !defined(CH_CFG_USE_DYNAMIC)
309#define CH_CFG_USE_DYNAMIC TRUE
310#endif
311
312/** @} */
313
314/*===========================================================================*/
315/**
316 * @name OSLIB options
317 * @{
318 */
319/*===========================================================================*/
320
321/**
322 * @brief Mailboxes APIs.
323 * @details If enabled then the asynchronous messages (mailboxes) APIs are
324 * included in the kernel.
325 *
326 * @note The default is @p TRUE.
327 * @note Requires @p CH_CFG_USE_SEMAPHORES.
328 */
329#if !defined(CH_CFG_USE_MAILBOXES)
330#define CH_CFG_USE_MAILBOXES TRUE
331#endif
332
333/**
334 * @brief Core Memory Manager APIs.
335 * @details If enabled then the core memory manager APIs are included
336 * in the kernel.
337 *
338 * @note The default is @p TRUE.
339 */
340#if !defined(CH_CFG_USE_MEMCORE)
341#define CH_CFG_USE_MEMCORE TRUE
342#endif
343
344/**
345 * @brief Managed RAM size.
346 * @details Size of the RAM area to be managed by the OS. If set to zero
347 * then the whole available RAM is used. The core memory is made
348 * available to the heap allocator and/or can be used directly through
349 * the simplified core memory allocator.
350 *
351 * @note In order to let the OS manage the whole RAM the linker script must
352 * provide the @p __heap_base__ and @p __heap_end__ symbols.
353 * @note Requires @p CH_CFG_USE_MEMCORE.
354 */
355#if !defined(CH_CFG_MEMCORE_SIZE)
356#define CH_CFG_MEMCORE_SIZE 0
357#endif
358
359/**
360 * @brief Heap Allocator APIs.
361 * @details If enabled then the memory heap allocator APIs are included
362 * in the kernel.
363 *
364 * @note The default is @p TRUE.
365 * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
366 * @p CH_CFG_USE_SEMAPHORES.
367 * @note Mutexes are recommended.
368 */
369#if !defined(CH_CFG_USE_HEAP)
370#define CH_CFG_USE_HEAP TRUE
371#endif
372
373/**
374 * @brief Memory Pools Allocator APIs.
375 * @details If enabled then the memory pools allocator APIs are included
376 * in the kernel.
377 *
378 * @note The default is @p TRUE.
379 */
380#if !defined(CH_CFG_USE_MEMPOOLS)
381#define CH_CFG_USE_MEMPOOLS TRUE
382#endif
383
384/**
385 * @brief Objects FIFOs APIs.
386 * @details If enabled then the objects FIFOs APIs are included
387 * in the kernel.
388 *
389 * @note The default is @p TRUE.
390 */
391#if !defined(CH_CFG_USE_OBJ_FIFOS)
392#define CH_CFG_USE_OBJ_FIFOS TRUE
393#endif
394
395/**
396 * @brief Pipes APIs.
397 * @details If enabled then the pipes APIs are included
398 * in the kernel.
399 *
400 * @note The default is @p TRUE.
401 */
402#if !defined(CH_CFG_USE_PIPES)
403#define CH_CFG_USE_PIPES TRUE
404#endif
405
406/**
407 * @brief Objects Caches APIs.
408 * @details If enabled then the objects caches APIs are included
409 * in the kernel.
410 *
411 * @note The default is @p TRUE.
412 */
413#if !defined(CH_CFG_USE_OBJ_CACHES)
414#define CH_CFG_USE_OBJ_CACHES TRUE
415#endif
416
417/**
418 * @brief Delegate threads APIs.
419 * @details If enabled then the delegate threads APIs are included
420 * in the kernel.
421 *
422 * @note The default is @p TRUE.
423 */
424#if !defined(CH_CFG_USE_DELEGATES)
425#define CH_CFG_USE_DELEGATES TRUE
426#endif
427
428/**
429 * @brief Jobs Queues APIs.
430 * @details If enabled then the jobs queues APIs are included
431 * in the kernel.
432 *
433 * @note The default is @p TRUE.
434 */
435#if !defined(CH_CFG_USE_JOBS)
436#define CH_CFG_USE_JOBS TRUE
437#endif
438
439/** @} */
440
441/*===========================================================================*/
442/**
443 * @name Objects factory options
444 * @{
445 */
446/*===========================================================================*/
447
448/**
449 * @brief Objects Factory APIs.
450 * @details If enabled then the objects factory APIs are included in the
451 * kernel.
452 *
453 * @note The default is @p FALSE.
454 */
455#if !defined(CH_CFG_USE_FACTORY)
456#define CH_CFG_USE_FACTORY TRUE
457#endif
458
459/**
460 * @brief Maximum length for object names.
461 * @details If the specified length is zero then the name is stored by
462 * pointer but this could have unintended side effects.
463 */
464#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH)
465#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
466#endif
467
468/**
469 * @brief Enables the registry of generic objects.
470 */
471#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY)
472#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
473#endif
474
475/**
476 * @brief Enables factory for generic buffers.
477 */
478#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS)
479#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
480#endif
481
482/**
483 * @brief Enables factory for semaphores.
484 */
485#if !defined(CH_CFG_FACTORY_SEMAPHORES)
486#define CH_CFG_FACTORY_SEMAPHORES TRUE
487#endif
488
489/**
490 * @brief Enables factory for mailboxes.
491 */
492#if !defined(CH_CFG_FACTORY_MAILBOXES)
493#define CH_CFG_FACTORY_MAILBOXES TRUE
494#endif
495
496/**
497 * @brief Enables factory for objects FIFOs.
498 */
499#if !defined(CH_CFG_FACTORY_OBJ_FIFOS)
500#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
501#endif
502
503/**
504 * @brief Enables factory for Pipes.
505 */
506#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
507#define CH_CFG_FACTORY_PIPES TRUE
508#endif
509
510/** @} */
511
512/*===========================================================================*/
513/**
514 * @name Debug options
515 * @{
516 */
517/*===========================================================================*/
518
519/**
520 * @brief Debug option, kernel statistics.
521 *
522 * @note The default is @p FALSE.
523 */
524#if !defined(CH_DBG_STATISTICS)
525#define CH_DBG_STATISTICS FALSE
526#endif
527
528/**
529 * @brief Debug option, system state check.
530 * @details If enabled the correct call protocol for system APIs is checked
531 * at runtime.
532 *
533 * @note The default is @p FALSE.
534 */
535#if !defined(CH_DBG_SYSTEM_STATE_CHECK)
536#define CH_DBG_SYSTEM_STATE_CHECK FALSE
537#endif
538
539/**
540 * @brief Debug option, parameters checks.
541 * @details If enabled then the checks on the API functions input
542 * parameters are activated.
543 *
544 * @note The default is @p FALSE.
545 */
546#if !defined(CH_DBG_ENABLE_CHECKS)
547#define CH_DBG_ENABLE_CHECKS FALSE
548#endif
549
550/**
551 * @brief Debug option, consistency checks.
552 * @details If enabled then all the assertions in the kernel code are
553 * activated. This includes consistency checks inside the kernel,
554 * runtime anomalies and port-defined checks.
555 *
556 * @note The default is @p FALSE.
557 */
558#if !defined(CH_DBG_ENABLE_ASSERTS)
559#define CH_DBG_ENABLE_ASSERTS FALSE
560#endif
561
562/**
563 * @brief Debug option, trace buffer.
564 * @details If enabled then the trace buffer is activated.
565 *
566 * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
567 */
568#if !defined(CH_DBG_TRACE_MASK)
569#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
570#endif
571
572/**
573 * @brief Trace buffer entries.
574 * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
575 * different from @p CH_DBG_TRACE_MASK_DISABLED.
576 */
577#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
578#define CH_DBG_TRACE_BUFFER_SIZE 128
579#endif
580
581/**
582 * @brief Debug option, stack checks.
583 * @details If enabled then a runtime stack check is performed.
584 *
585 * @note The default is @p FALSE.
586 * @note The stack check is performed in a architecture/port dependent way.
587 * It may not be implemented or some ports.
588 * @note The default failure mode is to halt the system with the global
589 * @p panic_msg variable set to @p NULL.
590 */
591#if !defined(CH_DBG_ENABLE_STACK_CHECK)
592#define CH_DBG_ENABLE_STACK_CHECK FALSE
593#endif
594
595/**
596 * @brief Debug option, stacks initialization.
597 * @details If enabled then the threads working area is filled with a byte
598 * value when a thread is created. This can be useful for the
599 * runtime measurement of the used stack.
600 *
601 * @note The default is @p FALSE.
602 */
603#if !defined(CH_DBG_FILL_THREADS)
604#define CH_DBG_FILL_THREADS FALSE
605#endif
606
607/**
608 * @brief Debug option, threads profiling.
609 * @details If enabled then a field is added to the @p thread_t structure that
610 * counts the system ticks occurred while executing the thread.
611 *
612 * @note The default is @p FALSE.
613 * @note This debug option is not currently compatible with the
614 * tickless mode.
615 */
616#if !defined(CH_DBG_THREADS_PROFILING)
617#define CH_DBG_THREADS_PROFILING FALSE
618#endif
619
620/** @} */
621
622/*===========================================================================*/
623/**
624 * @name Kernel hooks
625 * @{
626 */
627/*===========================================================================*/
628
629/**
630 * @brief System structure extension.
631 * @details User fields added to the end of the @p ch_system_t structure.
632 */
633#define CH_CFG_SYSTEM_EXTRA_FIELDS \
634 /* Add threads custom fields here.*/
635
636/**
637 * @brief System initialization hook.
638 * @details User initialization code added to the @p chSysInit() function
639 * just before interrupts are enabled globally.
640 */
641#define CH_CFG_SYSTEM_INIT_HOOK() { \
642 /* Add threads initialization code here.*/ \
643}
644
645/**
646 * @brief Threads descriptor structure extension.
647 * @details User fields added to the end of the @p thread_t structure.
648 */
649#define CH_CFG_THREAD_EXTRA_FIELDS \
650 /* Add threads custom fields here.*/
651
652/**
653 * @brief Threads initialization hook.
654 * @details User initialization code added to the @p _thread_init() function.
655 *
656 * @note It is invoked from within @p _thread_init() and implicitly from all
657 * the threads creation APIs.
658 */
659#define CH_CFG_THREAD_INIT_HOOK(tp) { \
660 /* Add threads initialization code here.*/ \
661}
662
663/**
664 * @brief Threads finalization hook.
665 * @details User finalization code added to the @p chThdExit() API.
666 */
667#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
668 /* Add threads finalization code here.*/ \
669}
670
671/**
672 * @brief Context switch hook.
673 * @details This hook is invoked just before switching between threads.
674 */
675#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
676 /* Context switch code here.*/ \
677}
678
679/**
680 * @brief ISR enter hook.
681 */
682#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
683 /* IRQ prologue code here.*/ \
684}
685
686/**
687 * @brief ISR exit hook.
688 */
689#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
690 /* IRQ epilogue code here.*/ \
691}
692
693/**
694 * @brief Idle thread enter hook.
695 * @note This hook is invoked within a critical zone, no OS functions
696 * should be invoked from here.
697 * @note This macro can be used to activate a power saving mode.
698 */
699#define CH_CFG_IDLE_ENTER_HOOK() { \
700 /* Idle-enter code here.*/ \
701}
702
703/**
704 * @brief Idle thread leave hook.
705 * @note This hook is invoked within a critical zone, no OS functions
706 * should be invoked from here.
707 * @note This macro can be used to deactivate a power saving mode.
708 */
709#define CH_CFG_IDLE_LEAVE_HOOK() { \
710 /* Idle-leave code here.*/ \
711}
712
713/**
714 * @brief Idle Loop hook.
715 * @details This hook is continuously invoked by the idle thread loop.
716 */
717#define CH_CFG_IDLE_LOOP_HOOK() { \
718 /* Idle loop code here.*/ \
719}
720
721/**
722 * @brief System tick event hook.
723 * @details This hook is invoked in the system tick handler immediately
724 * after processing the virtual timers queue.
725 */
726#define CH_CFG_SYSTEM_TICK_HOOK() { \
727 /* System tick event code here.*/ \
728}
729
730/**
731 * @brief System halt hook.
732 * @details This hook is invoked in case to a system halting error before
733 * the system is halted.
734 */
735#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
736 /* System halt code here.*/ \
737}
738
739/**
740 * @brief Trace hook.
741 * @details This hook is invoked each time a new record is written in the
742 * trace buffer.
743 */
744#define CH_CFG_TRACE_HOOK(tep) { \
745 /* Trace code here.*/ \
746}
747
748
749/** @} */
750
751/*===========================================================================*/
752/* Port-specific settings (override port settings defaulted in chcore.h). */
753/*===========================================================================*/
754
755#endif /* CHCONF_H */
756
757/** @} */
diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/debug/TM4C123x-ADC (OpenOCD, Flash and Run).launch b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/debug/TM4C123x-ADC (OpenOCD, Flash and Run).launch
new file mode 100644
index 000000000..c3a5d9f6d
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/debug/TM4C123x-ADC (OpenOCD, Flash and Run).launch
@@ -0,0 +1,52 @@
1<?xml version="1.0" encoding="UTF-8" standalone="no"?>
2<launchConfiguration type="org.eclipse.cdt.debug.gdbjtag.launchConfigurationType">
3<stringAttribute key="bad_container_name" value="\TM4C123x-ADC\debug"/>
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11<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="Generic TCP/IP"/>
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13<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
14<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
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29<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard"/>
30<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
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32<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="arm-none-eabi-gdb"/>
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34<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
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37<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>
38<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>
39<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>
40<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="TM4C123x-ADC"/>
41<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
42<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="0.114656749"/>
43<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
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45</listAttribute>
46<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
47<listEntry value="4"/>
48</listAttribute>
49<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
50<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
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diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/halconf.h b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/halconf.h
new file mode 100644
index 000000000..385f89c0e
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/halconf.h
@@ -0,0 +1,531 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file templates/halconf.h
19 * @brief HAL configuration header.
20 * @details HAL configuration file, this file allows to enable or disable the
21 * various device drivers from your application. You may also use
22 * this file in order to override the device drivers default settings.
23 *
24 * @addtogroup HAL_CONF
25 * @{
26 */
27
28#ifndef HALCONF_H
29#define HALCONF_H
30
31#define _CHIBIOS_HAL_CONF_
32#define _CHIBIOS_HAL_CONF_VER_7_1_
33
34#include "mcuconf.h"
35
36/**
37 * @brief Enables the PAL subsystem.
38 */
39#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
40#define HAL_USE_PAL TRUE
41#endif
42
43/**
44 * @brief Enables the ADC subsystem.
45 */
46#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
47#define HAL_USE_ADC TRUE
48#endif
49
50/**
51 * @brief Enables the CAN subsystem.
52 */
53#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
54#define HAL_USE_CAN FALSE
55#endif
56
57/**
58 * @brief Enables the cryptographic subsystem.
59 */
60#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
61#define HAL_USE_CRY FALSE
62#endif
63
64/**
65 * @brief Enables the DAC subsystem.
66 */
67#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
68#define HAL_USE_DAC FALSE
69#endif
70
71/**
72 * @brief Enables the EFlash subsystem.
73 */
74#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__)
75#define HAL_USE_EFL FALSE
76#endif
77
78/**
79 * @brief Enables the GPT subsystem.
80 */
81#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
82#define HAL_USE_GPT FALSE
83#endif
84
85/**
86 * @brief Enables the I2C subsystem.
87 */
88#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
89#define HAL_USE_I2C FALSE
90#endif
91
92/**
93 * @brief Enables the I2S subsystem.
94 */
95#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
96#define HAL_USE_I2S FALSE
97#endif
98
99/**
100 * @brief Enables the ICU subsystem.
101 */
102#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
103#define HAL_USE_ICU FALSE
104#endif
105
106/**
107 * @brief Enables the MAC subsystem.
108 */
109#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
110#define HAL_USE_MAC FALSE
111#endif
112
113/**
114 * @brief Enables the MMC_SPI subsystem.
115 */
116#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
117#define HAL_USE_MMC_SPI FALSE
118#endif
119
120/**
121 * @brief Enables the PWM subsystem.
122 */
123#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
124#define HAL_USE_PWM FALSE
125#endif
126
127/**
128 * @brief Enables the RTC subsystem.
129 */
130#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
131#define HAL_USE_RTC FALSE
132#endif
133
134/**
135 * @brief Enables the SDC subsystem.
136 */
137#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
138#define HAL_USE_SDC FALSE
139#endif
140
141/**
142 * @brief Enables the SERIAL subsystem.
143 */
144#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
145#define HAL_USE_SERIAL TRUE
146#endif
147
148/**
149 * @brief Enables the SERIAL over USB subsystem.
150 */
151#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
152#define HAL_USE_SERIAL_USB FALSE
153#endif
154
155/**
156 * @brief Enables the SIO subsystem.
157 */
158#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
159#define HAL_USE_SIO FALSE
160#endif
161
162/**
163 * @brief Enables the SPI subsystem.
164 */
165#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
166#define HAL_USE_SPI FALSE
167#endif
168
169/**
170 * @brief Enables the TRNG subsystem.
171 */
172#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
173#define HAL_USE_TRNG FALSE
174#endif
175
176/**
177 * @brief Enables the UART subsystem.
178 */
179#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
180#define HAL_USE_UART FALSE
181#endif
182
183/**
184 * @brief Enables the USB subsystem.
185 */
186#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
187#define HAL_USE_USB FALSE
188#endif
189
190/**
191 * @brief Enables the WDG subsystem.
192 */
193#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
194#define HAL_USE_WDG FALSE
195#endif
196
197/**
198 * @brief Enables the WSPI subsystem.
199 */
200#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
201#define HAL_USE_WSPI FALSE
202#endif
203
204/*===========================================================================*/
205/* PAL driver related settings. */
206/*===========================================================================*/
207
208/**
209 * @brief Enables synchronous APIs.
210 * @note Disabling this option saves both code and data space.
211 */
212#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
213#define PAL_USE_CALLBACKS FALSE
214#endif
215
216/**
217 * @brief Enables synchronous APIs.
218 * @note Disabling this option saves both code and data space.
219 */
220#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
221#define PAL_USE_WAIT FALSE
222#endif
223
224/*===========================================================================*/
225/* ADC driver related settings. */
226/*===========================================================================*/
227
228/**
229 * @brief Enables synchronous APIs.
230 * @note Disabling this option saves both code and data space.
231 */
232#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
233#define ADC_USE_WAIT TRUE
234#endif
235
236/**
237 * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
238 * @note Disabling this option saves both code and data space.
239 */
240#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
241#define ADC_USE_MUTUAL_EXCLUSION TRUE
242#endif
243
244/*===========================================================================*/
245/* CAN driver related settings. */
246/*===========================================================================*/
247
248/**
249 * @brief Sleep mode related APIs inclusion switch.
250 */
251#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
252#define CAN_USE_SLEEP_MODE TRUE
253#endif
254
255/**
256 * @brief Enforces the driver to use direct callbacks rather than OSAL events.
257 */
258#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
259#define CAN_ENFORCE_USE_CALLBACKS FALSE
260#endif
261
262/*===========================================================================*/
263/* CRY driver related settings. */
264/*===========================================================================*/
265
266/**
267 * @brief Enables the SW fall-back of the cryptographic driver.
268 * @details When enabled, this option, activates a fall-back software
269 * implementation for algorithms not supported by the underlying
270 * hardware.
271 * @note Fall-back implementations may not be present for all algorithms.
272 */
273#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
274#define HAL_CRY_USE_FALLBACK FALSE
275#endif
276
277/**
278 * @brief Makes the driver forcibly use the fall-back implementations.
279 */
280#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
281#define HAL_CRY_ENFORCE_FALLBACK FALSE
282#endif
283
284/*===========================================================================*/
285/* DAC driver related settings. */
286/*===========================================================================*/
287
288/**
289 * @brief Enables synchronous APIs.
290 * @note Disabling this option saves both code and data space.
291 */
292#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
293#define DAC_USE_WAIT TRUE
294#endif
295
296/**
297 * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
298 * @note Disabling this option saves both code and data space.
299 */
300#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
301#define DAC_USE_MUTUAL_EXCLUSION TRUE
302#endif
303
304/*===========================================================================*/
305/* I2C driver related settings. */
306/*===========================================================================*/
307
308/**
309 * @brief Enables the mutual exclusion APIs on the I2C bus.
310 */
311#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
312#define I2C_USE_MUTUAL_EXCLUSION TRUE
313#endif
314
315/*===========================================================================*/
316/* MAC driver related settings. */
317/*===========================================================================*/
318
319/**
320 * @brief Enables the zero-copy API.
321 */
322#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
323#define MAC_USE_ZERO_COPY FALSE
324#endif
325
326/**
327 * @brief Enables an event sources for incoming packets.
328 */
329#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
330#define MAC_USE_EVENTS TRUE
331#endif
332
333/*===========================================================================*/
334/* MMC_SPI driver related settings. */
335/*===========================================================================*/
336
337/**
338 * @brief Delays insertions.
339 * @details If enabled this options inserts delays into the MMC waiting
340 * routines releasing some extra CPU time for the threads with
341 * lower priority, this may slow down the driver a bit however.
342 * This option is recommended also if the SPI driver does not
343 * use a DMA channel and heavily loads the CPU.
344 */
345#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
346#define MMC_NICE_WAITING TRUE
347#endif
348
349/*===========================================================================*/
350/* SDC driver related settings. */
351/*===========================================================================*/
352
353/**
354 * @brief Number of initialization attempts before rejecting the card.
355 * @note Attempts are performed at 10mS intervals.
356 */
357#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
358#define SDC_INIT_RETRY 100
359#endif
360
361/**
362 * @brief Include support for MMC cards.
363 * @note MMC support is not yet implemented so this option must be kept
364 * at @p FALSE.
365 */
366#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
367#define SDC_MMC_SUPPORT FALSE
368#endif
369
370/**
371 * @brief Delays insertions.
372 * @details If enabled this options inserts delays into the MMC waiting
373 * routines releasing some extra CPU time for the threads with
374 * lower priority, this may slow down the driver a bit however.
375 */
376#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
377#define SDC_NICE_WAITING TRUE
378#endif
379
380/**
381 * @brief OCR initialization constant for V20 cards.
382 */
383#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
384#define SDC_INIT_OCR_V20 0x50FF8000U
385#endif
386
387/**
388 * @brief OCR initialization constant for non-V20 cards.
389 */
390#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
391#define SDC_INIT_OCR 0x80100000U
392#endif
393
394/*===========================================================================*/
395/* SERIAL driver related settings. */
396/*===========================================================================*/
397
398/**
399 * @brief Default bit rate.
400 * @details Configuration parameter, this is the baud rate selected for the
401 * default configuration.
402 */
403#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
404#define SERIAL_DEFAULT_BITRATE 38400
405#endif
406
407/**
408 * @brief Serial buffers size.
409 * @details Configuration parameter, you can change the depth of the queue
410 * buffers depending on the requirements of your application.
411 * @note The default is 16 bytes for both the transmission and receive
412 * buffers.
413 */
414#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
415#define SERIAL_BUFFERS_SIZE 16
416#endif
417
418/*===========================================================================*/
419/* SERIAL_USB driver related setting. */
420/*===========================================================================*/
421
422/**
423 * @brief Serial over USB buffers size.
424 * @details Configuration parameter, the buffer size must be a multiple of
425 * the USB data endpoint maximum packet size.
426 * @note The default is 256 bytes for both the transmission and receive
427 * buffers.
428 */
429#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
430#define SERIAL_USB_BUFFERS_SIZE 256
431#endif
432
433/**
434 * @brief Serial over USB number of buffers.
435 * @note The default is 2 buffers.
436 */
437#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
438#define SERIAL_USB_BUFFERS_NUMBER 2
439#endif
440
441/*===========================================================================*/
442/* SPI driver related settings. */
443/*===========================================================================*/
444
445/**
446 * @brief Enables synchronous APIs.
447 * @note Disabling this option saves both code and data space.
448 */
449#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
450#define SPI_USE_WAIT TRUE
451#endif
452
453/**
454 * @brief Enables circular transfers APIs.
455 * @note Disabling this option saves both code and data space.
456 */
457#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
458#define SPI_USE_CIRCULAR FALSE
459#endif
460
461/**
462 * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
463 * @note Disabling this option saves both code and data space.
464 */
465#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
466#define SPI_USE_MUTUAL_EXCLUSION TRUE
467#endif
468
469/**
470 * @brief Handling method for SPI CS line.
471 * @note Disabling this option saves both code and data space.
472 */
473#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
474#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD
475#endif
476
477/*===========================================================================*/
478/* UART driver related settings. */
479/*===========================================================================*/
480
481/**
482 * @brief Enables synchronous APIs.
483 * @note Disabling this option saves both code and data space.
484 */
485#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
486#define UART_USE_WAIT FALSE
487#endif
488
489/**
490 * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
491 * @note Disabling this option saves both code and data space.
492 */
493#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
494#define UART_USE_MUTUAL_EXCLUSION FALSE
495#endif
496
497/*===========================================================================*/
498/* USB driver related settings. */
499/*===========================================================================*/
500
501/**
502 * @brief Enables synchronous APIs.
503 * @note Disabling this option saves both code and data space.
504 */
505#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
506#define USB_USE_WAIT FALSE
507#endif
508
509/*===========================================================================*/
510/* WSPI driver related settings. */
511/*===========================================================================*/
512
513/**
514 * @brief Enables synchronous APIs.
515 * @note Disabling this option saves both code and data space.
516 */
517#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
518#define WSPI_USE_WAIT TRUE
519#endif
520
521/**
522 * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
523 * @note Disabling this option saves both code and data space.
524 */
525#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
526#define WSPI_USE_MUTUAL_EXCLUSION TRUE
527#endif
528
529#endif /* HALCONF_H */
530
531/** @} */
diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/main.c b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/main.c
new file mode 100644
index 000000000..cbb73628d
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/main.c
@@ -0,0 +1,165 @@
1/*
2 Copyright (C) 2014..2016 Marco Veeneman
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "ch.h"
18#include "hal.h"
19#include "chprintf.h"
20
21#define ADC_GRP1_NUM_CHANNELS 2
22#define ADC_GRP1_BUF_DEPTH 8
23
24#define ADC_GRP2_NUM_CHANNELS 8
25#define ADC_GRP2_BUF_DEPTH 16
26
27static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
28static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];
29
30/*
31 * ADC streaming callback.
32 */
33size_t nx = 0, ny = 0;
34uint32_t temp = 0;
35static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
36
37 (void)adcp;
38 if (samples2 == buffer) {
39 nx += n;
40
41 uint8_t i, j;
42 adcsample_t avg = 0;
43
44 for (j = 0; j < n; j++) {
45 for (i = 0; i < ADC_GRP2_NUM_CHANNELS; i++) {
46 avg += *buffer++;
47 }
48 }
49
50 avg /= (n * ADC_GRP2_NUM_CHANNELS);
51
52 temp = (uint32_t)(147.5f - ((75.0f * 3.3f * (float)avg)) / 4096.0f);
53 }
54 else {
55 ny += n;
56
57 uint8_t i, j;
58 adcsample_t avg = 0;
59
60 for (j = 0; j < n; j++) {
61 for (i = 0; i < ADC_GRP2_NUM_CHANNELS; i++) {
62 avg += *buffer++;
63 }
64 }
65
66 avg /= (n * ADC_GRP2_NUM_CHANNELS);
67
68 temp = (uint32_t)(147.5f - ((75.0f * 3.3f * (float)avg)) / 4096.0f);
69 }
70}
71
72static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
73
74 (void)adcp;
75 (void)err;
76}
77
78/*
79 * ADC conversion group.
80 * Mode: Linear buffer, 8 samples of 2 channels, Always triggered.
81 * Channels: TS, TS.
82 */
83static const ADCConversionGroup adcgrpcfg1 = {
84 FALSE,
85 ADC_GRP1_NUM_CHANNELS,
86 NULL,
87 adcerrorcallback,
88 0xF, /* EMUX */ /* Always trigger */
89 0, /* SSMUX */
90 (1 << 7) | (1 << 5) |
91 (1 << 3) /* SSCTL */ /* 2 times TS, 2nd has end bit set */
92};
93
94/*
95 * ADC conversion group.
96 * Mode: Continuous, 16 samples of 8 channels, Always triggered.
97 * Channels: TS, TS, TS, TS, TS, TS, TS, TS.
98 */
99static const ADCConversionGroup adcgrpcfg2 = {
100 TRUE,
101 ADC_GRP2_NUM_CHANNELS,
102 adccallback,
103 adcerrorcallback,
104 0xF, /* EMUX */ /* Always trigger */
105 0, /* SSMUX */
106 (1 << 31) | (1 << 29) |
107 (1 << 27) |
108 (1 << 23) |
109 (1 << 19) |
110 (1 << 15) |
111 (1 << 11) |
112 (1 << 7) |
113 (1 << 3) /* SSCTL */ /* 8 times TS, 8th has end bit set */
114};
115
116/*
117 * Application entry point.
118 */
119int main(void)
120{
121 /*
122 * System initializations.
123 * - HAL initialization, this also initializes the configured device drivers
124 * and performs the board-specific initializations.
125 * - Kernel initialization, the main() function becomes a thread and the
126 * RTOS is active.
127 */
128 halInit();
129 chSysInit();
130
131 /* Configure RX and TX pins for UART0.*/
132 palSetLineMode(LINE_UART0_RX, PAL_MODE_INPUT | PAL_MODE_ALTERNATE(1));
133 palSetLineMode(LINE_UART0_TX, PAL_MODE_INPUT | PAL_MODE_ALTERNATE(1));
134
135 sdStart(&SD1, NULL);
136
137 chprintf((BaseSequentialStream *)&SD1, "Starting ADC0...");
138 chThdSleepMilliseconds(500);
139
140 /*
141 * Activates the ADC0 driver.
142 */
143 adcStart(&ADCD1, NULL);
144
145 /*
146 * Linear conversion.
147 */
148 adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
149
150 /*
151 * Starts an ADC continuous conversion.
152 */
153 adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH);
154
155 /*
156 * Normal main() thread activity
157 */
158 while (TRUE) {
159 chThdSleepMilliseconds(500);
160
161 chprintf((BaseSequentialStream *)&SD1, "A:%d\tB:%d\ttmp:%d\r\n", nx, ny, temp);
162 }
163
164 return 0;
165}
diff --git a/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/mcuconf.h b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/mcuconf.h
new file mode 100644
index 000000000..037c1d36e
--- /dev/null
+++ b/lib/chibios-contrib/testhal/TIVA/TM4C123x/ADC/mcuconf.h
@@ -0,0 +1,180 @@
1/*
2 Copyright (C) 2014..2016 Marco Veeneman
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * TM4C123x drivers configuration.
19 * The following settings override the default settings present in
20 * the various device driver implementation headers.
21 * Note that the settings for each driver only have effect if the whole
22 * driver is enabled in halconf.h.
23 *
24 * IRQ priorities:
25 * 7...0 Lowest...Highest.
26 */
27
28#define TM4C123x_MCUCONF
29
30/*
31 * HAL driver system settings.
32 */
33#define TIVA_OSCSRC SYSCTL_RCC2_OSCSRC2_MO
34#define TIVA_MOSC_ENABLE TRUE
35#define TIVA_DIV400_VALUE 1
36#define TIVA_SYSDIV_VALUE 2
37#define TIVA_USESYSDIV_ENABLE FALSE
38#define TIVA_SYSDIV2LSB_ENABLE FALSE
39#define TIVA_BYPASS_VALUE 0
40#define TIVA_PWM_FIELDS (SYSCTL_RCC_USEPWMDIV | \
41 SYSCTL_RCC_PWMDIV_8)
42
43/*
44 * ADC driver system settings.
45 */
46#define TIVA_ADC_USE_ADC0 TRUE
47#define TIVA_ADC_USE_ADC1 TRUE
48#define TIVA_ADC_ADC0_SS0_UDMA_CHANNEL 14
49#define TIVA_ADC_ADC1_SS0_UDMA_CHANNEL 24
50#define TIVA_ADC_ADC0_SS0_UDMA_MAPPING 0
51#define TIVA_ADC_ADC1_SS0_UDMA_MAPPING 1
52#define TIVA_ADC0_SEQ0_PRIORITY 4
53#define TIVA_ADC1_SEQ0_PRIORITY 4
54
55/*
56 * PAL driver system settings.
57 */
58#define TIVA_PAL_GPIOA_IRQ_PRIORITY 3
59#define TIVA_PAL_GPIOB_IRQ_PRIORITY 3
60#define TIVA_PAL_GPIOC_IRQ_PRIORITY 3
61#define TIVA_PAL_GPIOD_IRQ_PRIORITY 3
62#define TIVA_PAL_GPIOE_IRQ_PRIORITY 3
63#define TIVA_PAL_GPIOF_IRQ_PRIORITY 3
64
65/*
66 * GPT driver system settings.
67 */
68#define TIVA_GPT_USE_GPT0 FALSE
69#define TIVA_GPT_USE_GPT1 FALSE
70#define TIVA_GPT_USE_GPT2 FALSE
71#define TIVA_GPT_USE_GPT3 FALSE
72#define TIVA_GPT_USE_GPT4 FALSE
73#define TIVA_GPT_USE_GPT5 FALSE
74#define TIVA_GPT_USE_WGPT0 FALSE
75#define TIVA_GPT_USE_WGPT1 FALSE
76#define TIVA_GPT_USE_WGPT2 FALSE
77#define TIVA_GPT_USE_WGPT3 FALSE
78#define TIVA_GPT_USE_WGPT4 FALSE
79#define TIVA_GPT_USE_WGPT5 FALSE
80
81#define TIVA_GPT_GPT0A_IRQ_PRIORITY 7
82#define TIVA_GPT_GPT1A_IRQ_PRIORITY 7
83#define TIVA_GPT_GPT2A_IRQ_PRIORITY 7
84#define TIVA_GPT_GPT3A_IRQ_PRIORITY 7
85#define TIVA_GPT_GPT4A_IRQ_PRIORITY 7
86#define TIVA_GPT_GPT5A_IRQ_PRIORITY 7
87#define TIVA_GPT_WGPT0A_IRQ_PRIORITY 7
88#define TIVA_GPT_WGPT1A_IRQ_PRIORITY 7
89#define TIVA_GPT_WGPT2A_IRQ_PRIORITY 7
90#define TIVA_GPT_WGPT3A_IRQ_PRIORITY 7
91#define TIVA_GPT_WGPT4A_IRQ_PRIORITY 7
92#define TIVA_GPT_WGPT5A_IRQ_PRIORITY 7
93
94/*
95 * I2C driver system settings.
96 */
97#define TIVA_I2C_USE_I2C0 FALSE
98#define TIVA_I2C_USE_I2C1 FALSE
99#define TIVA_I2C_USE_I2C2 FALSE
100#define TIVA_I2C_USE_I2C3 FALSE
101#define TIVA_I2C_USE_I2C4 FALSE
102#define TIVA_I2C_USE_I2C5 FALSE
103#define TIVA_I2C_USE_I2C6 FALSE
104#define TIVA_I2C_USE_I2C7 FALSE
105#define TIVA_I2C_I2C0_IRQ_PRIORITY 4
106#define TIVA_I2C_I2C1_IRQ_PRIORITY 4
107#define TIVA_I2C_I2C2_IRQ_PRIORITY 4
108#define TIVA_I2C_I2C3_IRQ_PRIORITY 4
109#define TIVA_I2C_I2C4_IRQ_PRIORITY 4
110#define TIVA_I2C_I2C5_IRQ_PRIORITY 4
111#define TIVA_I2C_I2C6_IRQ_PRIORITY 4
112#define TIVA_I2C_I2C7_IRQ_PRIORITY 4
113
114/*
115 * PWM driver system settings.
116 */
117#define TIVA_PWM_USE_PWM0 FALSE
118#define TIVA_PWM_USE_PWM1 FALSE
119#define TIVA_PWM_PWM0_FAULT_IRQ_PRIORITY 4
120#define TIVA_PWM_PWM0_0_IRQ_PRIORITY 4
121#define TIVA_PWM_PWM0_1_IRQ_PRIORITY 4
122#define TIVA_PWM_PWM0_2_IRQ_PRIORITY 4
123#define TIVA_PWM_PWM0_3_IRQ_PRIORITY 4
124#define TIVA_PWM_PWM1_FAULT_IRQ_PRIORITY 4
125#define TIVA_PWM_PWM1_0_IRQ_PRIORITY 4
126#define TIVA_PWM_PWM1_1_IRQ_PRIORITY 4
127#define TIVA_PWM_PWM1_2_IRQ_PRIORITY 4
128#define TIVA_PWM_PWM1_3_IRQ_PRIORITY 4
129
130/*
131 * SERIAL driver system settings.
132 */
133#define TIVA_SERIAL_USE_UART0 TRUE
134#define TIVA_SERIAL_USE_UART1 FALSE
135#define TIVA_SERIAL_USE_UART2 FALSE
136#define TIVA_SERIAL_USE_UART3 FALSE
137#define TIVA_SERIAL_USE_UART4 FALSE
138#define TIVA_SERIAL_USE_UART5 FALSE
139#define TIVA_SERIAL_USE_UART6 FALSE
140#define TIVA_SERIAL_USE_UART7 FALSE
141#define TIVA_SERIAL_UART0_PRIORITY 5
142#define TIVA_SERIAL_UART1_PRIORITY 5
143#define TIVA_SERIAL_UART2_PRIORITY 5
144#define TIVA_SERIAL_UART3_PRIORITY 5
145#define TIVA_SERIAL_UART4_PRIORITY 5
146#define TIVA_SERIAL_UART5_PRIORITY 5
147#define TIVA_SERIAL_UART6_PRIORITY 5
148#define TIVA_SERIAL_UART7_PRIORITY 5
149
150/*
151 * SPI driver system settings.
152 */
153#define TIVA_SPI_USE_SSI0 TRUE
154#define TIVA_SPI_USE_SSI1 FALSE
155#define TIVA_SPI_USE_SSI2 FALSE
156#define TIVA_SPI_USE_SSI3 FALSE
157#define TIVA_SPI_SSI0_RX_UDMA_CHANNEL 10
158#define TIVA_SPI_SSI1_RX_UDMA_CHANNEL 24
159#define TIVA_SPI_SSI2_RX_UDMA_CHANNEL 12
160#define TIVA_SPI_SSI3_RX_UDMA_CHANNEL 14
161#define TIVA_SPI_SSI0_TX_UDMA_CHANNEL 11
162#define TIVA_SPI_SSI1_TX_UDMA_CHANNEL 25
163#define TIVA_SPI_SSI2_TX_UDMA_CHANNEL 13
164#define TIVA_SPI_SSI3_TX_UDMA_CHANNEL 15
165#define TIVA_SPI_SSI0_RX_UDMA_MAPPING 0
166#define TIVA_SPI_SSI1_RX_UDMA_MAPPING 0
167#define TIVA_SPI_SSI2_RX_UDMA_MAPPING 2
168#define TIVA_SPI_SSI3_RX_UDMA_MAPPING 2
169#define TIVA_SPI_SSI0_TX_UDMA_MAPPING 0
170#define TIVA_SPI_SSI1_TX_UDMA_MAPPING 0
171#define TIVA_SPI_SSI2_TX_UDMA_MAPPING 2
172#define TIVA_SPI_SSI3_TX_UDMA_MAPPING 2
173
174/*
175 * ST driver system settings.
176 */
177#define TIVA_ST_IRQ_PRIORITY 2
178#define TIVA_ST_USE_WIDE_TIMER TRUE
179#define TIVA_ST_TIMER_NUMBER 5
180#define TIVA_ST_TIMER_LETTER A
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 22:34:09 +0100