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1/*
2 ChibiOS - Copyright (C) 2006,2007,2008,2009,2010,2011,2012,2013,2014,
3 2015,2016,2017,2018,2019,2020,2021 Giovanni Di Sirio.
4
5 This file is part of ChibiOS.
6
7 ChibiOS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation version 3 of the License.
10
11 ChibiOS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>.
18*/
19
20/**
21 * @file GCC/ivor.S
22 * @brief Kernel ISRs.
23 *
24 * @addtogroup PPC_CORE
25 * @{
26 */
27
28#if !defined(FALSE) || defined(__DOXYGEN__)
29#define FALSE 0
30#endif
31
32#if !defined(TRUE) || defined(__DOXYGEN__)
33#define TRUE 1
34#endif
35
36/*
37 * Imports the PPC configuration headers.
38 */
39#define _FROM_ASM_
40#include "chlicense.h"
41#include "chconf.h"
42#include "chcore.h"
43
44#if defined(__HIGHTEC__)
45#define se_beq beq
46#endif
47
48#if !defined(__DOXYGEN__)
49
50 .section .handlers, "ax"
51
52#if PPC_SUPPORTS_DECREMENTER
53 /*
54 * _IVOR10 handler (Book-E decrementer).
55 */
56 .align 4
57 .globl _IVOR10
58 .type _IVOR10, @function
59_IVOR10:
60 /* Saving the external context (port_extctx structure).*/
61 e_stwu sp, -80(sp)
62#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
63 e_stmvsrrw 8(sp) /* Saves PC, MSR. */
64 e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
65 e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
66#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
67 se_stw r0, 32(sp) /* Saves GPR0. */
68 mfSRR0 r0
69 se_stw r0, 8(sp) /* Saves PC. */
70 mfSRR1 r0
71 se_stw r0, 12(sp) /* Saves MSR. */
72 mfCR r0
73 se_stw r0, 16(sp) /* Saves CR. */
74 mfLR r0
75 se_stw r0, 20(sp) /* Saves LR. */
76 mfCTR r0
77 se_stw r0, 24(sp) /* Saves CTR. */
78 mfXER r0
79 se_stw r0, 28(sp) /* Saves XER. */
80 se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
81 se_stw r4, 40(sp)
82 se_stw r5, 44(sp)
83 se_stw r6, 48(sp)
84 se_stw r7, 52(sp)
85 e_stw r8, 56(sp)
86 e_stw r9, 60(sp)
87 e_stw r10, 64(sp)
88 e_stw r11, 68(sp)
89 e_stw r12, 72(sp)
90#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
91
92 /* Increasing the SPGR0 register.*/
93 mfspr r0, 272
94 se_addi r0, 1
95 mtspr 272, r0
96
97 /* Reset DIE bit in TSR register.*/
98 e_lis r3, 0x0800 /* DIS bit mask. */
99 mtspr 336, r3 /* TSR register. */
100
101 /* Restoring pre-IRQ MSR register value.*/
102 mfSRR1 r0
103#if !PPC_USE_IRQ_PREEMPTION
104 /* No preemption, keeping EE disabled.*/
105 se_bclri r0, 16 /* EE = bit 16. */
106#endif
107 mtMSR r0
108
109#if CH_DBG_SYSTEM_STATE_CHECK
110 e_bl _dbg_check_enter_isr
111 e_bl _dbg_check_lock_from_isr
112#endif
113 /* System tick handler invocation.*/
114 e_bl chSysTimerHandlerI
115#if CH_DBG_SYSTEM_STATE_CHECK
116 e_bl _dbg_check_unlock_from_isr
117 e_bl _dbg_check_leave_isr
118#endif
119
120#if PPC_USE_IRQ_PREEMPTION
121 /* Prevents preemption again.*/
122 wrteei 0
123#endif
124
125 /* Jumps to the common IVOR epilogue code.*/
126 e_b _ivor_exit
127#endif /* PPC_SUPPORTS_DECREMENTER */
128
129 /*
130 * _IVOR4 handler (Book-E external interrupt).
131 */
132 .align 4
133 .globl _IVOR4
134 .type _IVOR4, @function
135_IVOR4:
136 /* Saving the external context (port_extctx structure).*/
137 e_stwu sp, -80(sp)
138#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
139 e_stmvsrrw 8(sp) /* Saves PC, MSR. */
140 e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
141 e_stmvgprw 32(sp) /* Saves GPR0, GPR3...GPR12. */
142#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
143 se_stw r0, 32(sp) /* Saves GPR0. */
144 mfSRR0 r0
145 se_stw r0, 8(sp) /* Saves PC. */
146 mfSRR1 r0
147 se_stw r0, 12(sp) /* Saves MSR. */
148 mfCR r0
149 se_stw r0, 16(sp) /* Saves CR. */
150 mfLR r0
151 se_stw r0, 20(sp) /* Saves LR. */
152 mfCTR r0
153 se_stw r0, 24(sp) /* Saves CTR. */
154 mfXER r0
155 se_stw r0, 28(sp) /* Saves XER. */
156 se_stw r3, 36(sp) /* Saves GPR3...GPR12. */
157 se_stw r4, 40(sp)
158 se_stw r5, 44(sp)
159 se_stw r6, 48(sp)
160 se_stw r7, 52(sp)
161 e_stw r8, 56(sp)
162 e_stw r9, 60(sp)
163 e_stw r10, 64(sp)
164 e_stw r11, 68(sp)
165 e_stw r12, 72(sp)
166#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
167
168 /* Increasing the SPGR0 register.*/
169 mfspr r0, 272
170 se_addi r0, 1
171 mtspr 272, r0
172
173 /* Software vector address from the INTC register.*/
174 e_lis r3, INTC_IACKR_ADDR@h
175 e_or2i r3, INTC_IACKR_ADDR@l /* IACKR register address. */
176 e_lwz r3, 0(r3) /* IACKR register value. */
177 e_lwz r3, 0(r3)
178 mtCTR r3 /* Software handler address. */
179
180 /* Restoring pre-IRQ MSR register value.*/
181 mfSRR1 r0
182#if !PPC_USE_IRQ_PREEMPTION
183 /* No preemption, keeping EE disabled.*/
184 se_bclri r0, 16 /* EE = bit 16. */
185#endif
186 mtMSR r0
187
188 /* Exectes the software handler.*/
189 se_bctrl
190
191#if PPC_USE_IRQ_PREEMPTION
192 /* Prevents preemption again.*/
193 wrteei 0
194#endif
195
196 /* Informs the INTC that the interrupt has been served.*/
197 mbar 0
198 e_lis r3, INTC_EOIR_ADDR@h
199 e_or2i r3, INTC_EOIR_ADDR@l
200 se_stw r3, 0(r3) /* Writing any value should do. */
201
202 /* Common IVOR epilogue code, context restore.*/
203 .globl _ivor_exit
204_ivor_exit:
205 /* Decreasing the SPGR0 register.*/
206 mfspr r0, 272
207 se_subi r0, 1
208 mtspr 272, r0
209
210#if CH_DBG_STATISTICS
211 e_bl _stats_start_measure_crit_thd
212#endif
213#if CH_DBG_SYSTEM_STATE_CHECK
214 e_bl _dbg_check_lock
215#endif
216 e_bl chSchIsPreemptionRequired
217 se_cmpi r3, 0
218 se_beq .noresch
219 e_bl chSchDoReschedule
220.noresch:
221#if CH_DBG_SYSTEM_STATE_CHECK
222 e_bl _dbg_check_unlock
223#endif
224#if CH_DBG_STATISTICS
225 e_bl _stats_stop_measure_crit_thd
226#endif
227
228 /* Restoring the external context.*/
229#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
230 e_lmvgprw 32(sp) /* Restores GPR0, GPR3...GPR12. */
231 e_lmvsprw 16(sp) /* Restores CR, LR, CTR, XER. */
232 e_lmvsrrw 8(sp) /* Restores PC, MSR. */
233#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
234 se_lwz r3, 36(sp) /* Restores GPR3...GPR12. */
235 se_lwz r4, 40(sp)
236 se_lwz r5, 44(sp)
237 se_lwz r6, 48(sp)
238 se_lwz r7, 52(sp)
239 e_lwz r8, 56(sp)
240 e_lwz r9, 60(sp)
241 e_lwz r10, 64(sp)
242 e_lwz r11, 68(sp)
243 e_lwz r12, 72(sp)
244 se_lwz r0, 8(sp)
245 mtSRR0 r0 /* Restores PC. */
246 se_lwz r0, 12(sp)
247 mtSRR1 r0 /* Restores MSR. */
248 se_lwz r0, 16(sp)
249 mtCR r0 /* Restores CR. */
250 se_lwz r0, 20(sp)
251 mtLR r0 /* Restores LR. */
252 se_lwz r0, 24(sp)
253 mtCTR r0 /* Restores CTR. */
254 se_lwz r0, 28(sp)
255 mtXER r0 /* Restores XER. */
256 se_lwz r0, 32(sp) /* Restores GPR0. */
257#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
258 e_addi sp, sp, 80 /* Back to the previous frame. */
259 se_rfi
260
261#endif /* !defined(__DOXYGEN__) */
262
263/** @} */
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