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Diffstat (limited to 'lib/chibios/os/hal/boards/GOLDBULL_STM32_F107VC/board.h')
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diff --git a/lib/chibios/os/hal/boards/GOLDBULL_STM32_F107VC/board.h b/lib/chibios/os/hal/boards/GOLDBULL_STM32_F107VC/board.h new file mode 100644 index 000000000..8c106e810 --- /dev/null +++ b/lib/chibios/os/hal/boards/GOLDBULL_STM32_F107VC/board.h | |||
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1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Setup for the GoldBull STM32F107 V3 evaluation board. | ||
22 | */ | ||
23 | |||
24 | /* | ||
25 | * Board identifier. | ||
26 | */ | ||
27 | #define BOARD_GOLDBULL_STM32F107VC | ||
28 | #define BOARD_NAME "GoldBull STM32F107VC V3" | ||
29 | |||
30 | /* | ||
31 | * Board frequencies. | ||
32 | */ | ||
33 | #define STM32_LSECLK 32768 | ||
34 | #define STM32_HSECLK 25000000 | ||
35 | |||
36 | /* | ||
37 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
38 | */ | ||
39 | #define STM32F107xC | ||
40 | |||
41 | /* | ||
42 | * Ethernet PHY type. | ||
43 | */ | ||
44 | #define BOARD_PHY_ID MII_DP83848I_ID | ||
45 | #define BOARD_PHY_RMII | ||
46 | |||
47 | /* | ||
48 | * IO pins assignments. | ||
49 | */ | ||
50 | #define GPIOA_SWITCH_WKUP 0 | ||
51 | #define GPIOB_SWITCH_USER 2 | ||
52 | #define GPIOC_SWITCH_TAMPER 13 | ||
53 | |||
54 | #define GPIOC_SPI3_SD_CS 3 | ||
55 | #define GPIOC_SPI3_SD_CD 2 | ||
56 | |||
57 | #define GPIOD_LED3 2 | ||
58 | #define GPIOD_LED4 3 | ||
59 | #define GPIOD_LED5 4 | ||
60 | #define GPIOD_LED6 7 | ||
61 | |||
62 | /* | ||
63 | * I/O ports initial setup, this configuration is established soon after reset | ||
64 | * in the initialization code. | ||
65 | * | ||
66 | * The digits have the following meaning: | ||
67 | * 0 - Analog input. | ||
68 | * 1 - Push Pull output 10MHz. | ||
69 | * 2 - Push Pull output 2MHz. | ||
70 | * 3 - Push Pull output 50MHz. | ||
71 | * 4 - Digital input. | ||
72 | * 5 - Open Drain output 10MHz. | ||
73 | * 6 - Open Drain output 2MHz. | ||
74 | * 7 - Open Drain output 50MHz. | ||
75 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
76 | * 9 - Alternate Push Pull output 10MHz. | ||
77 | * A - Alternate Push Pull output 2MHz. | ||
78 | * B - Alternate Push Pull output 50MHz. | ||
79 | * C - Reserved. | ||
80 | * D - Alternate Open Drain output 10MHz. | ||
81 | * E - Alternate Open Drain output 2MHz. | ||
82 | * F - Alternate Open Drain output 50MHz. | ||
83 | * Please refer to the STM32 Reference Manual for details. | ||
84 | */ | ||
85 | |||
86 | /* | ||
87 | * Port A setup. | ||
88 | * Everything input with pull-up except: | ||
89 | * PA0 - Normal input (WKUP BUTTON). | ||
90 | * PA1 - Normal input (ETH_RMII_REF_CLK). | ||
91 | * PA2 - Alternate output (ETH_RMII_MDIO). | ||
92 | * PA3 - Input with PU (TP_IRQ). | ||
93 | * PA4 - Push Pull output (TP_CS). | ||
94 | * PA5 - Alternate output (SPI1 SCK). | ||
95 | * PA6 - Input with PU (SPI1 MISO). | ||
96 | * PA7 - Alternate output (SPI1 MOSI). | ||
97 | * PA8 - Alternate output (MCO). | ||
98 | * PA9 - Normal input (OTG_VBUS). | ||
99 | * PA10 - Normal input (OTG_ID). | ||
100 | * PA11 - Normal input (OTG_DM). | ||
101 | * PA12 - Normal input (OTG_DP). | ||
102 | * PA13 - Normal input (TMS). | ||
103 | * PA14 - Normal input (TCK). | ||
104 | * PA15 - Normal input (TDI). | ||
105 | */ | ||
106 | #define VAL_GPIOACRL 0xB8B38B44 /* PA7...PA0 */ | ||
107 | #define VAL_GPIOACRH 0x4444444B /* PA15...PA8 */ | ||
108 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
109 | |||
110 | /* | ||
111 | * 0 - Analog input. | ||
112 | * 1 - Push Pull output 10MHz. | ||
113 | * 2 - Push Pull output 2MHz. | ||
114 | * 3 - Push Pull output 50MHz. | ||
115 | * 4 - Digital input. | ||
116 | * 5 - Open Drain output 10MHz. | ||
117 | * 6 - Open Drain output 2MHz. | ||
118 | * 7 - Open Drain output 50MHz. | ||
119 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
120 | * 9 - Alternate Push Pull output 10MHz. | ||
121 | * A - Alternate Push Pull output 2MHz. | ||
122 | * B - Alternate Push Pull output 50MHz. | ||
123 | * C - Reserved. | ||
124 | * D - Alternate Open Drain output 10MHz. | ||
125 | * E - Alternate Open Drain output 2MHz. | ||
126 | * F - Alternate Open Drain output 50MHz. | ||
127 | */ | ||
128 | |||
129 | /* | ||
130 | * Port B setup: | ||
131 | * PB0 - Input with PU (unconnected). | ||
132 | * PB1 - Input with PU (unconnected). | ||
133 | * PB2 - Normal input (BOOT1, KEY_USER). | ||
134 | * PB3 - Normal input (TDO). | ||
135 | * PB4 - Normal input (TRST). | ||
136 | * PB5 - Input with PU (CAN2 RX). | ||
137 | * PB6 - Alternate output (USART1 TX, remapped). | ||
138 | * PB7 - Input with PU (USART1 RX, remapped). | ||
139 | * PB8 - Alternate O.D. (I2C1 SCL, remapped). | ||
140 | * PB9 - Alternate O.D. (I2C1 SDA, remapped). | ||
141 | * PB10 - Input with PU (BL_CNT). | ||
142 | * PB11 - Alternate output (ETH_RMII_TX_EN). | ||
143 | * PB12 - Alternate output (ETH_RMII_TXD0). | ||
144 | * PB13 - Alternate output (ETH_RMII_TXD1). | ||
145 | * PB14 - Input with PU (unconnected). | ||
146 | * PB15 - Input with PU (unconnected). | ||
147 | */ | ||
148 | #define VAL_GPIOBCRL 0x8B844488 /* PB7...PB0 */ | ||
149 | #define VAL_GPIOBCRH 0x88BBB8FF /* PB15...PB8 */ | ||
150 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
151 | |||
152 | /* | ||
153 | * 0 - Analog input. | ||
154 | * 1 - Push Pull output 10MHz. | ||
155 | * 2 - Push Pull output 2MHz. | ||
156 | * 3 - Push Pull output 50MHz. | ||
157 | * 4 - Digital input. | ||
158 | * 5 - Open Drain output 10MHz. | ||
159 | * 6 - Open Drain output 2MHz. | ||
160 | * 7 - Open Drain output 50MHz. | ||
161 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
162 | * 9 - Alternate Push Pull output 10MHz. | ||
163 | * A - Alternate Push Pull output 2MHz. | ||
164 | * B - Alternate Push Pull output 50MHz. | ||
165 | * C - Reserved. | ||
166 | * D - Alternate Open Drain output 10MHz. | ||
167 | * E - Alternate Open Drain output 2MHz. | ||
168 | * F - Alternate Open Drain output 50MHz. | ||
169 | */ | ||
170 | |||
171 | /* | ||
172 | * Port C setup: | ||
173 | * PC0 - Analog input (ADC_IN). | ||
174 | * PC1 - Alternate output (ETH_MDC). | ||
175 | * PC2 - Input with PU (SD_CD). | ||
176 | * PC3 - Push Pull output (SD_CS). | ||
177 | * PC4 - Push Pull output (OTG_PW_ON). | ||
178 | * PC5 - Push Pull output (SF_CS). | ||
179 | * PC6 - Push Pull output (LCD_RD). | ||
180 | * PC7 - Push Pull output (LCD_WR). | ||
181 | * PC8 - Push Pull output (LCD_RS). | ||
182 | * PC9 - Push Pull output (LCD_CS). | ||
183 | * PC10 - Alternate output (SPI3 SCK). | ||
184 | * PC11 - Input with PU (SPI3 MISO). | ||
185 | * PC12 - Alternate output (SPI3 MOSI). | ||
186 | * PC13 - Normal input (KEY_TAMPER). | ||
187 | * PC14 - Normal input (OSC32 IN). | ||
188 | * PC15 - Normal input (OSC32 OUT). | ||
189 | */ | ||
190 | #define VAL_GPIOCCRL 0x333338B0 /* PC7...PC0 */ | ||
191 | #define VAL_GPIOCCRH 0x444B8B33 /* PC15...PC8 */ | ||
192 | #define VAL_GPIOCODR 0xFFFFFFFF | ||
193 | |||
194 | /* | ||
195 | * 0 - Analog input. | ||
196 | * 1 - Push Pull output 10MHz. | ||
197 | * 2 - Push Pull output 2MHz. | ||
198 | * 3 - Push Pull output 50MHz. | ||
199 | * 4 - Digital input. | ||
200 | * 5 - Open Drain output 10MHz. | ||
201 | * 6 - Open Drain output 2MHz. | ||
202 | * 7 - Open Drain output 50MHz. | ||
203 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
204 | * 9 - Alternate Push Pull output 10MHz. | ||
205 | * A - Alternate Push Pull output 2MHz. | ||
206 | * B - Alternate Push Pull output 50MHz. | ||
207 | * C - Reserved. | ||
208 | * D - Alternate Open Drain output 10MHz. | ||
209 | * E - Alternate Open Drain output 2MHz. | ||
210 | * F - Alternate Open Drain output 50MHz. | ||
211 | */ | ||
212 | |||
213 | /* | ||
214 | * Port D setup: | ||
215 | * PD0 - Input with PU (CAN1_RX, remapped). | ||
216 | * PD1 - Alternate output (CAN1_TX, remapped). | ||
217 | * PD2 - Push Pull output (LED3). | ||
218 | * PD3 - Push Pull output (LED4). | ||
219 | * PD4 - Push Pull output (LED5). | ||
220 | * PD5 - Alternate output (USART2 TX, remapped). | ||
221 | * PD6 - Input with PU (USART2 RX, remapped). | ||
222 | * PD7 - Push Pull output (LED6). | ||
223 | * PD8 - Normal input (ETH_RMII_CRS_DV, remapped). | ||
224 | * PD9 - Normal input (ETH_RMII_RXD0, remapped). | ||
225 | * PD10 - Normal input (ETH_RMII_RXD1, remapped). | ||
226 | * PD11 - Input with PU (JOY_UP). | ||
227 | * PD12 - Input with PU (JOY_DOWN). | ||
228 | * PD13 - Input with PU (JOY_LEFT). | ||
229 | * PD14 - Input with PU (JOY_RIGHT). | ||
230 | * PD15 - Input with PU (JOY_SEL). | ||
231 | */ | ||
232 | #define VAL_GPIODCRL 0x38B333B8 /* PD7...PD0 */ | ||
233 | #define VAL_GPIODCRH 0x88888444 /* PD15...PD8 */ | ||
234 | #define VAL_GPIODODR 0xFFFFFFFF | ||
235 | |||
236 | /* | ||
237 | * Port E setup. | ||
238 | * Everything input with pull-up except: | ||
239 | */ | ||
240 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
241 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ | ||
242 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
243 | |||
244 | #if !defined(_FROM_ASM_) | ||
245 | #ifdef __cplusplus | ||
246 | extern "C" { | ||
247 | #endif | ||
248 | void boardInit(void); | ||
249 | #ifdef __cplusplus | ||
250 | } | ||
251 | #endif | ||
252 | #endif /* _FROM_ASM_ */ | ||
253 | |||
254 | #endif /* _BOARD_H_ */ | ||