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1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#include "hal.h"
18
19/**
20 * @brief PAL setup.
21 * @details Digital I/O ports static configuration as defined in @p board.h.
22 * This variable is used by the HAL when initializing the PAL driver.
23 */
24#if HAL_USE_PAL || defined(__DOXYGEN__)
25const PALConfig pal_default_config =
26{
27 {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
28 {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
29 {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
30 {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
31 {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
32};
33#endif
34
35/*
36 * Early initialization code.
37 * This initialization must be performed just after stack setup and before
38 * any other initialization.
39 */
40void __early_init(void) {
41
42 stm32_clock_init();
43}
44
45#if HAL_USE_MMC_SPI
46/*
47 * Card detection through the card internal pull-up on D3.
48 */
49bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
50 static bool last_status = FALSE;
51
52 (void)mmcp;
53 if ((palReadLatch(GPIOA) & PAL_PORT_BIT(GPIOA_SPI3_CS_MMC)) == 0)
54 return last_status;
55 return last_status = (bool)palReadPad(GPIOA, GPIOA_SPI3_CS_MMC);
56}
57
58/*
59 * Card write protection detection is not possible, the card is always
60 * reported as not protected.
61 */
62bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
63
64 (void)mmcp;
65 return FALSE;
66}
67#endif
68
69/*
70 * Board-specific initialization code.
71 */
72void boardInit(void) {
73
74 /*
75 * Several I/O pins are re-mapped:
76 * USART3 to the PD8/PD9 pins.
77 * I2C1 to the PB8/PB9 pins.
78 * SPI3 to the PC10/PC11/PC12 pins.
79 */
80 AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP |
81 AFIO_MAPR_I2C1_REMAP |
82 AFIO_MAPR_SPI3_REMAP;
83}