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Diffstat (limited to 'lib/chibios/os/hal/boards/OLIMEX_STM32_P107/board.h')
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1 files changed, 193 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/boards/OLIMEX_STM32_P107/board.h b/lib/chibios/os/hal/boards/OLIMEX_STM32_P107/board.h new file mode 100644 index 000000000..7e0052060 --- /dev/null +++ b/lib/chibios/os/hal/boards/OLIMEX_STM32_P107/board.h | |||
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1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Setup for the Olimex STM32-P107 Rev.A evaluation board. | ||
22 | */ | ||
23 | |||
24 | /* | ||
25 | * Board identifier. | ||
26 | */ | ||
27 | #define BOARD_OLIMEX_STM32_P107_REV_A | ||
28 | #define BOARD_NAME "Olimex STM32-P107 Rev.A" | ||
29 | |||
30 | /* | ||
31 | * Board frequencies. | ||
32 | */ | ||
33 | #define STM32_LSECLK 32768 | ||
34 | #define STM32_HSECLK 25000000 | ||
35 | |||
36 | /* | ||
37 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
38 | */ | ||
39 | #define STM32F107xC | ||
40 | |||
41 | /* | ||
42 | * Ethernet PHY type. | ||
43 | */ | ||
44 | #define BOARD_PHY_ID MII_STE101P_ID | ||
45 | #define BOARD_PHY_RMII | ||
46 | |||
47 | /* | ||
48 | * IO pins assignments. | ||
49 | */ | ||
50 | #define GPIOA_SWITCH_WKUP 0 | ||
51 | #define GPIOA_SPI3_CS_MMC 4 | ||
52 | #define GPIOC_LED_STATUS1 6 | ||
53 | #define GPIOC_LED_STATUS2 7 | ||
54 | #define GPIOC_SWITCH_TAMPER 13 | ||
55 | |||
56 | /* | ||
57 | * I/O ports initial setup, this configuration is established soon after reset | ||
58 | * in the initialization code. | ||
59 | * | ||
60 | * The digits have the following meaning: | ||
61 | * 0 - Analog input. | ||
62 | * 1 - Push Pull output 10MHz. | ||
63 | * 2 - Push Pull output 2MHz. | ||
64 | * 3 - Push Pull output 50MHz. | ||
65 | * 4 - Digital input. | ||
66 | * 5 - Open Drain output 10MHz. | ||
67 | * 6 - Open Drain output 2MHz. | ||
68 | * 7 - Open Drain output 50MHz. | ||
69 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
70 | * 9 - Alternate Push Pull output 10MHz. | ||
71 | * A - Alternate Push Pull output 2MHz. | ||
72 | * B - Alternate Push Pull output 50MHz. | ||
73 | * C - Reserved. | ||
74 | * D - Alternate Open Drain output 10MHz. | ||
75 | * E - Alternate Open Drain output 2MHz. | ||
76 | * F - Alternate Open Drain output 50MHz. | ||
77 | * Please refer to the STM32 Reference Manual for details. | ||
78 | */ | ||
79 | |||
80 | /* | ||
81 | * Port A setup. | ||
82 | * Everything input with pull-up except: | ||
83 | * PA0 - Normal input (WKUP BUTTON). | ||
84 | * PA1 - Normal input (ETH_RMII_REF_CLK). | ||
85 | * PA2 - Alternate output (ETH_RMII_MDIO). | ||
86 | * PA3 - Input with PU (unconnected). | ||
87 | * PA4 - Open Drain output (CS_MMC). | ||
88 | * PA5 - Input with PU (unconnected). | ||
89 | * PA6 - Input with PU (unconnected). | ||
90 | * PA7 - Normal input (ETH_RMII_CRS_DV). | ||
91 | * PA8 - Alternate output (MCO). | ||
92 | * PA9 - Normal input (OTG_VBUS). | ||
93 | * PA10 - Normal input (OTG_ID). | ||
94 | * PA11 - Normal input (OTG_DM). | ||
95 | * PA12 - Normal input (OTG_DP). | ||
96 | * PA13 - Normal input (TMS). | ||
97 | * PA14 - Normal input (TCK). | ||
98 | * PA15 - Normal input (TDI). | ||
99 | */ | ||
100 | #define VAL_GPIOACRL 0x48878B44 /* PA7...PA0 */ | ||
101 | #define VAL_GPIOACRH 0x4444444B /* PA15...PA8 */ | ||
102 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
103 | |||
104 | /* | ||
105 | * Port B setup: | ||
106 | * PB0 - Input with PU (unconnected). | ||
107 | * PB1 - Input with PU (unconnected). | ||
108 | * PB2 - Normal input (BOOT1). | ||
109 | * PB3 - Normal input (TDO). | ||
110 | * PB4 - Normal input (TRST). | ||
111 | * PB5 - Input with PU (unconnected). | ||
112 | * PB6 - Input with PU (unconnected). | ||
113 | * PB7 - Input with PU (unconnected). | ||
114 | * PB8 - Alternate O.D. (I2C1 SCL, remapped). | ||
115 | * PB9 - Alternate O.D. (I2C1 SDA, remapped). | ||
116 | * PB10 - Input with PU (unconnected). | ||
117 | * PB11 - Alternate output (ETH_RMII_TX_EN). | ||
118 | * PB12 - Alternate output (ETH_RMII_TXD0). | ||
119 | * PB13 - Alternate output (ETH_RMII_TXD1). | ||
120 | * PB14 - Input with PU (unconnected). | ||
121 | * PB15 - Push Pull output (CS_UEXT). | ||
122 | */ | ||
123 | #define VAL_GPIOBCRL 0x88844488 /* PB7...PB0 */ | ||
124 | #define VAL_GPIOBCRH 0x38BBB8FF /* PB15...PB8 */ | ||
125 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
126 | |||
127 | /* | ||
128 | * Port C setup: | ||
129 | * PC0 - Input with PU (unconnected). | ||
130 | * PC1 - Alternate output (ETH_MDC). | ||
131 | * PC2 - Input with PU (unconnected). | ||
132 | * PC3 - Input with PU (unconnected). | ||
133 | * PC4 - Normal input (ETH_RMII_RXD0). | ||
134 | * PC5 - Normal input (ETH_RMII_RXD1). | ||
135 | * PC6 - Push Pull output (STAT1 green LED). | ||
136 | * PC7 - Push Pull output (STAT2 yellow LED). | ||
137 | * PC8 - Input with PU (unconnected). | ||
138 | * PC9 - Input with PU (unconnected). | ||
139 | * PC10 - Alternate output (SPI3 SCK). | ||
140 | * PC11 - Input with PU (SPI3 MISO). | ||
141 | * PC12 - Alternate output (SPI3 MOSI). | ||
142 | * PC13 - Normal input (TAMPER). | ||
143 | * PC14 - Normal input (OSC32 IN). | ||
144 | * PC15 - Normal input (OSC32 OUT). | ||
145 | */ | ||
146 | #define VAL_GPIOCCRL 0x334488B8 /* PC7...PC0 */ | ||
147 | #define VAL_GPIOCCRH 0x444B8B88 /* PC15...PC8 */ | ||
148 | #define VAL_GPIOCODR 0xFFFFFF3F | ||
149 | |||
150 | /* | ||
151 | * Port D setup: | ||
152 | * PD0 - Input with PU (unconnected). | ||
153 | * PD1 - Input with PU (unconnected). | ||
154 | * PD2 - Input with PU (unconnected). | ||
155 | * PD3 - Input with PU (unconnected). | ||
156 | * PD4 - Input with PU (unconnected). | ||
157 | * PD5 - Alternate output (USART2 TX, UEXT). | ||
158 | * PD6 - Input with PU (USART2 RX, UEXT). | ||
159 | * PD7 - Push Pull output (USB_VBUSON). | ||
160 | * PD8 - Alternate output (USART2 TX, remapped). | ||
161 | * PD9 - Normal input (USART2 RX, remapped). | ||
162 | * PD10 - Input with PU (unconnected). | ||
163 | * PD11 - Normal input (USART2 CTS, remapped). | ||
164 | * PD12 - Alternate output (USART2 RTS, remapped). | ||
165 | * PD13 - Input with PU (unconnected). | ||
166 | * PD14 - Input with PU (unconnected). | ||
167 | * PD15 - Input with PU (unconnected). | ||
168 | */ | ||
169 | #define VAL_GPIODCRL 0x38B88888 /* PD7...PD0 */ | ||
170 | #define VAL_GPIODCRH 0x888B484B /* PD15...PD8 */ | ||
171 | #define VAL_GPIODODR 0xFFFFFFFF | ||
172 | |||
173 | /* | ||
174 | * Port E setup. | ||
175 | * Everything input with pull-up except: | ||
176 | * PE14 - Normal input (ETH_RMII_MDINT). | ||
177 | * PE15 - Normal input (USB_FAULT). | ||
178 | */ | ||
179 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
180 | #define VAL_GPIOECRH 0x44888888 /* PE15...PE8 */ | ||
181 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
182 | |||
183 | #if !defined(_FROM_ASM_) | ||
184 | #ifdef __cplusplus | ||
185 | extern "C" { | ||
186 | #endif | ||
187 | void boardInit(void); | ||
188 | #ifdef __cplusplus | ||
189 | } | ||
190 | #endif | ||
191 | #endif /* _FROM_ASM_ */ | ||
192 | |||
193 | #endif /* _BOARD_H_ */ | ||