aboutsummaryrefslogtreecommitdiff
path: root/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI
diff options
context:
space:
mode:
Diffstat (limited to 'lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI')
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.c266
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.h1862
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.mk9
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg1459
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp15
5 files changed, 3611 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.c b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.c
new file mode 100644
index 000000000..9ff3f758c
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.c
@@ -0,0 +1,266 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
95 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
96#endif
97#if STM32_HAS_GPIOB
98 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
99 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
100#endif
101#if STM32_HAS_GPIOC
102 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
103 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
104#endif
105#if STM32_HAS_GPIOD
106 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
107 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
108#endif
109#if STM32_HAS_GPIOE
110 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
111 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
112#endif
113#if STM32_HAS_GPIOF
114 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
115 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
116#endif
117#if STM32_HAS_GPIOG
118 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
119 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
120#endif
121#if STM32_HAS_GPIOH
122 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
123 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
124#endif
125#if STM32_HAS_GPIOI
126 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
127 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
128#endif
129#if STM32_HAS_GPIOJ
130 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
131 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
132#endif
133#if STM32_HAS_GPIOK
134 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
135 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
136#endif
137};
138
139/*===========================================================================*/
140/* Driver local functions. */
141/*===========================================================================*/
142
143static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
144
145 gpiop->OTYPER = config->otyper;
146 gpiop->OSPEEDR = config->ospeedr;
147 gpiop->PUPDR = config->pupdr;
148 gpiop->ODR = config->odr;
149 gpiop->AFRL = config->afrl;
150 gpiop->AFRH = config->afrh;
151 gpiop->MODER = config->moder;
152}
153
154static void stm32_gpio_init(void) {
155
156 /* Enabling GPIO-related clocks, the mask comes from the
157 registry header file.*/
158 rccResetAHB1(STM32_GPIO_EN_MASK);
159 rccEnableAHB1(STM32_GPIO_EN_MASK, true);
160
161 /* Initializing all the defined GPIO ports.*/
162#if STM32_HAS_GPIOA
163 gpio_init(GPIOA, &gpio_default_config.PAData);
164#endif
165#if STM32_HAS_GPIOB
166 gpio_init(GPIOB, &gpio_default_config.PBData);
167#endif
168#if STM32_HAS_GPIOC
169 gpio_init(GPIOC, &gpio_default_config.PCData);
170#endif
171#if STM32_HAS_GPIOD
172 gpio_init(GPIOD, &gpio_default_config.PDData);
173#endif
174#if STM32_HAS_GPIOE
175 gpio_init(GPIOE, &gpio_default_config.PEData);
176#endif
177#if STM32_HAS_GPIOF
178 gpio_init(GPIOF, &gpio_default_config.PFData);
179#endif
180#if STM32_HAS_GPIOG
181 gpio_init(GPIOG, &gpio_default_config.PGData);
182#endif
183#if STM32_HAS_GPIOH
184 gpio_init(GPIOH, &gpio_default_config.PHData);
185#endif
186#if STM32_HAS_GPIOI
187 gpio_init(GPIOI, &gpio_default_config.PIData);
188#endif
189#if STM32_HAS_GPIOJ
190 gpio_init(GPIOJ, &gpio_default_config.PJData);
191#endif
192#if STM32_HAS_GPIOK
193 gpio_init(GPIOK, &gpio_default_config.PKData);
194#endif
195}
196
197/*===========================================================================*/
198/* Driver interrupt handlers. */
199/*===========================================================================*/
200
201/*===========================================================================*/
202/* Driver exported functions. */
203/*===========================================================================*/
204
205/**
206 * @brief Early initialization code.
207 * @details GPIO ports and system clocks are initialized before everything
208 * else.
209 */
210void __early_init(void) {
211
212 stm32_gpio_init();
213 stm32_clock_init();
214}
215
216#if HAL_USE_SDC || defined(__DOXYGEN__)
217/**
218 * @brief SDC card detection.
219 */
220bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
221
222 (void)sdcp;
223 /* CHTODO: Fill the implementation.*/
224 return true;
225}
226
227/**
228 * @brief SDC card write protection detection.
229 */
230bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
231
232 (void)sdcp;
233 /* CHTODO: Fill the implementation.*/
234 return false;
235}
236#endif /* HAL_USE_SDC */
237
238#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
239/**
240 * @brief MMC_SPI card detection.
241 */
242bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
243
244 (void)mmcp;
245 /* CHTODO: Fill the implementation.*/
246 return true;
247}
248
249/**
250 * @brief MMC_SPI card write protection detection.
251 */
252bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
253
254 (void)mmcp;
255 /* CHTODO: Fill the implementation.*/
256 return false;
257}
258#endif
259
260/**
261 * @brief Board-specific initialization code.
262 * @note You can add your board-specific code here.
263 */
264void boardInit(void) {
265
266}
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.h b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.h
new file mode 100644
index 000000000..81db61f3f
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.h
@@ -0,0 +1,1862 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*===========================================================================*/
26/* Driver constants. */
27/*===========================================================================*/
28
29/*
30 * Setup for STMicroelectronics STM32 Nucleo144-F767ZI board.
31 */
32
33/*
34 * Board identifier.
35 */
36#define BOARD_ST_NUCLEO144_F767ZI
37#define BOARD_NAME "STMicroelectronics STM32 Nucleo144-F767ZI"
38
39/*
40 * Ethernet PHY type.
41 */
42#define BOARD_PHY_ID MII_LAN8742A_ID
43#define BOARD_PHY_RMII
44
45/*
46 * Board oscillators-related settings.
47 */
48#if !defined(STM32_LSECLK)
49#define STM32_LSECLK 32768U
50#endif
51
52#define STM32_LSEDRV (3U << 3U)
53
54#if !defined(STM32_HSECLK)
55#define STM32_HSECLK 8000000U
56#endif
57
58#define STM32_HSE_BYPASS
59
60/*
61 * Board voltages.
62 * Required for performance limits calculation.
63 */
64#define STM32_VDD 300U
65
66/*
67 * MCU type as defined in the ST header.
68 */
69#define STM32F767xx
70
71/*
72 * IO pins assignments.
73 */
74#define GPIOA_ZIO_D32 0U
75#define GPIOA_TIM2_CH1 0U
76#define GPIOA_RMII_REF_CLK 1U
77#define GPIOA_RMII_MDIO 2U
78#define GPIOA_ARD_A0 3U
79#define GPIOA_ADC123_IN3 3U
80#define GPIOA_ZIO_D24 4U
81#define GPIOA_SPI3_NSS 4U
82#define GPIOA_ARD_D13 5U
83#define GPIOA_SPI1_SCK 5U
84#define GPIOA_ARD_D12 6U
85#define GPIOA_SPI1_MISO 6U
86#define GPIOA_ARD_D11 7U
87#define GPIOA_SPI1_MOSI 7U
88#define GPIOA_ZIO_D71 7U
89#define GPIOA_RMII_RX_DV 7U
90#define GPIOA_USB_SOF 8U
91#define GPIOA_USB_VBUS 9U
92#define GPIOA_USB_ID 10U
93#define GPIOA_USB_DM 11U
94#define GPIOA_USB_DP 12U
95#define GPIOA_SWDIO 13U
96#define GPIOA_SWCLK 14U
97#define GPIOA_ZIO_D20 15U
98#define GPIOA_I2S3_WS 15U
99
100#define GPIOB_ZIO_D33 0U
101#define GPIOB_TIM3_CH3 0U
102#define GPIOB_LED1 0U
103#define GPIOB_ZIO_A6 1U
104#define GPIOB_ADC12_IN9 1U
105#define GPIOB_ZIO_D27 2U
106#define GPIOB_QSPI_CLK 2U
107#define GPIOB_ZIO_D23 3U
108#define GPIOB_I2S3_CK 3U
109#define GPIOB_ZIO_D25 4U
110#define GPIOB_SPI3_MISO 4U
111#define GPIOB_ZIO_D22 5U
112#define GPIOB_I2S3_SD 5U
113#define GPIOB_ZIO_D26 6U
114#define GPIOB_QSPI_BK1_NCS 6U
115#define GPIOB_LED2 7U
116#define GPIOB_ARD_D15 8U
117#define GPIOB_I2C1_SCL 8U
118#define GPIOB_ARD_D14 9U
119#define GPIOB_I2C1_SDA 9U
120#define GPIOB_ZIO_D36 10U
121#define GPIOB_TIM2_CH3 10U
122#define GPIOB_ZIO_D35 11U
123#define GPIOB_TIM2_CH4 11U
124#define GPIOB_ZIO_D19 12U
125#define GPIOB_I2S2_WS 12U
126#define GPIOB_ZIO_D18 13U
127#define GPIOB_I2S2_CK 13U
128#define GPIOB_RMII_TXD1 13U
129#define GPIOB_LED3 14U
130#define GPIOB_ZIO_D17 15U
131#define GPIOB_I2S2_SD 15U
132
133#define GPIOC_ARD_A1 0U
134#define GPIOC_ADC123_IN10 0U
135#define GPIOC_RMII_MDC 1U
136#define GPIOC_ZIO_A7 2U
137#define GPIOC_ADC123_IN12 2U
138#define GPIOC_ARD_A2 3U
139#define GPIOC_ADC123_IN13 3U
140#define GPIOC_RMII_RXD0 4U
141#define GPIOC_RMII_RXD1 5U
142#define GPIOC_ZIO_D16 6U
143#define GPIOC_I2S2_MCK 6U
144#define GPIOC_ZIO_D21 7U
145#define GPIOC_I2S3_MCK 7U
146#define GPIOC_ZIO_D43 8U
147#define GPIOC_SDMMC_D0 8U
148#define GPIOC_ZIO_D44 9U
149#define GPIOC_SDMMC_D1 9U
150#define GPIOC_ZIO_D45 10U
151#define GPIOC_SDMMC_D2 10U
152#define GPIOC_ZIO_D46 11U
153#define GPIOC_SDMMC_D3 11U
154#define GPIOC_ZIO_D47 12U
155#define GPIOC_SDMMC_CK 12U
156#define GPIOC_BUTTON 13U
157#define GPIOC_OSC32_IN 14U
158#define GPIOC_OSC32_OUT 15U
159
160#define GPIOD_ZIO_D67 0U
161#define GPIOD_CAN1_RX 0U
162#define GPIOD_ZIO_D66 1U
163#define GPIOD_CAN1_TX 1U
164#define GPIOD_ZIO_D48 2U
165#define GPIOD_SDMMC_CMD 2U
166#define GPIOD_ZIO_D55 3U
167#define GPIOD_USART2_CTS 3U
168#define GPIOD_ZIO_D54 4U
169#define GPIOD_USART2_RTS 4U
170#define GPIOD_ZIO_D53 5U
171#define GPIOD_USART2_TX 5U
172#define GPIOD_ZIO_D52 6U
173#define GPIOD_USART2_RX 6U
174#define GPIOD_ZIO_D51 7U
175#define GPIOD_USART2_SCLK 7U
176#define GPIOD_USART3_RX 8U
177#define GPIOD_STLK_RX 8U
178#define GPIOD_USART3_TX 9U
179#define GPIOD_STLK_TX 9U
180#define GPIOD_PIN10 10U
181#define GPIOD_ZIO_D30 11U
182#define GPIOD_QSPI_BK1_IO0 11U
183#define GPIOD_ZIO_D29 12U
184#define GPIOD_QSPI_BK1_IO1 12U
185#define GPIOD_ZIO_D28 13U
186#define GPIOD_QSPI_BK1_IO3 13U
187#define GPIOD_ARD_D10 14U
188#define GPIOD_SPI1_NSS 14U
189#define GPIOD_ARD_D9 15U
190#define GPIOD_TIM4_CH4 15U
191
192#define GPIOE_ZIO_D34 0U
193#define GPIOE_TIM4_ETR 0U
194#define GPIOE_PIN1 1U
195#define GPIOE_ZIO_D31 2U
196#define GPIOE_ZIO_D56 2U
197#define GPIOE_SAI1_MCLK_A 2U
198#define GPIOE_ZIO_D60 3U
199#define GPIOE_SAI1_SD_B 3U
200#define GPIOE_ZIO_D57 4U
201#define GPIOE_SAI1_FS_A 4U
202#define GPIOE_ZIO_D58 5U
203#define GPIOE_SAI1_SCK_A 5U
204#define GPIOE_ZIO_D59 6U
205#define GPIOE_SAI1_SD_A 6U
206#define GPIOE_ZIO_D41 7U
207#define GPIOE_TIM1_ETR 7U
208#define GPIOE_ZIO_D42 8U
209#define GPIOE_TIM1_CH1N 8U
210#define GPIOE_ARD_D6 9U
211#define GPIOE_TIM1_CH1 9U
212#define GPIOE_ZIO_D40 10U
213#define GPIOE_TIM1_CH2N 10U
214#define GPIOE_ARD_D5 11U
215#define GPIOE_TIM1_CH2 11U
216#define GPIOE_ZIO_D39 12U
217#define GPIOE_TIM1_CH3N 12U
218#define GPIOE_ARD_D3 13U
219#define GPIOE_TIM1_CH3 13U
220#define GPIOE_ZIO_D38 14U
221#define GPIOE_ZIO_D37 15U
222#define GPIOE_TIM1_BKIN1 15U
223
224#define GPIOF_ZIO_D68 0U
225#define GPIOF_I2C2_SDA 0U
226#define GPIOF_ZIO_D69 1U
227#define GPIOF_I2C2_SCL 1U
228#define GPIOF_ZIO_D70 2U
229#define GPIOF_I2C2_SMBA 2U
230#define GPIOF_ARD_A3 3U
231#define GPIOF_ADC3_IN9 3U
232#define GPIOF_ZIO_A8 4U
233#define GPIOF_ADC3_IN14 4U
234#define GPIOF_ARD_A4 5U
235#define GPIOF_ADC3_IN15 5U
236#define GPIOF_PIN6 6U
237#define GPIOF_ZIO_D62 7U
238#define GPIOF_SAI1_MCLK_B 7U
239#define GPIOF_ZIO_D61 8U
240#define GPIOF_SAI1_SCK_B 8U
241#define GPIOF_ZIO_D63 9U
242#define GPIOF_SAI1_FS_B 9U
243#define GPIOF_ARD_A5 10U
244#define GPIOF_ADC3_IN8 10U
245#define GPIOF_PIN11 11U
246#define GPIOF_ARD_D8 12U
247#define GPIOF_ARD_D7 13U
248#define GPIOF_ARD_D4 14U
249#define GPIOF_ARD_D2 15U
250
251#define GPIOG_ZIO_D65 0U
252#define GPIOG_ZIO_D64 1U
253#define GPIOG_ZIO_D49 2U
254#define GPIOG_ZIO_D50 3U
255#define GPIOG_PIN4 4U
256#define GPIOG_PIN5 5U
257#define GPIOG_USB_GPIO_OUT 6U
258#define GPIOG_USB_GPIO_IN 7U
259#define GPIOG_PIN8 8U
260#define GPIOG_ARD_D0 9U
261#define GPIOG_USART6_RX 9U
262#define GPIOG_PIN10 10U
263#define GPIOG_RMII_TX_EN 11U
264#define GPIOG_PIN12 12U
265#define GPIOG_RMII_TXD0 13U
266#define GPIOG_ARD_D1 14U
267#define GPIOG_USART6_TX 14U
268#define GPIOG_PIN15 15U
269
270#define GPIOH_OSC_IN 0U
271#define GPIOH_OSC_OUT 1U
272#define GPIOH_PIN2 2U
273#define GPIOH_PIN3 3U
274#define GPIOH_PIN4 4U
275#define GPIOH_PIN5 5U
276#define GPIOH_PIN6 6U
277#define GPIOH_PIN7 7U
278#define GPIOH_PIN8 8U
279#define GPIOH_PIN9 9U
280#define GPIOH_PIN10 10U
281#define GPIOH_PIN11 11U
282#define GPIOH_PIN12 12U
283#define GPIOH_PIN13 13U
284#define GPIOH_PIN14 14U
285#define GPIOH_PIN15 15U
286
287#define GPIOI_PIN0 0U
288#define GPIOI_PIN1 1U
289#define GPIOI_PIN2 2U
290#define GPIOI_PIN3 3U
291#define GPIOI_PIN4 4U
292#define GPIOI_PIN5 5U
293#define GPIOI_PIN6 6U
294#define GPIOI_PIN7 7U
295#define GPIOI_PIN8 8U
296#define GPIOI_PIN9 9U
297#define GPIOI_PIN10 10U
298#define GPIOI_PIN11 11U
299#define GPIOI_PIN12 12U
300#define GPIOI_PIN13 13U
301#define GPIOI_PIN14 14U
302#define GPIOI_PIN15 15U
303
304#define GPIOJ_PIN0 0U
305#define GPIOJ_PIN1 1U
306#define GPIOJ_PIN2 2U
307#define GPIOJ_PIN3 3U
308#define GPIOJ_PIN4 4U
309#define GPIOJ_PIN5 5U
310#define GPIOJ_PIN6 6U
311#define GPIOJ_PIN7 7U
312#define GPIOJ_PIN8 8U
313#define GPIOJ_PIN9 9U
314#define GPIOJ_PIN10 10U
315#define GPIOJ_PIN11 11U
316#define GPIOJ_PIN12 12U
317#define GPIOJ_PIN13 13U
318#define GPIOJ_PIN14 14U
319#define GPIOJ_PIN15 15U
320
321#define GPIOK_PIN0 0U
322#define GPIOK_PIN1 1U
323#define GPIOK_PIN2 2U
324#define GPIOK_PIN3 3U
325#define GPIOK_PIN4 4U
326#define GPIOK_PIN5 5U
327#define GPIOK_PIN6 6U
328#define GPIOK_PIN7 7U
329#define GPIOK_PIN8 8U
330#define GPIOK_PIN9 9U
331#define GPIOK_PIN10 10U
332#define GPIOK_PIN11 11U
333#define GPIOK_PIN12 12U
334#define GPIOK_PIN13 13U
335#define GPIOK_PIN14 14U
336#define GPIOK_PIN15 15U
337
338/*
339 * IO lines assignments.
340 */
341#define LINE_ZIO_D32 PAL_LINE(GPIOA, 0U)
342#define LINE_TIM2_CH1 PAL_LINE(GPIOA, 0U)
343#define LINE_RMII_REF_CLK PAL_LINE(GPIOA, 1U)
344#define LINE_RMII_MDIO PAL_LINE(GPIOA, 2U)
345#define LINE_ARD_A0 PAL_LINE(GPIOA, 3U)
346#define LINE_ADC123_IN3 PAL_LINE(GPIOA, 3U)
347#define LINE_ZIO_D24 PAL_LINE(GPIOA, 4U)
348#define LINE_SPI3_NSS PAL_LINE(GPIOA, 4U)
349#define LINE_ARD_D13 PAL_LINE(GPIOA, 5U)
350#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U)
351#define LINE_ARD_D12 PAL_LINE(GPIOA, 6U)
352#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U)
353#define LINE_ARD_D11 PAL_LINE(GPIOA, 7U)
354#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U)
355#define LINE_ZIO_D71 PAL_LINE(GPIOA, 7U)
356#define LINE_RMII_RX_DV PAL_LINE(GPIOA, 7U)
357#define LINE_USB_SOF PAL_LINE(GPIOA, 8U)
358#define LINE_USB_VBUS PAL_LINE(GPIOA, 9U)
359#define LINE_USB_ID PAL_LINE(GPIOA, 10U)
360#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
361#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
362#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
363#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
364#define LINE_ZIO_D20 PAL_LINE(GPIOA, 15U)
365#define LINE_I2S3_WS PAL_LINE(GPIOA, 15U)
366#define LINE_ZIO_D33 PAL_LINE(GPIOB, 0U)
367#define LINE_TIM3_CH3 PAL_LINE(GPIOB, 0U)
368#define LINE_LED1 PAL_LINE(GPIOB, 0U)
369#define LINE_ZIO_A6 PAL_LINE(GPIOB, 1U)
370#define LINE_ADC12_IN9 PAL_LINE(GPIOB, 1U)
371#define LINE_ZIO_D27 PAL_LINE(GPIOB, 2U)
372#define LINE_QSPI_CLK PAL_LINE(GPIOB, 2U)
373#define LINE_ZIO_D23 PAL_LINE(GPIOB, 3U)
374#define LINE_I2S3_CK PAL_LINE(GPIOB, 3U)
375#define LINE_ZIO_D25 PAL_LINE(GPIOB, 4U)
376#define LINE_SPI3_MISO PAL_LINE(GPIOB, 4U)
377#define LINE_ZIO_D22 PAL_LINE(GPIOB, 5U)
378#define LINE_I2S3_SD PAL_LINE(GPIOB, 5U)
379#define LINE_ZIO_D26 PAL_LINE(GPIOB, 6U)
380#define LINE_QSPI_BK1_NCS PAL_LINE(GPIOB, 6U)
381#define LINE_LED2 PAL_LINE(GPIOB, 7U)
382#define LINE_ARD_D15 PAL_LINE(GPIOB, 8U)
383#define LINE_I2C1_SCL PAL_LINE(GPIOB, 8U)
384#define LINE_ARD_D14 PAL_LINE(GPIOB, 9U)
385#define LINE_I2C1_SDA PAL_LINE(GPIOB, 9U)
386#define LINE_ZIO_D36 PAL_LINE(GPIOB, 10U)
387#define LINE_TIM2_CH3 PAL_LINE(GPIOB, 10U)
388#define LINE_ZIO_D35 PAL_LINE(GPIOB, 11U)
389#define LINE_TIM2_CH4 PAL_LINE(GPIOB, 11U)
390#define LINE_ZIO_D19 PAL_LINE(GPIOB, 12U)
391#define LINE_I2S2_WS PAL_LINE(GPIOB, 12U)
392#define LINE_ZIO_D18 PAL_LINE(GPIOB, 13U)
393#define LINE_I2S2_CK PAL_LINE(GPIOB, 13U)
394#define LINE_RMII_TXD1 PAL_LINE(GPIOB, 13U)
395#define LINE_LED3 PAL_LINE(GPIOB, 14U)
396#define LINE_ZIO_D17 PAL_LINE(GPIOB, 15U)
397#define LINE_I2S2_SD PAL_LINE(GPIOB, 15U)
398#define LINE_ARD_A1 PAL_LINE(GPIOC, 0U)
399#define LINE_ADC123_IN10 PAL_LINE(GPIOC, 0U)
400#define LINE_RMII_MDC PAL_LINE(GPIOC, 1U)
401#define LINE_ZIO_A7 PAL_LINE(GPIOC, 2U)
402#define LINE_ADC123_IN12 PAL_LINE(GPIOC, 2U)
403#define LINE_ARD_A2 PAL_LINE(GPIOC, 3U)
404#define LINE_ADC123_IN13 PAL_LINE(GPIOC, 3U)
405#define LINE_RMII_RXD0 PAL_LINE(GPIOC, 4U)
406#define LINE_RMII_RXD1 PAL_LINE(GPIOC, 5U)
407#define LINE_ZIO_D16 PAL_LINE(GPIOC, 6U)
408#define LINE_I2S2_MCK PAL_LINE(GPIOC, 6U)
409#define LINE_ZIO_D21 PAL_LINE(GPIOC, 7U)
410#define LINE_I2S3_MCK PAL_LINE(GPIOC, 7U)
411#define LINE_ZIO_D43 PAL_LINE(GPIOC, 8U)
412#define LINE_SDMMC_D0 PAL_LINE(GPIOC, 8U)
413#define LINE_ZIO_D44 PAL_LINE(GPIOC, 9U)
414#define LINE_SDMMC_D1 PAL_LINE(GPIOC, 9U)
415#define LINE_ZIO_D45 PAL_LINE(GPIOC, 10U)
416#define LINE_SDMMC_D2 PAL_LINE(GPIOC, 10U)
417#define LINE_ZIO_D46 PAL_LINE(GPIOC, 11U)
418#define LINE_SDMMC_D3 PAL_LINE(GPIOC, 11U)
419#define LINE_ZIO_D47 PAL_LINE(GPIOC, 12U)
420#define LINE_SDMMC_CK PAL_LINE(GPIOC, 12U)
421#define LINE_BUTTON PAL_LINE(GPIOC, 13U)
422#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
423#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
424#define LINE_ZIO_D67 PAL_LINE(GPIOD, 0U)
425#define LINE_CAN1_RX PAL_LINE(GPIOD, 0U)
426#define LINE_ZIO_D66 PAL_LINE(GPIOD, 1U)
427#define LINE_CAN1_TX PAL_LINE(GPIOD, 1U)
428#define LINE_ZIO_D48 PAL_LINE(GPIOD, 2U)
429#define LINE_SDMMC_CMD PAL_LINE(GPIOD, 2U)
430#define LINE_ZIO_D55 PAL_LINE(GPIOD, 3U)
431#define LINE_USART2_CTS PAL_LINE(GPIOD, 3U)
432#define LINE_ZIO_D54 PAL_LINE(GPIOD, 4U)
433#define LINE_USART2_RTS PAL_LINE(GPIOD, 4U)
434#define LINE_ZIO_D53 PAL_LINE(GPIOD, 5U)
435#define LINE_USART2_TX PAL_LINE(GPIOD, 5U)
436#define LINE_ZIO_D52 PAL_LINE(GPIOD, 6U)
437#define LINE_USART2_RX PAL_LINE(GPIOD, 6U)
438#define LINE_ZIO_D51 PAL_LINE(GPIOD, 7U)
439#define LINE_USART2_SCLK PAL_LINE(GPIOD, 7U)
440#define LINE_USART3_RX PAL_LINE(GPIOD, 8U)
441#define LINE_STLK_RX PAL_LINE(GPIOD, 8U)
442#define LINE_USART3_TX PAL_LINE(GPIOD, 9U)
443#define LINE_STLK_TX PAL_LINE(GPIOD, 9U)
444#define LINE_ZIO_D30 PAL_LINE(GPIOD, 11U)
445#define LINE_QSPI_BK1_IO0 PAL_LINE(GPIOD, 11U)
446#define LINE_ZIO_D29 PAL_LINE(GPIOD, 12U)
447#define LINE_QSPI_BK1_IO1 PAL_LINE(GPIOD, 12U)
448#define LINE_ZIO_D28 PAL_LINE(GPIOD, 13U)
449#define LINE_QSPI_BK1_IO3 PAL_LINE(GPIOD, 13U)
450#define LINE_ARD_D10 PAL_LINE(GPIOD, 14U)
451#define LINE_SPI1_NSS PAL_LINE(GPIOD, 14U)
452#define LINE_ARD_D9 PAL_LINE(GPIOD, 15U)
453#define LINE_TIM4_CH4 PAL_LINE(GPIOD, 15U)
454#define LINE_ZIO_D34 PAL_LINE(GPIOE, 0U)
455#define LINE_TIM4_ETR PAL_LINE(GPIOE, 0U)
456#define LINE_ZIO_D31 PAL_LINE(GPIOE, 2U)
457#define LINE_ZIO_D56 PAL_LINE(GPIOE, 2U)
458#define LINE_SAI1_MCLK_A PAL_LINE(GPIOE, 2U)
459#define LINE_ZIO_D60 PAL_LINE(GPIOE, 3U)
460#define LINE_SAI1_SD_B PAL_LINE(GPIOE, 3U)
461#define LINE_ZIO_D57 PAL_LINE(GPIOE, 4U)
462#define LINE_SAI1_FS_A PAL_LINE(GPIOE, 4U)
463#define LINE_ZIO_D58 PAL_LINE(GPIOE, 5U)
464#define LINE_SAI1_SCK_A PAL_LINE(GPIOE, 5U)
465#define LINE_ZIO_D59 PAL_LINE(GPIOE, 6U)
466#define LINE_SAI1_SD_A PAL_LINE(GPIOE, 6U)
467#define LINE_ZIO_D41 PAL_LINE(GPIOE, 7U)
468#define LINE_TIM1_ETR PAL_LINE(GPIOE, 7U)
469#define LINE_ZIO_D42 PAL_LINE(GPIOE, 8U)
470#define LINE_TIM1_CH1N PAL_LINE(GPIOE, 8U)
471#define LINE_ARD_D6 PAL_LINE(GPIOE, 9U)
472#define LINE_TIM1_CH1 PAL_LINE(GPIOE, 9U)
473#define LINE_ZIO_D40 PAL_LINE(GPIOE, 10U)
474#define LINE_TIM1_CH2N PAL_LINE(GPIOE, 10U)
475#define LINE_ARD_D5 PAL_LINE(GPIOE, 11U)
476#define LINE_TIM1_CH2 PAL_LINE(GPIOE, 11U)
477#define LINE_ZIO_D39 PAL_LINE(GPIOE, 12U)
478#define LINE_TIM1_CH3N PAL_LINE(GPIOE, 12U)
479#define LINE_ARD_D3 PAL_LINE(GPIOE, 13U)
480#define LINE_TIM1_CH3 PAL_LINE(GPIOE, 13U)
481#define LINE_ZIO_D38 PAL_LINE(GPIOE, 14U)
482#define LINE_ZIO_D37 PAL_LINE(GPIOE, 15U)
483#define LINE_TIM1_BKIN1 PAL_LINE(GPIOE, 15U)
484#define LINE_ZIO_D68 PAL_LINE(GPIOF, 0U)
485#define LINE_I2C2_SDA PAL_LINE(GPIOF, 0U)
486#define LINE_ZIO_D69 PAL_LINE(GPIOF, 1U)
487#define LINE_I2C2_SCL PAL_LINE(GPIOF, 1U)
488#define LINE_ZIO_D70 PAL_LINE(GPIOF, 2U)
489#define LINE_I2C2_SMBA PAL_LINE(GPIOF, 2U)
490#define LINE_ARD_A3 PAL_LINE(GPIOF, 3U)
491#define LINE_ADC3_IN9 PAL_LINE(GPIOF, 3U)
492#define LINE_ZIO_A8 PAL_LINE(GPIOF, 4U)
493#define LINE_ADC3_IN14 PAL_LINE(GPIOF, 4U)
494#define LINE_ARD_A4 PAL_LINE(GPIOF, 5U)
495#define LINE_ADC3_IN15 PAL_LINE(GPIOF, 5U)
496#define LINE_ZIO_D62 PAL_LINE(GPIOF, 7U)
497#define LINE_SAI1_MCLK_B PAL_LINE(GPIOF, 7U)
498#define LINE_ZIO_D61 PAL_LINE(GPIOF, 8U)
499#define LINE_SAI1_SCK_B PAL_LINE(GPIOF, 8U)
500#define LINE_ZIO_D63 PAL_LINE(GPIOF, 9U)
501#define LINE_SAI1_FS_B PAL_LINE(GPIOF, 9U)
502#define LINE_ARD_A5 PAL_LINE(GPIOF, 10U)
503#define LINE_ADC3_IN8 PAL_LINE(GPIOF, 10U)
504#define LINE_ARD_D8 PAL_LINE(GPIOF, 12U)
505#define LINE_ARD_D7 PAL_LINE(GPIOF, 13U)
506#define LINE_ARD_D4 PAL_LINE(GPIOF, 14U)
507#define LINE_ARD_D2 PAL_LINE(GPIOF, 15U)
508#define LINE_ZIO_D65 PAL_LINE(GPIOG, 0U)
509#define LINE_ZIO_D64 PAL_LINE(GPIOG, 1U)
510#define LINE_ZIO_D49 PAL_LINE(GPIOG, 2U)
511#define LINE_ZIO_D50 PAL_LINE(GPIOG, 3U)
512#define LINE_USB_GPIO_OUT PAL_LINE(GPIOG, 6U)
513#define LINE_USB_GPIO_IN PAL_LINE(GPIOG, 7U)
514#define LINE_ARD_D0 PAL_LINE(GPIOG, 9U)
515#define LINE_USART6_RX PAL_LINE(GPIOG, 9U)
516#define LINE_RMII_TX_EN PAL_LINE(GPIOG, 11U)
517#define LINE_RMII_TXD0 PAL_LINE(GPIOG, 13U)
518#define LINE_ARD_D1 PAL_LINE(GPIOG, 14U)
519#define LINE_USART6_TX PAL_LINE(GPIOG, 14U)
520#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
521#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
522
523/*===========================================================================*/
524/* Driver pre-compile time settings. */
525/*===========================================================================*/
526
527/*===========================================================================*/
528/* Derived constants and error checks. */
529/*===========================================================================*/
530
531/*===========================================================================*/
532/* Driver data structures and types. */
533/*===========================================================================*/
534
535/*===========================================================================*/
536/* Driver macros. */
537/*===========================================================================*/
538
539/*
540 * I/O ports initial setup, this configuration is established soon after reset
541 * in the initialization code.
542 * Please refer to the STM32 Reference Manual for details.
543 */
544#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
545#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
546#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
547#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
548#define PIN_ODR_LOW(n) (0U << (n))
549#define PIN_ODR_HIGH(n) (1U << (n))
550#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
551#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
552#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
553#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
554#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
555#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
556#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
557#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
558#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
559#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
560
561/*
562 * GPIOA setup:
563 *
564 * PA0 - ZIO_D32 TIM2_CH1 (input pullup).
565 * PA1 - RMII_REF_CLK (alternate 11).
566 * PA2 - RMII_MDIO (alternate 11).
567 * PA3 - ARD_A0 ADC123_IN3 (input pullup).
568 * PA4 - ZIO_D24 SPI3_NSS (input pullup).
569 * PA5 - ARD_D13 SPI1_SCK (input pullup).
570 * PA6 - ARD_D12 SPI1_MISO (input pullup).
571 * PA7 - ARD_D11 SPI1_MOSI ZIO_D71 RMII_RX_DV(alternate 11).
572 * PA8 - USB_SOF (alternate 10).
573 * PA9 - USB_VBUS (analog).
574 * PA10 - USB_ID (alternate 10).
575 * PA11 - USB_DM (alternate 10).
576 * PA12 - USB_DP (alternate 10).
577 * PA13 - SWDIO (alternate 0).
578 * PA14 - SWCLK (alternate 0).
579 * PA15 - ZIO_D20 I2S3_WS (input pullup).
580 */
581#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ZIO_D32) | \
582 PIN_MODE_ALTERNATE(GPIOA_RMII_REF_CLK) |\
583 PIN_MODE_ALTERNATE(GPIOA_RMII_MDIO) | \
584 PIN_MODE_INPUT(GPIOA_ARD_A0) | \
585 PIN_MODE_INPUT(GPIOA_ZIO_D24) | \
586 PIN_MODE_INPUT(GPIOA_ARD_D13) | \
587 PIN_MODE_INPUT(GPIOA_ARD_D12) | \
588 PIN_MODE_ALTERNATE(GPIOA_ARD_D11) | \
589 PIN_MODE_ALTERNATE(GPIOA_USB_SOF) | \
590 PIN_MODE_ANALOG(GPIOA_USB_VBUS) | \
591 PIN_MODE_ALTERNATE(GPIOA_USB_ID) | \
592 PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
593 PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
594 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
595 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
596 PIN_MODE_INPUT(GPIOA_ZIO_D20))
597#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D32) | \
598 PIN_OTYPE_PUSHPULL(GPIOA_RMII_REF_CLK) |\
599 PIN_OTYPE_PUSHPULL(GPIOA_RMII_MDIO) | \
600 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
601 PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D24) | \
602 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D13) | \
603 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) | \
604 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) | \
605 PIN_OTYPE_PUSHPULL(GPIOA_USB_SOF) | \
606 PIN_OTYPE_PUSHPULL(GPIOA_USB_VBUS) | \
607 PIN_OTYPE_PUSHPULL(GPIOA_USB_ID) | \
608 PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
609 PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
610 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
611 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
612 PIN_OTYPE_PUSHPULL(GPIOA_ZIO_D20))
613#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ZIO_D32) | \
614 PIN_OSPEED_HIGH(GPIOA_RMII_REF_CLK) | \
615 PIN_OSPEED_HIGH(GPIOA_RMII_MDIO) | \
616 PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
617 PIN_OSPEED_HIGH(GPIOA_ZIO_D24) | \
618 PIN_OSPEED_HIGH(GPIOA_ARD_D13) | \
619 PIN_OSPEED_HIGH(GPIOA_ARD_D12) | \
620 PIN_OSPEED_HIGH(GPIOA_ARD_D11) | \
621 PIN_OSPEED_HIGH(GPIOA_USB_SOF) | \
622 PIN_OSPEED_HIGH(GPIOA_USB_VBUS) | \
623 PIN_OSPEED_HIGH(GPIOA_USB_ID) | \
624 PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
625 PIN_OSPEED_HIGH(GPIOA_USB_DP) | \
626 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
627 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
628 PIN_OSPEED_HIGH(GPIOA_ZIO_D20))
629#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ZIO_D32) | \
630 PIN_PUPDR_FLOATING(GPIOA_RMII_REF_CLK) |\
631 PIN_PUPDR_PULLUP(GPIOA_RMII_MDIO) | \
632 PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
633 PIN_PUPDR_PULLUP(GPIOA_ZIO_D24) | \
634 PIN_PUPDR_PULLUP(GPIOA_ARD_D13) | \
635 PIN_PUPDR_PULLUP(GPIOA_ARD_D12) | \
636 PIN_PUPDR_PULLUP(GPIOA_ARD_D11) | \
637 PIN_PUPDR_FLOATING(GPIOA_USB_SOF) | \
638 PIN_PUPDR_FLOATING(GPIOA_USB_VBUS) | \
639 PIN_PUPDR_FLOATING(GPIOA_USB_ID) | \
640 PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
641 PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
642 PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
643 PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
644 PIN_PUPDR_PULLUP(GPIOA_ZIO_D20))
645#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ZIO_D32) | \
646 PIN_ODR_HIGH(GPIOA_RMII_REF_CLK) | \
647 PIN_ODR_HIGH(GPIOA_RMII_MDIO) | \
648 PIN_ODR_HIGH(GPIOA_ARD_A0) | \
649 PIN_ODR_HIGH(GPIOA_ZIO_D24) | \
650 PIN_ODR_HIGH(GPIOA_ARD_D13) | \
651 PIN_ODR_HIGH(GPIOA_ARD_D12) | \
652 PIN_ODR_HIGH(GPIOA_ARD_D11) | \
653 PIN_ODR_HIGH(GPIOA_USB_SOF) | \
654 PIN_ODR_HIGH(GPIOA_USB_VBUS) | \
655 PIN_ODR_HIGH(GPIOA_USB_ID) | \
656 PIN_ODR_HIGH(GPIOA_USB_DM) | \
657 PIN_ODR_HIGH(GPIOA_USB_DP) | \
658 PIN_ODR_HIGH(GPIOA_SWDIO) | \
659 PIN_ODR_HIGH(GPIOA_SWCLK) | \
660 PIN_ODR_HIGH(GPIOA_ZIO_D20))
661#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ZIO_D32, 0U) | \
662 PIN_AFIO_AF(GPIOA_RMII_REF_CLK, 11U) | \
663 PIN_AFIO_AF(GPIOA_RMII_MDIO, 11U) | \
664 PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
665 PIN_AFIO_AF(GPIOA_ZIO_D24, 0U) | \
666 PIN_AFIO_AF(GPIOA_ARD_D13, 0U) | \
667 PIN_AFIO_AF(GPIOA_ARD_D12, 0U) | \
668 PIN_AFIO_AF(GPIOA_ARD_D11, 11U))
669#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_USB_SOF, 10U) | \
670 PIN_AFIO_AF(GPIOA_USB_VBUS, 0U) | \
671 PIN_AFIO_AF(GPIOA_USB_ID, 10U) | \
672 PIN_AFIO_AF(GPIOA_USB_DM, 10U) | \
673 PIN_AFIO_AF(GPIOA_USB_DP, 10U) | \
674 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
675 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
676 PIN_AFIO_AF(GPIOA_ZIO_D20, 0U))
677
678/*
679 * GPIOB setup:
680 *
681 * PB0 - ZIO_D33 TIM3_CH3 LED1 (output pushpull maximum).
682 * PB1 - ZIO_A6 ADC12_IN9 (input pullup).
683 * PB2 - ZIO_D27 QSPI_CLK (input pullup).
684 * PB3 - ZIO_D23 I2S3_CK (input pullup).
685 * PB4 - ZIO_D25 SPI3_MISO (input pullup).
686 * PB5 - ZIO_D22 I2S3_SD (input pullup).
687 * PB6 - ZIO_D26 QSPI_BK1_NCS (input pullup).
688 * PB7 - LED2 (output pushpull maximum).
689 * PB8 - ARD_D15 I2C1_SCL (input pullup).
690 * PB9 - ARD_D14 I2C1_SDA (input pullup).
691 * PB10 - ZIO_D36 TIM2_CH3 (input pullup).
692 * PB11 - ZIO_D35 TIM2_CH4 (input pullup).
693 * PB12 - ZIO_D19 I2S2_WS (input pullup).
694 * PB13 - ZIO_D18 I2S2_CK RMII_TXD1 (alternate 11).
695 * PB14 - LED3 (output pushpull maximum).
696 * PB15 - ZIO_D17 I2S2_SD (input pullup).
697 */
698#define VAL_GPIOB_MODER (PIN_MODE_OUTPUT(GPIOB_ZIO_D33) | \
699 PIN_MODE_INPUT(GPIOB_ZIO_A6) | \
700 PIN_MODE_INPUT(GPIOB_ZIO_D27) | \
701 PIN_MODE_INPUT(GPIOB_ZIO_D23) | \
702 PIN_MODE_INPUT(GPIOB_ZIO_D25) | \
703 PIN_MODE_INPUT(GPIOB_ZIO_D22) | \
704 PIN_MODE_INPUT(GPIOB_ZIO_D26) | \
705 PIN_MODE_OUTPUT(GPIOB_LED2) | \
706 PIN_MODE_INPUT(GPIOB_ARD_D15) | \
707 PIN_MODE_INPUT(GPIOB_ARD_D14) | \
708 PIN_MODE_INPUT(GPIOB_ZIO_D36) | \
709 PIN_MODE_INPUT(GPIOB_ZIO_D35) | \
710 PIN_MODE_INPUT(GPIOB_ZIO_D19) | \
711 PIN_MODE_ALTERNATE(GPIOB_ZIO_D18) | \
712 PIN_MODE_OUTPUT(GPIOB_LED3) | \
713 PIN_MODE_INPUT(GPIOB_ZIO_D17))
714#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D33) | \
715 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_A6) | \
716 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D27) | \
717 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D23) | \
718 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D25) | \
719 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D22) | \
720 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D26) | \
721 PIN_OTYPE_PUSHPULL(GPIOB_LED2) | \
722 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) | \
723 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) | \
724 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D36) | \
725 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D35) | \
726 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D19) | \
727 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D18) | \
728 PIN_OTYPE_PUSHPULL(GPIOB_LED3) | \
729 PIN_OTYPE_PUSHPULL(GPIOB_ZIO_D17))
730#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ZIO_D33) | \
731 PIN_OSPEED_HIGH(GPIOB_ZIO_A6) | \
732 PIN_OSPEED_HIGH(GPIOB_ZIO_D27) | \
733 PIN_OSPEED_HIGH(GPIOB_ZIO_D23) | \
734 PIN_OSPEED_HIGH(GPIOB_ZIO_D25) | \
735 PIN_OSPEED_HIGH(GPIOB_ZIO_D22) | \
736 PIN_OSPEED_HIGH(GPIOB_ZIO_D26) | \
737 PIN_OSPEED_HIGH(GPIOB_LED2) | \
738 PIN_OSPEED_HIGH(GPIOB_ARD_D15) | \
739 PIN_OSPEED_HIGH(GPIOB_ARD_D14) | \
740 PIN_OSPEED_HIGH(GPIOB_ZIO_D36) | \
741 PIN_OSPEED_HIGH(GPIOB_ZIO_D35) | \
742 PIN_OSPEED_HIGH(GPIOB_ZIO_D19) | \
743 PIN_OSPEED_HIGH(GPIOB_ZIO_D18) | \
744 PIN_OSPEED_HIGH(GPIOB_LED3) | \
745 PIN_OSPEED_HIGH(GPIOB_ZIO_D17))
746#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_ZIO_D33) | \
747 PIN_PUPDR_PULLUP(GPIOB_ZIO_A6) | \
748 PIN_PUPDR_PULLUP(GPIOB_ZIO_D27) | \
749 PIN_PUPDR_PULLUP(GPIOB_ZIO_D23) | \
750 PIN_PUPDR_PULLUP(GPIOB_ZIO_D25) | \
751 PIN_PUPDR_PULLUP(GPIOB_ZIO_D22) | \
752 PIN_PUPDR_PULLUP(GPIOB_ZIO_D26) | \
753 PIN_PUPDR_FLOATING(GPIOB_LED2) | \
754 PIN_PUPDR_PULLUP(GPIOB_ARD_D15) | \
755 PIN_PUPDR_PULLUP(GPIOB_ARD_D14) | \
756 PIN_PUPDR_PULLUP(GPIOB_ZIO_D36) | \
757 PIN_PUPDR_PULLUP(GPIOB_ZIO_D35) | \
758 PIN_PUPDR_PULLUP(GPIOB_ZIO_D19) | \
759 PIN_PUPDR_PULLUP(GPIOB_ZIO_D18) | \
760 PIN_PUPDR_FLOATING(GPIOB_LED3) | \
761 PIN_PUPDR_PULLUP(GPIOB_ZIO_D17))
762#define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_ZIO_D33) | \
763 PIN_ODR_HIGH(GPIOB_ZIO_A6) | \
764 PIN_ODR_HIGH(GPIOB_ZIO_D27) | \
765 PIN_ODR_HIGH(GPIOB_ZIO_D23) | \
766 PIN_ODR_HIGH(GPIOB_ZIO_D25) | \
767 PIN_ODR_HIGH(GPIOB_ZIO_D22) | \
768 PIN_ODR_HIGH(GPIOB_ZIO_D26) | \
769 PIN_ODR_LOW(GPIOB_LED2) | \
770 PIN_ODR_HIGH(GPIOB_ARD_D15) | \
771 PIN_ODR_HIGH(GPIOB_ARD_D14) | \
772 PIN_ODR_HIGH(GPIOB_ZIO_D36) | \
773 PIN_ODR_HIGH(GPIOB_ZIO_D35) | \
774 PIN_ODR_HIGH(GPIOB_ZIO_D19) | \
775 PIN_ODR_HIGH(GPIOB_ZIO_D18) | \
776 PIN_ODR_LOW(GPIOB_LED3) | \
777 PIN_ODR_HIGH(GPIOB_ZIO_D17))
778#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ZIO_D33, 0U) | \
779 PIN_AFIO_AF(GPIOB_ZIO_A6, 0U) | \
780 PIN_AFIO_AF(GPIOB_ZIO_D27, 0U) | \
781 PIN_AFIO_AF(GPIOB_ZIO_D23, 0U) | \
782 PIN_AFIO_AF(GPIOB_ZIO_D25, 0U) | \
783 PIN_AFIO_AF(GPIOB_ZIO_D22, 0U) | \
784 PIN_AFIO_AF(GPIOB_ZIO_D26, 0U) | \
785 PIN_AFIO_AF(GPIOB_LED2, 0U))
786#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) | \
787 PIN_AFIO_AF(GPIOB_ARD_D14, 0U) | \
788 PIN_AFIO_AF(GPIOB_ZIO_D36, 0U) | \
789 PIN_AFIO_AF(GPIOB_ZIO_D35, 0U) | \
790 PIN_AFIO_AF(GPIOB_ZIO_D19, 0U) | \
791 PIN_AFIO_AF(GPIOB_ZIO_D18, 11U) | \
792 PIN_AFIO_AF(GPIOB_LED3, 0U) | \
793 PIN_AFIO_AF(GPIOB_ZIO_D17, 0U))
794
795/*
796 * GPIOC setup:
797 *
798 * PC0 - ARD_A1 ADC123_IN10 (input pullup).
799 * PC1 - RMII_MDC (alternate 11).
800 * PC2 - ZIO_A7 ADC123_IN12 (input pullup).
801 * PC3 - ARD_A2 ADC123_IN13 (input pullup).
802 * PC4 - RMII_RXD0 (alternate 11).
803 * PC5 - RMII_RXD1 (alternate 11).
804 * PC6 - ZIO_D16 I2S2_MCK (input pullup).
805 * PC7 - ZIO_D21 I2S3_MCK (input pullup).
806 * PC8 - ZIO_D43 SDMMC_D0 (input pullup).
807 * PC9 - ZIO_D44 SDMMC_D1 (input pullup).
808 * PC10 - ZIO_D45 SDMMC_D2 (input pullup).
809 * PC11 - ZIO_D46 SDMMC_D3 (input pullup).
810 * PC12 - ZIO_D47 SDMMC_CK (input pullup).
811 * PC13 - BUTTON (input floating).
812 * PC14 - OSC32_IN (input floating).
813 * PC15 - OSC32_OUT (input floating).
814 */
815#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_ARD_A1) | \
816 PIN_MODE_ALTERNATE(GPIOC_RMII_MDC) | \
817 PIN_MODE_INPUT(GPIOC_ZIO_A7) | \
818 PIN_MODE_INPUT(GPIOC_ARD_A2) | \
819 PIN_MODE_ALTERNATE(GPIOC_RMII_RXD0) | \
820 PIN_MODE_ALTERNATE(GPIOC_RMII_RXD1) | \
821 PIN_MODE_INPUT(GPIOC_ZIO_D16) | \
822 PIN_MODE_INPUT(GPIOC_ZIO_D21) | \
823 PIN_MODE_INPUT(GPIOC_ZIO_D43) | \
824 PIN_MODE_INPUT(GPIOC_ZIO_D44) | \
825 PIN_MODE_INPUT(GPIOC_ZIO_D45) | \
826 PIN_MODE_INPUT(GPIOC_ZIO_D46) | \
827 PIN_MODE_INPUT(GPIOC_ZIO_D47) | \
828 PIN_MODE_INPUT(GPIOC_BUTTON) | \
829 PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
830 PIN_MODE_INPUT(GPIOC_OSC32_OUT))
831#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A1) | \
832 PIN_OTYPE_PUSHPULL(GPIOC_RMII_MDC) | \
833 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_A7) | \
834 PIN_OTYPE_PUSHPULL(GPIOC_ARD_A2) | \
835 PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD0) | \
836 PIN_OTYPE_PUSHPULL(GPIOC_RMII_RXD1) | \
837 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D16) | \
838 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D21) | \
839 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D43) | \
840 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D44) | \
841 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D45) | \
842 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D46) | \
843 PIN_OTYPE_PUSHPULL(GPIOC_ZIO_D47) | \
844 PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) | \
845 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
846 PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
847#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_ARD_A1) | \
848 PIN_OSPEED_HIGH(GPIOC_RMII_MDC) | \
849 PIN_OSPEED_HIGH(GPIOC_ZIO_A7) | \
850 PIN_OSPEED_HIGH(GPIOC_ARD_A2) | \
851 PIN_OSPEED_HIGH(GPIOC_RMII_RXD0) | \
852 PIN_OSPEED_HIGH(GPIOC_RMII_RXD1) | \
853 PIN_OSPEED_HIGH(GPIOC_ZIO_D16) | \
854 PIN_OSPEED_HIGH(GPIOC_ZIO_D21) | \
855 PIN_OSPEED_HIGH(GPIOC_ZIO_D43) | \
856 PIN_OSPEED_HIGH(GPIOC_ZIO_D44) | \
857 PIN_OSPEED_HIGH(GPIOC_ZIO_D45) | \
858 PIN_OSPEED_HIGH(GPIOC_ZIO_D46) | \
859 PIN_OSPEED_HIGH(GPIOC_ZIO_D47) | \
860 PIN_OSPEED_HIGH(GPIOC_BUTTON) | \
861 PIN_OSPEED_VERYLOW(GPIOC_OSC32_IN) | \
862 PIN_OSPEED_VERYLOW(GPIOC_OSC32_OUT))
863#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_ARD_A1) | \
864 PIN_PUPDR_FLOATING(GPIOC_RMII_MDC) | \
865 PIN_PUPDR_PULLUP(GPIOC_ZIO_A7) | \
866 PIN_PUPDR_PULLUP(GPIOC_ARD_A2) | \
867 PIN_PUPDR_FLOATING(GPIOC_RMII_RXD0) | \
868 PIN_PUPDR_FLOATING(GPIOC_RMII_RXD1) | \
869 PIN_PUPDR_PULLUP(GPIOC_ZIO_D16) | \
870 PIN_PUPDR_PULLUP(GPIOC_ZIO_D21) | \
871 PIN_PUPDR_PULLUP(GPIOC_ZIO_D43) | \
872 PIN_PUPDR_PULLUP(GPIOC_ZIO_D44) | \
873 PIN_PUPDR_PULLUP(GPIOC_ZIO_D45) | \
874 PIN_PUPDR_PULLUP(GPIOC_ZIO_D46) | \
875 PIN_PUPDR_PULLUP(GPIOC_ZIO_D47) | \
876 PIN_PUPDR_FLOATING(GPIOC_BUTTON) | \
877 PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
878 PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
879#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_ARD_A1) | \
880 PIN_ODR_HIGH(GPIOC_RMII_MDC) | \
881 PIN_ODR_HIGH(GPIOC_ZIO_A7) | \
882 PIN_ODR_HIGH(GPIOC_ARD_A2) | \
883 PIN_ODR_HIGH(GPIOC_RMII_RXD0) | \
884 PIN_ODR_HIGH(GPIOC_RMII_RXD1) | \
885 PIN_ODR_HIGH(GPIOC_ZIO_D16) | \
886 PIN_ODR_HIGH(GPIOC_ZIO_D21) | \
887 PIN_ODR_HIGH(GPIOC_ZIO_D43) | \
888 PIN_ODR_HIGH(GPIOC_ZIO_D44) | \
889 PIN_ODR_HIGH(GPIOC_ZIO_D45) | \
890 PIN_ODR_HIGH(GPIOC_ZIO_D46) | \
891 PIN_ODR_HIGH(GPIOC_ZIO_D47) | \
892 PIN_ODR_HIGH(GPIOC_BUTTON) | \
893 PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
894 PIN_ODR_HIGH(GPIOC_OSC32_OUT))
895#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_ARD_A1, 0U) | \
896 PIN_AFIO_AF(GPIOC_RMII_MDC, 11U) | \
897 PIN_AFIO_AF(GPIOC_ZIO_A7, 0U) | \
898 PIN_AFIO_AF(GPIOC_ARD_A2, 0U) | \
899 PIN_AFIO_AF(GPIOC_RMII_RXD0, 11U) | \
900 PIN_AFIO_AF(GPIOC_RMII_RXD1, 11U) | \
901 PIN_AFIO_AF(GPIOC_ZIO_D16, 0U) | \
902 PIN_AFIO_AF(GPIOC_ZIO_D21, 0U))
903#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_ZIO_D43, 0U) | \
904 PIN_AFIO_AF(GPIOC_ZIO_D44, 0U) | \
905 PIN_AFIO_AF(GPIOC_ZIO_D45, 0U) | \
906 PIN_AFIO_AF(GPIOC_ZIO_D46, 0U) | \
907 PIN_AFIO_AF(GPIOC_ZIO_D47, 0U) | \
908 PIN_AFIO_AF(GPIOC_BUTTON, 0U) | \
909 PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
910 PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
911
912/*
913 * GPIOD setup:
914 *
915 * PD0 - ZIO_D67 CAN1_RX (input pullup).
916 * PD1 - ZIO_D66 CAN1_TX (input pullup).
917 * PD2 - ZIO_D48 SDMMC_CMD (input pullup).
918 * PD3 - ZIO_D55 USART2_CTS (input pullup).
919 * PD4 - ZIO_D54 USART2_RTS (input pullup).
920 * PD5 - ZIO_D53 USART2_TX (input pullup).
921 * PD6 - ZIO_D52 USART2_RX (input pullup).
922 * PD7 - ZIO_D51 USART2_SCLK (input pullup).
923 * PD8 - USART3_RX STLK_RX (alternate 7).
924 * PD9 - USART3_TX STLK_TX (alternate 7).
925 * PD10 - PIN10 (input pullup).
926 * PD11 - ZIO_D30 QSPI_BK1_IO0 (input pullup).
927 * PD12 - ZIO_D29 QSPI_BK1_IO1 (input pullup).
928 * PD13 - ZIO_D28 QSPI_BK1_IO3 (input pullup).
929 * PD14 - ARD_D10 SPI1_NSS (input pullup).
930 * PD15 - ARD_D9 TIM4_CH4 (input pullup).
931 */
932#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_ZIO_D67) | \
933 PIN_MODE_INPUT(GPIOD_ZIO_D66) | \
934 PIN_MODE_INPUT(GPIOD_ZIO_D48) | \
935 PIN_MODE_INPUT(GPIOD_ZIO_D55) | \
936 PIN_MODE_INPUT(GPIOD_ZIO_D54) | \
937 PIN_MODE_INPUT(GPIOD_ZIO_D53) | \
938 PIN_MODE_INPUT(GPIOD_ZIO_D52) | \
939 PIN_MODE_INPUT(GPIOD_ZIO_D51) | \
940 PIN_MODE_ALTERNATE(GPIOD_USART3_RX) | \
941 PIN_MODE_ALTERNATE(GPIOD_USART3_TX) | \
942 PIN_MODE_INPUT(GPIOD_PIN10) | \
943 PIN_MODE_INPUT(GPIOD_ZIO_D30) | \
944 PIN_MODE_INPUT(GPIOD_ZIO_D29) | \
945 PIN_MODE_INPUT(GPIOD_ZIO_D28) | \
946 PIN_MODE_INPUT(GPIOD_ARD_D10) | \
947 PIN_MODE_INPUT(GPIOD_ARD_D9))
948#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D67) | \
949 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D66) | \
950 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D48) | \
951 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D55) | \
952 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D54) | \
953 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D53) | \
954 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D52) | \
955 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D51) | \
956 PIN_OTYPE_PUSHPULL(GPIOD_USART3_RX) | \
957 PIN_OTYPE_PUSHPULL(GPIOD_USART3_TX) | \
958 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
959 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D30) | \
960 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D29) | \
961 PIN_OTYPE_PUSHPULL(GPIOD_ZIO_D28) | \
962 PIN_OTYPE_PUSHPULL(GPIOD_ARD_D10) | \
963 PIN_OTYPE_PUSHPULL(GPIOD_ARD_D9))
964#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_ZIO_D67) | \
965 PIN_OSPEED_HIGH(GPIOD_ZIO_D66) | \
966 PIN_OSPEED_HIGH(GPIOD_ZIO_D48) | \
967 PIN_OSPEED_HIGH(GPIOD_ZIO_D55) | \
968 PIN_OSPEED_HIGH(GPIOD_ZIO_D54) | \
969 PIN_OSPEED_HIGH(GPIOD_ZIO_D53) | \
970 PIN_OSPEED_HIGH(GPIOD_ZIO_D52) | \
971 PIN_OSPEED_HIGH(GPIOD_ZIO_D51) | \
972 PIN_OSPEED_HIGH(GPIOD_USART3_RX) | \
973 PIN_OSPEED_HIGH(GPIOD_USART3_TX) | \
974 PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
975 PIN_OSPEED_HIGH(GPIOD_ZIO_D30) | \
976 PIN_OSPEED_HIGH(GPIOD_ZIO_D29) | \
977 PIN_OSPEED_HIGH(GPIOD_ZIO_D28) | \
978 PIN_OSPEED_HIGH(GPIOD_ARD_D10) | \
979 PIN_OSPEED_HIGH(GPIOD_ARD_D9))
980#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_ZIO_D67) | \
981 PIN_PUPDR_PULLUP(GPIOD_ZIO_D66) | \
982 PIN_PUPDR_PULLUP(GPIOD_ZIO_D48) | \
983 PIN_PUPDR_PULLUP(GPIOD_ZIO_D55) | \
984 PIN_PUPDR_PULLUP(GPIOD_ZIO_D54) | \
985 PIN_PUPDR_PULLUP(GPIOD_ZIO_D53) | \
986 PIN_PUPDR_PULLUP(GPIOD_ZIO_D52) | \
987 PIN_PUPDR_PULLUP(GPIOD_ZIO_D51) | \
988 PIN_PUPDR_FLOATING(GPIOD_USART3_RX) | \
989 PIN_PUPDR_FLOATING(GPIOD_USART3_TX) | \
990 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
991 PIN_PUPDR_PULLUP(GPIOD_ZIO_D30) | \
992 PIN_PUPDR_PULLUP(GPIOD_ZIO_D29) | \
993 PIN_PUPDR_PULLUP(GPIOD_ZIO_D28) | \
994 PIN_PUPDR_PULLUP(GPIOD_ARD_D10) | \
995 PIN_PUPDR_PULLUP(GPIOD_ARD_D9))
996#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_ZIO_D67) | \
997 PIN_ODR_HIGH(GPIOD_ZIO_D66) | \
998 PIN_ODR_HIGH(GPIOD_ZIO_D48) | \
999 PIN_ODR_HIGH(GPIOD_ZIO_D55) | \
1000 PIN_ODR_HIGH(GPIOD_ZIO_D54) | \
1001 PIN_ODR_HIGH(GPIOD_ZIO_D53) | \
1002 PIN_ODR_HIGH(GPIOD_ZIO_D52) | \
1003 PIN_ODR_HIGH(GPIOD_ZIO_D51) | \
1004 PIN_ODR_HIGH(GPIOD_USART3_RX) | \
1005 PIN_ODR_HIGH(GPIOD_USART3_TX) | \
1006 PIN_ODR_HIGH(GPIOD_PIN10) | \
1007 PIN_ODR_HIGH(GPIOD_ZIO_D30) | \
1008 PIN_ODR_HIGH(GPIOD_ZIO_D29) | \
1009 PIN_ODR_HIGH(GPIOD_ZIO_D28) | \
1010 PIN_ODR_HIGH(GPIOD_ARD_D10) | \
1011 PIN_ODR_HIGH(GPIOD_ARD_D9))
1012#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_ZIO_D67, 0U) | \
1013 PIN_AFIO_AF(GPIOD_ZIO_D66, 0U) | \
1014 PIN_AFIO_AF(GPIOD_ZIO_D48, 0U) | \
1015 PIN_AFIO_AF(GPIOD_ZIO_D55, 0U) | \
1016 PIN_AFIO_AF(GPIOD_ZIO_D54, 0U) | \
1017 PIN_AFIO_AF(GPIOD_ZIO_D53, 0U) | \
1018 PIN_AFIO_AF(GPIOD_ZIO_D52, 0U) | \
1019 PIN_AFIO_AF(GPIOD_ZIO_D51, 0U))
1020#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_USART3_RX, 7U) | \
1021 PIN_AFIO_AF(GPIOD_USART3_TX, 7U) | \
1022 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
1023 PIN_AFIO_AF(GPIOD_ZIO_D30, 0U) | \
1024 PIN_AFIO_AF(GPIOD_ZIO_D29, 0U) | \
1025 PIN_AFIO_AF(GPIOD_ZIO_D28, 0U) | \
1026 PIN_AFIO_AF(GPIOD_ARD_D10, 0U) | \
1027 PIN_AFIO_AF(GPIOD_ARD_D9, 0U))
1028
1029/*
1030 * GPIOE setup:
1031 *
1032 * PE0 - ZIO_D34 TIM4_ETR (input pullup).
1033 * PE1 - PIN1 (input pullup).
1034 * PE2 - ZIO_D31 ZIO_D56 SAI1_MCLK_A(input pullup).
1035 * PE3 - ZIO_D60 SAI1_SD_B (input pullup).
1036 * PE4 - ZIO_D57 SAI1_FS_A (input pullup).
1037 * PE5 - ZIO_D58 SAI1_SCK_A (input pullup).
1038 * PE6 - ZIO_D59 SAI1_SD_A (input pullup).
1039 * PE7 - ZIO_D41 TIM1_ETR (input pullup).
1040 * PE8 - ZIO_D42 TIM1_CH1N (input pullup).
1041 * PE9 - ARD_D6 TIM1_CH1 (input pullup).
1042 * PE10 - ZIO_D40 TIM1_CH2N (input pullup).
1043 * PE11 - ARD_D5 TIM1_CH2 (input pullup).
1044 * PE12 - ZIO_D39 TIM1_CH3N (input pullup).
1045 * PE13 - ARD_D3 TIM1_CH3 (input pullup).
1046 * PE14 - ZIO_D38 (input pullup).
1047 * PE15 - ZIO_D37 TIM1_BKIN1 (input pullup).
1048 */
1049#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_ZIO_D34) | \
1050 PIN_MODE_INPUT(GPIOE_PIN1) | \
1051 PIN_MODE_INPUT(GPIOE_ZIO_D31) | \
1052 PIN_MODE_INPUT(GPIOE_ZIO_D60) | \
1053 PIN_MODE_INPUT(GPIOE_ZIO_D57) | \
1054 PIN_MODE_INPUT(GPIOE_ZIO_D58) | \
1055 PIN_MODE_INPUT(GPIOE_ZIO_D59) | \
1056 PIN_MODE_INPUT(GPIOE_ZIO_D41) | \
1057 PIN_MODE_INPUT(GPIOE_ZIO_D42) | \
1058 PIN_MODE_INPUT(GPIOE_ARD_D6) | \
1059 PIN_MODE_INPUT(GPIOE_ZIO_D40) | \
1060 PIN_MODE_INPUT(GPIOE_ARD_D5) | \
1061 PIN_MODE_INPUT(GPIOE_ZIO_D39) | \
1062 PIN_MODE_INPUT(GPIOE_ARD_D3) | \
1063 PIN_MODE_INPUT(GPIOE_ZIO_D38) | \
1064 PIN_MODE_INPUT(GPIOE_ZIO_D37))
1065#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D34) | \
1066 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
1067 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D31) | \
1068 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D60) | \
1069 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D57) | \
1070 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D58) | \
1071 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D59) | \
1072 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D41) | \
1073 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D42) | \
1074 PIN_OTYPE_PUSHPULL(GPIOE_ARD_D6) | \
1075 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D40) | \
1076 PIN_OTYPE_PUSHPULL(GPIOE_ARD_D5) | \
1077 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D39) | \
1078 PIN_OTYPE_PUSHPULL(GPIOE_ARD_D3) | \
1079 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D38) | \
1080 PIN_OTYPE_PUSHPULL(GPIOE_ZIO_D37))
1081#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_ZIO_D34) | \
1082 PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \
1083 PIN_OSPEED_HIGH(GPIOE_ZIO_D31) | \
1084 PIN_OSPEED_HIGH(GPIOE_ZIO_D60) | \
1085 PIN_OSPEED_HIGH(GPIOE_ZIO_D57) | \
1086 PIN_OSPEED_HIGH(GPIOE_ZIO_D58) | \
1087 PIN_OSPEED_HIGH(GPIOE_ZIO_D59) | \
1088 PIN_OSPEED_HIGH(GPIOE_ZIO_D41) | \
1089 PIN_OSPEED_HIGH(GPIOE_ZIO_D42) | \
1090 PIN_OSPEED_HIGH(GPIOE_ARD_D6) | \
1091 PIN_OSPEED_HIGH(GPIOE_ZIO_D40) | \
1092 PIN_OSPEED_HIGH(GPIOE_ARD_D5) | \
1093 PIN_OSPEED_HIGH(GPIOE_ZIO_D39) | \
1094 PIN_OSPEED_HIGH(GPIOE_ARD_D3) | \
1095 PIN_OSPEED_VERYLOW(GPIOE_ZIO_D38) | \
1096 PIN_OSPEED_HIGH(GPIOE_ZIO_D37))
1097#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_ZIO_D34) | \
1098 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
1099 PIN_PUPDR_PULLUP(GPIOE_ZIO_D31) | \
1100 PIN_PUPDR_PULLUP(GPIOE_ZIO_D60) | \
1101 PIN_PUPDR_PULLUP(GPIOE_ZIO_D57) | \
1102 PIN_PUPDR_PULLUP(GPIOE_ZIO_D58) | \
1103 PIN_PUPDR_PULLUP(GPIOE_ZIO_D59) | \
1104 PIN_PUPDR_PULLUP(GPIOE_ZIO_D41) | \
1105 PIN_PUPDR_PULLUP(GPIOE_ZIO_D42) | \
1106 PIN_PUPDR_PULLUP(GPIOE_ARD_D6) | \
1107 PIN_PUPDR_PULLUP(GPIOE_ZIO_D40) | \
1108 PIN_PUPDR_PULLUP(GPIOE_ARD_D5) | \
1109 PIN_PUPDR_PULLUP(GPIOE_ZIO_D39) | \
1110 PIN_PUPDR_PULLUP(GPIOE_ARD_D3) | \
1111 PIN_PUPDR_PULLUP(GPIOE_ZIO_D38) | \
1112 PIN_PUPDR_PULLUP(GPIOE_ZIO_D37))
1113#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_ZIO_D34) | \
1114 PIN_ODR_HIGH(GPIOE_PIN1) | \
1115 PIN_ODR_HIGH(GPIOE_ZIO_D31) | \
1116 PIN_ODR_HIGH(GPIOE_ZIO_D60) | \
1117 PIN_ODR_HIGH(GPIOE_ZIO_D57) | \
1118 PIN_ODR_HIGH(GPIOE_ZIO_D58) | \
1119 PIN_ODR_HIGH(GPIOE_ZIO_D59) | \
1120 PIN_ODR_HIGH(GPIOE_ZIO_D41) | \
1121 PIN_ODR_HIGH(GPIOE_ZIO_D42) | \
1122 PIN_ODR_HIGH(GPIOE_ARD_D6) | \
1123 PIN_ODR_HIGH(GPIOE_ZIO_D40) | \
1124 PIN_ODR_HIGH(GPIOE_ARD_D5) | \
1125 PIN_ODR_HIGH(GPIOE_ZIO_D39) | \
1126 PIN_ODR_HIGH(GPIOE_ARD_D3) | \
1127 PIN_ODR_HIGH(GPIOE_ZIO_D38) | \
1128 PIN_ODR_HIGH(GPIOE_ZIO_D37))
1129#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_ZIO_D34, 0U) | \
1130 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
1131 PIN_AFIO_AF(GPIOE_ZIO_D31, 0U) | \
1132 PIN_AFIO_AF(GPIOE_ZIO_D60, 0U) | \
1133 PIN_AFIO_AF(GPIOE_ZIO_D57, 0U) | \
1134 PIN_AFIO_AF(GPIOE_ZIO_D58, 0U) | \
1135 PIN_AFIO_AF(GPIOE_ZIO_D59, 0U) | \
1136 PIN_AFIO_AF(GPIOE_ZIO_D41, 0U))
1137#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_ZIO_D42, 0U) | \
1138 PIN_AFIO_AF(GPIOE_ARD_D6, 0U) | \
1139 PIN_AFIO_AF(GPIOE_ZIO_D40, 0U) | \
1140 PIN_AFIO_AF(GPIOE_ARD_D5, 0U) | \
1141 PIN_AFIO_AF(GPIOE_ZIO_D39, 0U) | \
1142 PIN_AFIO_AF(GPIOE_ARD_D3, 0U) | \
1143 PIN_AFIO_AF(GPIOE_ZIO_D38, 0U) | \
1144 PIN_AFIO_AF(GPIOE_ZIO_D37, 0U))
1145
1146/*
1147 * GPIOF setup:
1148 *
1149 * PF0 - ZIO_D68 I2C2_SDA (input pullup).
1150 * PF1 - ZIO_D69 I2C2_SCL (input pullup).
1151 * PF2 - ZIO_D70 I2C2_SMBA (input pullup).
1152 * PF3 - ARD_A3 ADC3_IN9 (input pullup).
1153 * PF4 - ZIO_A8 ADC3_IN14 (input pullup).
1154 * PF5 - ARD_A4 ADC3_IN15 (input pullup).
1155 * PF6 - PIN6 (input pullup).
1156 * PF7 - ZIO_D62 SAI1_MCLK_B (input pullup).
1157 * PF8 - ZIO_D61 SAI1_SCK_B (input pullup).
1158 * PF9 - ZIO_D63 SAI1_FS_B (input pullup).
1159 * PF10 - ARD_A5 ADC3_IN8 (input pullup).
1160 * PF11 - PIN11 (input pullup).
1161 * PF12 - ARD_D8 (input pullup).
1162 * PF13 - ARD_D7 (input pullup).
1163 * PF14 - ARD_D4 (input pullup).
1164 * PF15 - ARD_D2 (input pullup).
1165 */
1166#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ZIO_D68) | \
1167 PIN_MODE_INPUT(GPIOF_ZIO_D69) | \
1168 PIN_MODE_INPUT(GPIOF_ZIO_D70) | \
1169 PIN_MODE_INPUT(GPIOF_ARD_A3) | \
1170 PIN_MODE_INPUT(GPIOF_ZIO_A8) | \
1171 PIN_MODE_INPUT(GPIOF_ARD_A4) | \
1172 PIN_MODE_INPUT(GPIOF_PIN6) | \
1173 PIN_MODE_INPUT(GPIOF_ZIO_D62) | \
1174 PIN_MODE_INPUT(GPIOF_ZIO_D61) | \
1175 PIN_MODE_INPUT(GPIOF_ZIO_D63) | \
1176 PIN_MODE_INPUT(GPIOF_ARD_A5) | \
1177 PIN_MODE_INPUT(GPIOF_PIN11) | \
1178 PIN_MODE_INPUT(GPIOF_ARD_D8) | \
1179 PIN_MODE_INPUT(GPIOF_ARD_D7) | \
1180 PIN_MODE_INPUT(GPIOF_ARD_D4) | \
1181 PIN_MODE_INPUT(GPIOF_ARD_D2))
1182#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D68) | \
1183 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D69) | \
1184 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D70) | \
1185 PIN_OTYPE_PUSHPULL(GPIOF_ARD_A3) | \
1186 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_A8) | \
1187 PIN_OTYPE_PUSHPULL(GPIOF_ARD_A4) | \
1188 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
1189 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D62) | \
1190 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D61) | \
1191 PIN_OTYPE_PUSHPULL(GPIOF_ZIO_D63) | \
1192 PIN_OTYPE_PUSHPULL(GPIOF_ARD_A5) | \
1193 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
1194 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
1195 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
1196 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D4) | \
1197 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D2))
1198#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ZIO_D68) | \
1199 PIN_OSPEED_HIGH(GPIOF_ZIO_D69) | \
1200 PIN_OSPEED_HIGH(GPIOF_ZIO_D70) | \
1201 PIN_OSPEED_HIGH(GPIOF_ARD_A3) | \
1202 PIN_OSPEED_HIGH(GPIOF_ZIO_A8) | \
1203 PIN_OSPEED_HIGH(GPIOF_ARD_A4) | \
1204 PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
1205 PIN_OSPEED_HIGH(GPIOF_ZIO_D62) | \
1206 PIN_OSPEED_HIGH(GPIOF_ZIO_D61) | \
1207 PIN_OSPEED_HIGH(GPIOF_ZIO_D63) | \
1208 PIN_OSPEED_HIGH(GPIOF_ARD_A5) | \
1209 PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
1210 PIN_OSPEED_VERYLOW(GPIOF_ARD_D8) | \
1211 PIN_OSPEED_VERYLOW(GPIOF_ARD_D7) | \
1212 PIN_OSPEED_VERYLOW(GPIOF_ARD_D4) | \
1213 PIN_OSPEED_VERYLOW(GPIOF_ARD_D2))
1214#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ZIO_D68) | \
1215 PIN_PUPDR_PULLUP(GPIOF_ZIO_D69) | \
1216 PIN_PUPDR_PULLUP(GPIOF_ZIO_D70) | \
1217 PIN_PUPDR_PULLUP(GPIOF_ARD_A3) | \
1218 PIN_PUPDR_PULLUP(GPIOF_ZIO_A8) | \
1219 PIN_PUPDR_PULLUP(GPIOF_ARD_A4) | \
1220 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
1221 PIN_PUPDR_PULLUP(GPIOF_ZIO_D62) | \
1222 PIN_PUPDR_PULLUP(GPIOF_ZIO_D61) | \
1223 PIN_PUPDR_PULLUP(GPIOF_ZIO_D63) | \
1224 PIN_PUPDR_PULLUP(GPIOF_ARD_A5) | \
1225 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
1226 PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
1227 PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
1228 PIN_PUPDR_PULLUP(GPIOF_ARD_D4) | \
1229 PIN_PUPDR_PULLUP(GPIOF_ARD_D2))
1230#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ZIO_D68) | \
1231 PIN_ODR_HIGH(GPIOF_ZIO_D69) | \
1232 PIN_ODR_HIGH(GPIOF_ZIO_D70) | \
1233 PIN_ODR_HIGH(GPIOF_ARD_A3) | \
1234 PIN_ODR_HIGH(GPIOF_ZIO_A8) | \
1235 PIN_ODR_HIGH(GPIOF_ARD_A4) | \
1236 PIN_ODR_HIGH(GPIOF_PIN6) | \
1237 PIN_ODR_HIGH(GPIOF_ZIO_D62) | \
1238 PIN_ODR_HIGH(GPIOF_ZIO_D61) | \
1239 PIN_ODR_HIGH(GPIOF_ZIO_D63) | \
1240 PIN_ODR_HIGH(GPIOF_ARD_A5) | \
1241 PIN_ODR_HIGH(GPIOF_PIN11) | \
1242 PIN_ODR_HIGH(GPIOF_ARD_D8) | \
1243 PIN_ODR_HIGH(GPIOF_ARD_D7) | \
1244 PIN_ODR_HIGH(GPIOF_ARD_D4) | \
1245 PIN_ODR_HIGH(GPIOF_ARD_D2))
1246#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ZIO_D68, 0U) | \
1247 PIN_AFIO_AF(GPIOF_ZIO_D69, 0U) | \
1248 PIN_AFIO_AF(GPIOF_ZIO_D70, 0U) | \
1249 PIN_AFIO_AF(GPIOF_ARD_A3, 0U) | \
1250 PIN_AFIO_AF(GPIOF_ZIO_A8, 0U) | \
1251 PIN_AFIO_AF(GPIOF_ARD_A4, 0U) | \
1252 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
1253 PIN_AFIO_AF(GPIOF_ZIO_D62, 0U))
1254#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_ZIO_D61, 0U) | \
1255 PIN_AFIO_AF(GPIOF_ZIO_D63, 0U) | \
1256 PIN_AFIO_AF(GPIOF_ARD_A5, 0U) | \
1257 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
1258 PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \
1259 PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \
1260 PIN_AFIO_AF(GPIOF_ARD_D4, 0U) | \
1261 PIN_AFIO_AF(GPIOF_ARD_D2, 0U))
1262
1263/*
1264 * GPIOG setup:
1265 *
1266 * PG0 - ZIO_D65 (input pullup).
1267 * PG1 - ZIO_D64 (input pullup).
1268 * PG2 - ZIO_D49 (input pullup).
1269 * PG3 - ZIO_D50 (input pullup).
1270 * PG4 - PIN4 (input pullup).
1271 * PG5 - PIN5 (input pullup).
1272 * PG6 - USB_GPIO_OUT (input pullup).
1273 * PG7 - USB_GPIO_IN (input pullup).
1274 * PG8 - PIN8 (input pullup).
1275 * PG9 - ARD_D0 USART6_RX (input pullup).
1276 * PG10 - PIN10 (input pullup).
1277 * PG11 - RMII_TX_EN (alternate 11).
1278 * PG12 - PIN12 (input pullup).
1279 * PG13 - RMII_TXD0 (alternate 11).
1280 * PG14 - ARD_D1 USART6_TX (input pullup).
1281 * PG15 - PIN15 (input pullup).
1282 */
1283#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_ZIO_D65) | \
1284 PIN_MODE_INPUT(GPIOG_ZIO_D64) | \
1285 PIN_MODE_INPUT(GPIOG_ZIO_D49) | \
1286 PIN_MODE_INPUT(GPIOG_ZIO_D50) | \
1287 PIN_MODE_INPUT(GPIOG_PIN4) | \
1288 PIN_MODE_INPUT(GPIOG_PIN5) | \
1289 PIN_MODE_INPUT(GPIOG_USB_GPIO_OUT) | \
1290 PIN_MODE_INPUT(GPIOG_USB_GPIO_IN) | \
1291 PIN_MODE_INPUT(GPIOG_PIN8) | \
1292 PIN_MODE_INPUT(GPIOG_ARD_D0) | \
1293 PIN_MODE_INPUT(GPIOG_PIN10) | \
1294 PIN_MODE_ALTERNATE(GPIOG_RMII_TX_EN) | \
1295 PIN_MODE_INPUT(GPIOG_PIN12) | \
1296 PIN_MODE_ALTERNATE(GPIOG_RMII_TXD0) | \
1297 PIN_MODE_INPUT(GPIOG_ARD_D1) | \
1298 PIN_MODE_INPUT(GPIOG_PIN15))
1299#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D65) | \
1300 PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D64) | \
1301 PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D49) | \
1302 PIN_OTYPE_PUSHPULL(GPIOG_ZIO_D50) | \
1303 PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
1304 PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
1305 PIN_OTYPE_PUSHPULL(GPIOG_USB_GPIO_OUT) |\
1306 PIN_OTYPE_PUSHPULL(GPIOG_USB_GPIO_IN) |\
1307 PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
1308 PIN_OTYPE_PUSHPULL(GPIOG_ARD_D0) | \
1309 PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
1310 PIN_OTYPE_PUSHPULL(GPIOG_RMII_TX_EN) | \
1311 PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
1312 PIN_OTYPE_PUSHPULL(GPIOG_RMII_TXD0) | \
1313 PIN_OTYPE_PUSHPULL(GPIOG_ARD_D1) | \
1314 PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
1315#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_ZIO_D65) | \
1316 PIN_OSPEED_VERYLOW(GPIOG_ZIO_D64) | \
1317 PIN_OSPEED_VERYLOW(GPIOG_ZIO_D49) | \
1318 PIN_OSPEED_VERYLOW(GPIOG_ZIO_D50) | \
1319 PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
1320 PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
1321 PIN_OSPEED_HIGH(GPIOG_USB_GPIO_OUT) | \
1322 PIN_OSPEED_HIGH(GPIOG_USB_GPIO_IN) | \
1323 PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
1324 PIN_OSPEED_HIGH(GPIOG_ARD_D0) | \
1325 PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
1326 PIN_OSPEED_HIGH(GPIOG_RMII_TX_EN) | \
1327 PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
1328 PIN_OSPEED_HIGH(GPIOG_RMII_TXD0) | \
1329 PIN_OSPEED_HIGH(GPIOG_ARD_D1) | \
1330 PIN_OSPEED_VERYLOW(GPIOG_PIN15))
1331#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_ZIO_D65) | \
1332 PIN_PUPDR_PULLUP(GPIOG_ZIO_D64) | \
1333 PIN_PUPDR_PULLUP(GPIOG_ZIO_D49) | \
1334 PIN_PUPDR_PULLUP(GPIOG_ZIO_D50) | \
1335 PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
1336 PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
1337 PIN_PUPDR_PULLUP(GPIOG_USB_GPIO_OUT) | \
1338 PIN_PUPDR_PULLUP(GPIOG_USB_GPIO_IN) | \
1339 PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
1340 PIN_PUPDR_PULLUP(GPIOG_ARD_D0) | \
1341 PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
1342 PIN_PUPDR_FLOATING(GPIOG_RMII_TX_EN) | \
1343 PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
1344 PIN_PUPDR_FLOATING(GPIOG_RMII_TXD0) | \
1345 PIN_PUPDR_PULLUP(GPIOG_ARD_D1) | \
1346 PIN_PUPDR_PULLUP(GPIOG_PIN15))
1347#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_ZIO_D65) | \
1348 PIN_ODR_HIGH(GPIOG_ZIO_D64) | \
1349 PIN_ODR_HIGH(GPIOG_ZIO_D49) | \
1350 PIN_ODR_HIGH(GPIOG_ZIO_D50) | \
1351 PIN_ODR_HIGH(GPIOG_PIN4) | \
1352 PIN_ODR_HIGH(GPIOG_PIN5) | \
1353 PIN_ODR_HIGH(GPIOG_USB_GPIO_OUT) | \
1354 PIN_ODR_HIGH(GPIOG_USB_GPIO_IN) | \
1355 PIN_ODR_HIGH(GPIOG_PIN8) | \
1356 PIN_ODR_HIGH(GPIOG_ARD_D0) | \
1357 PIN_ODR_HIGH(GPIOG_PIN10) | \
1358 PIN_ODR_HIGH(GPIOG_RMII_TX_EN) | \
1359 PIN_ODR_HIGH(GPIOG_PIN12) | \
1360 PIN_ODR_HIGH(GPIOG_RMII_TXD0) | \
1361 PIN_ODR_HIGH(GPIOG_ARD_D1) | \
1362 PIN_ODR_HIGH(GPIOG_PIN15))
1363#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_ZIO_D65, 0U) | \
1364 PIN_AFIO_AF(GPIOG_ZIO_D64, 0U) | \
1365 PIN_AFIO_AF(GPIOG_ZIO_D49, 0U) | \
1366 PIN_AFIO_AF(GPIOG_ZIO_D50, 0U) | \
1367 PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
1368 PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
1369 PIN_AFIO_AF(GPIOG_USB_GPIO_OUT, 0U) | \
1370 PIN_AFIO_AF(GPIOG_USB_GPIO_IN, 0U))
1371#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
1372 PIN_AFIO_AF(GPIOG_ARD_D0, 0U) | \
1373 PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
1374 PIN_AFIO_AF(GPIOG_RMII_TX_EN, 11U) | \
1375 PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
1376 PIN_AFIO_AF(GPIOG_RMII_TXD0, 11U) | \
1377 PIN_AFIO_AF(GPIOG_ARD_D1, 0U) | \
1378 PIN_AFIO_AF(GPIOG_PIN15, 0U))
1379
1380/*
1381 * GPIOH setup:
1382 *
1383 * PH0 - OSC_IN (input floating).
1384 * PH1 - OSC_OUT (input floating).
1385 * PH2 - PIN2 (input pullup).
1386 * PH3 - PIN3 (input pullup).
1387 * PH4 - PIN4 (input pullup).
1388 * PH5 - PIN5 (input pullup).
1389 * PH6 - PIN6 (input pullup).
1390 * PH7 - PIN7 (input pullup).
1391 * PH8 - PIN8 (input pullup).
1392 * PH9 - PIN9 (input pullup).
1393 * PH10 - PIN10 (input pullup).
1394 * PH11 - PIN11 (input pullup).
1395 * PH12 - PIN12 (input pullup).
1396 * PH13 - PIN13 (input pullup).
1397 * PH14 - PIN14 (input pullup).
1398 * PH15 - PIN15 (input pullup).
1399 */
1400#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
1401 PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
1402 PIN_MODE_INPUT(GPIOH_PIN2) | \
1403 PIN_MODE_INPUT(GPIOH_PIN3) | \
1404 PIN_MODE_INPUT(GPIOH_PIN4) | \
1405 PIN_MODE_INPUT(GPIOH_PIN5) | \
1406 PIN_MODE_INPUT(GPIOH_PIN6) | \
1407 PIN_MODE_INPUT(GPIOH_PIN7) | \
1408 PIN_MODE_INPUT(GPIOH_PIN8) | \
1409 PIN_MODE_INPUT(GPIOH_PIN9) | \
1410 PIN_MODE_INPUT(GPIOH_PIN10) | \
1411 PIN_MODE_INPUT(GPIOH_PIN11) | \
1412 PIN_MODE_INPUT(GPIOH_PIN12) | \
1413 PIN_MODE_INPUT(GPIOH_PIN13) | \
1414 PIN_MODE_INPUT(GPIOH_PIN14) | \
1415 PIN_MODE_INPUT(GPIOH_PIN15))
1416#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
1417 PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \
1418 PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
1419 PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
1420 PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
1421 PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
1422 PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
1423 PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
1424 PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
1425 PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
1426 PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
1427 PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
1428 PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
1429 PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
1430 PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
1431 PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
1432#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \
1433 PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \
1434 PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
1435 PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
1436 PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
1437 PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
1438 PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
1439 PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
1440 PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
1441 PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
1442 PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
1443 PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
1444 PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
1445 PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
1446 PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
1447 PIN_OSPEED_VERYLOW(GPIOH_PIN15))
1448#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
1449 PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \
1450 PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
1451 PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
1452 PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
1453 PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
1454 PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
1455 PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
1456 PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
1457 PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
1458 PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
1459 PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
1460 PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
1461 PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
1462 PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
1463 PIN_PUPDR_PULLUP(GPIOH_PIN15))
1464#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
1465 PIN_ODR_HIGH(GPIOH_OSC_OUT) | \
1466 PIN_ODR_HIGH(GPIOH_PIN2) | \
1467 PIN_ODR_HIGH(GPIOH_PIN3) | \
1468 PIN_ODR_HIGH(GPIOH_PIN4) | \
1469 PIN_ODR_HIGH(GPIOH_PIN5) | \
1470 PIN_ODR_HIGH(GPIOH_PIN6) | \
1471 PIN_ODR_HIGH(GPIOH_PIN7) | \
1472 PIN_ODR_HIGH(GPIOH_PIN8) | \
1473 PIN_ODR_HIGH(GPIOH_PIN9) | \
1474 PIN_ODR_HIGH(GPIOH_PIN10) | \
1475 PIN_ODR_HIGH(GPIOH_PIN11) | \
1476 PIN_ODR_HIGH(GPIOH_PIN12) | \
1477 PIN_ODR_HIGH(GPIOH_PIN13) | \
1478 PIN_ODR_HIGH(GPIOH_PIN14) | \
1479 PIN_ODR_HIGH(GPIOH_PIN15))
1480#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \
1481 PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \
1482 PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
1483 PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
1484 PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
1485 PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
1486 PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
1487 PIN_AFIO_AF(GPIOH_PIN7, 0U))
1488#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \
1489 PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
1490 PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
1491 PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
1492 PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
1493 PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
1494 PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
1495 PIN_AFIO_AF(GPIOH_PIN15, 0U))
1496
1497/*
1498 * GPIOI setup:
1499 *
1500 * PI0 - PIN0 (input pullup).
1501 * PI1 - PIN1 (input pullup).
1502 * PI2 - PIN2 (input pullup).
1503 * PI3 - PIN3 (input pullup).
1504 * PI4 - PIN4 (input pullup).
1505 * PI5 - PIN5 (input pullup).
1506 * PI6 - PIN6 (input pullup).
1507 * PI7 - PIN7 (input pullup).
1508 * PI8 - PIN8 (input pullup).
1509 * PI9 - PIN9 (input pullup).
1510 * PI10 - PIN10 (input pullup).
1511 * PI11 - PIN11 (input pullup).
1512 * PI12 - PIN12 (input pullup).
1513 * PI13 - PIN13 (input pullup).
1514 * PI14 - PIN14 (input pullup).
1515 * PI15 - PIN15 (input pullup).
1516 */
1517#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \
1518 PIN_MODE_INPUT(GPIOI_PIN1) | \
1519 PIN_MODE_INPUT(GPIOI_PIN2) | \
1520 PIN_MODE_INPUT(GPIOI_PIN3) | \
1521 PIN_MODE_INPUT(GPIOI_PIN4) | \
1522 PIN_MODE_INPUT(GPIOI_PIN5) | \
1523 PIN_MODE_INPUT(GPIOI_PIN6) | \
1524 PIN_MODE_INPUT(GPIOI_PIN7) | \
1525 PIN_MODE_INPUT(GPIOI_PIN8) | \
1526 PIN_MODE_INPUT(GPIOI_PIN9) | \
1527 PIN_MODE_INPUT(GPIOI_PIN10) | \
1528 PIN_MODE_INPUT(GPIOI_PIN11) | \
1529 PIN_MODE_INPUT(GPIOI_PIN12) | \
1530 PIN_MODE_INPUT(GPIOI_PIN13) | \
1531 PIN_MODE_INPUT(GPIOI_PIN14) | \
1532 PIN_MODE_INPUT(GPIOI_PIN15))
1533#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \
1534 PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \
1535 PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \
1536 PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \
1537 PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \
1538 PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \
1539 PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \
1540 PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \
1541 PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \
1542 PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \
1543 PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \
1544 PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \
1545 PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \
1546 PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \
1547 PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \
1548 PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
1549#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \
1550 PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \
1551 PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \
1552 PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \
1553 PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \
1554 PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \
1555 PIN_OSPEED_VERYLOW(GPIOI_PIN6) | \
1556 PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \
1557 PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \
1558 PIN_OSPEED_VERYLOW(GPIOI_PIN9) | \
1559 PIN_OSPEED_VERYLOW(GPIOI_PIN10) | \
1560 PIN_OSPEED_VERYLOW(GPIOI_PIN11) | \
1561 PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \
1562 PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \
1563 PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \
1564 PIN_OSPEED_VERYLOW(GPIOI_PIN15))
1565#define VAL_GPIOI_PUPDR (PIN_PUPDR_PULLUP(GPIOI_PIN0) | \
1566 PIN_PUPDR_PULLUP(GPIOI_PIN1) | \
1567 PIN_PUPDR_PULLUP(GPIOI_PIN2) | \
1568 PIN_PUPDR_PULLUP(GPIOI_PIN3) | \
1569 PIN_PUPDR_PULLUP(GPIOI_PIN4) | \
1570 PIN_PUPDR_PULLUP(GPIOI_PIN5) | \
1571 PIN_PUPDR_PULLUP(GPIOI_PIN6) | \
1572 PIN_PUPDR_PULLUP(GPIOI_PIN7) | \
1573 PIN_PUPDR_PULLUP(GPIOI_PIN8) | \
1574 PIN_PUPDR_PULLUP(GPIOI_PIN9) | \
1575 PIN_PUPDR_PULLUP(GPIOI_PIN10) | \
1576 PIN_PUPDR_PULLUP(GPIOI_PIN11) | \
1577 PIN_PUPDR_PULLUP(GPIOI_PIN12) | \
1578 PIN_PUPDR_PULLUP(GPIOI_PIN13) | \
1579 PIN_PUPDR_PULLUP(GPIOI_PIN14) | \
1580 PIN_PUPDR_PULLUP(GPIOI_PIN15))
1581#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \
1582 PIN_ODR_HIGH(GPIOI_PIN1) | \
1583 PIN_ODR_HIGH(GPIOI_PIN2) | \
1584 PIN_ODR_HIGH(GPIOI_PIN3) | \
1585 PIN_ODR_HIGH(GPIOI_PIN4) | \
1586 PIN_ODR_HIGH(GPIOI_PIN5) | \
1587 PIN_ODR_HIGH(GPIOI_PIN6) | \
1588 PIN_ODR_HIGH(GPIOI_PIN7) | \
1589 PIN_ODR_HIGH(GPIOI_PIN8) | \
1590 PIN_ODR_HIGH(GPIOI_PIN9) | \
1591 PIN_ODR_HIGH(GPIOI_PIN10) | \
1592 PIN_ODR_HIGH(GPIOI_PIN11) | \
1593 PIN_ODR_HIGH(GPIOI_PIN12) | \
1594 PIN_ODR_HIGH(GPIOI_PIN13) | \
1595 PIN_ODR_HIGH(GPIOI_PIN14) | \
1596 PIN_ODR_HIGH(GPIOI_PIN15))
1597#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \
1598 PIN_AFIO_AF(GPIOI_PIN1, 0U) | \
1599 PIN_AFIO_AF(GPIOI_PIN2, 0U) | \
1600 PIN_AFIO_AF(GPIOI_PIN3, 0U) | \
1601 PIN_AFIO_AF(GPIOI_PIN4, 0U) | \
1602 PIN_AFIO_AF(GPIOI_PIN5, 0U) | \
1603 PIN_AFIO_AF(GPIOI_PIN6, 0U) | \
1604 PIN_AFIO_AF(GPIOI_PIN7, 0U))
1605#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \
1606 PIN_AFIO_AF(GPIOI_PIN9, 0U) | \
1607 PIN_AFIO_AF(GPIOI_PIN10, 0U) | \
1608 PIN_AFIO_AF(GPIOI_PIN11, 0U) | \
1609 PIN_AFIO_AF(GPIOI_PIN12, 0U) | \
1610 PIN_AFIO_AF(GPIOI_PIN13, 0U) | \
1611 PIN_AFIO_AF(GPIOI_PIN14, 0U) | \
1612 PIN_AFIO_AF(GPIOI_PIN15, 0U))
1613
1614/*
1615 * GPIOJ setup:
1616 *
1617 * PJ0 - PIN0 (input pullup).
1618 * PJ1 - PIN1 (input pullup).
1619 * PJ2 - PIN2 (input pullup).
1620 * PJ3 - PIN3 (input pullup).
1621 * PJ4 - PIN4 (input pullup).
1622 * PJ5 - PIN5 (input pullup).
1623 * PJ6 - PIN6 (input pullup).
1624 * PJ7 - PIN7 (input pullup).
1625 * PJ8 - PIN8 (input pullup).
1626 * PJ9 - PIN9 (input pullup).
1627 * PJ10 - PIN10 (input pullup).
1628 * PJ11 - PIN11 (input pullup).
1629 * PJ12 - PIN12 (input pullup).
1630 * PJ13 - PIN13 (input pullup).
1631 * PJ14 - PIN14 (input pullup).
1632 * PJ15 - PIN15 (input pullup).
1633 */
1634#define VAL_GPIOJ_MODER (PIN_MODE_INPUT(GPIOJ_PIN0) | \
1635 PIN_MODE_INPUT(GPIOJ_PIN1) | \
1636 PIN_MODE_INPUT(GPIOJ_PIN2) | \
1637 PIN_MODE_INPUT(GPIOJ_PIN3) | \
1638 PIN_MODE_INPUT(GPIOJ_PIN4) | \
1639 PIN_MODE_INPUT(GPIOJ_PIN5) | \
1640 PIN_MODE_INPUT(GPIOJ_PIN6) | \
1641 PIN_MODE_INPUT(GPIOJ_PIN7) | \
1642 PIN_MODE_INPUT(GPIOJ_PIN8) | \
1643 PIN_MODE_INPUT(GPIOJ_PIN9) | \
1644 PIN_MODE_INPUT(GPIOJ_PIN10) | \
1645 PIN_MODE_INPUT(GPIOJ_PIN11) | \
1646 PIN_MODE_INPUT(GPIOJ_PIN12) | \
1647 PIN_MODE_INPUT(GPIOJ_PIN13) | \
1648 PIN_MODE_INPUT(GPIOJ_PIN14) | \
1649 PIN_MODE_INPUT(GPIOJ_PIN15))
1650#define VAL_GPIOJ_OTYPER (PIN_OTYPE_PUSHPULL(GPIOJ_PIN0) | \
1651 PIN_OTYPE_PUSHPULL(GPIOJ_PIN1) | \
1652 PIN_OTYPE_PUSHPULL(GPIOJ_PIN2) | \
1653 PIN_OTYPE_PUSHPULL(GPIOJ_PIN3) | \
1654 PIN_OTYPE_PUSHPULL(GPIOJ_PIN4) | \
1655 PIN_OTYPE_PUSHPULL(GPIOJ_PIN5) | \
1656 PIN_OTYPE_PUSHPULL(GPIOJ_PIN6) | \
1657 PIN_OTYPE_PUSHPULL(GPIOJ_PIN7) | \
1658 PIN_OTYPE_PUSHPULL(GPIOJ_PIN8) | \
1659 PIN_OTYPE_PUSHPULL(GPIOJ_PIN9) | \
1660 PIN_OTYPE_PUSHPULL(GPIOJ_PIN10) | \
1661 PIN_OTYPE_PUSHPULL(GPIOJ_PIN11) | \
1662 PIN_OTYPE_PUSHPULL(GPIOJ_PIN12) | \
1663 PIN_OTYPE_PUSHPULL(GPIOJ_PIN13) | \
1664 PIN_OTYPE_PUSHPULL(GPIOJ_PIN14) | \
1665 PIN_OTYPE_PUSHPULL(GPIOJ_PIN15))
1666#define VAL_GPIOJ_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOJ_PIN0) | \
1667 PIN_OSPEED_VERYLOW(GPIOJ_PIN1) | \
1668 PIN_OSPEED_VERYLOW(GPIOJ_PIN2) | \
1669 PIN_OSPEED_VERYLOW(GPIOJ_PIN3) | \
1670 PIN_OSPEED_VERYLOW(GPIOJ_PIN4) | \
1671 PIN_OSPEED_VERYLOW(GPIOJ_PIN5) | \
1672 PIN_OSPEED_VERYLOW(GPIOJ_PIN6) | \
1673 PIN_OSPEED_VERYLOW(GPIOJ_PIN7) | \
1674 PIN_OSPEED_VERYLOW(GPIOJ_PIN8) | \
1675 PIN_OSPEED_VERYLOW(GPIOJ_PIN9) | \
1676 PIN_OSPEED_VERYLOW(GPIOJ_PIN10) | \
1677 PIN_OSPEED_VERYLOW(GPIOJ_PIN11) | \
1678 PIN_OSPEED_VERYLOW(GPIOJ_PIN12) | \
1679 PIN_OSPEED_VERYLOW(GPIOJ_PIN13) | \
1680 PIN_OSPEED_VERYLOW(GPIOJ_PIN14) | \
1681 PIN_OSPEED_VERYLOW(GPIOJ_PIN15))
1682#define VAL_GPIOJ_PUPDR (PIN_PUPDR_PULLUP(GPIOJ_PIN0) | \
1683 PIN_PUPDR_PULLUP(GPIOJ_PIN1) | \
1684 PIN_PUPDR_PULLUP(GPIOJ_PIN2) | \
1685 PIN_PUPDR_PULLUP(GPIOJ_PIN3) | \
1686 PIN_PUPDR_PULLUP(GPIOJ_PIN4) | \
1687 PIN_PUPDR_PULLUP(GPIOJ_PIN5) | \
1688 PIN_PUPDR_PULLUP(GPIOJ_PIN6) | \
1689 PIN_PUPDR_PULLUP(GPIOJ_PIN7) | \
1690 PIN_PUPDR_PULLUP(GPIOJ_PIN8) | \
1691 PIN_PUPDR_PULLUP(GPIOJ_PIN9) | \
1692 PIN_PUPDR_PULLUP(GPIOJ_PIN10) | \
1693 PIN_PUPDR_PULLUP(GPIOJ_PIN11) | \
1694 PIN_PUPDR_PULLUP(GPIOJ_PIN12) | \
1695 PIN_PUPDR_PULLUP(GPIOJ_PIN13) | \
1696 PIN_PUPDR_PULLUP(GPIOJ_PIN14) | \
1697 PIN_PUPDR_PULLUP(GPIOJ_PIN15))
1698#define VAL_GPIOJ_ODR (PIN_ODR_HIGH(GPIOJ_PIN0) | \
1699 PIN_ODR_HIGH(GPIOJ_PIN1) | \
1700 PIN_ODR_HIGH(GPIOJ_PIN2) | \
1701 PIN_ODR_HIGH(GPIOJ_PIN3) | \
1702 PIN_ODR_HIGH(GPIOJ_PIN4) | \
1703 PIN_ODR_HIGH(GPIOJ_PIN5) | \
1704 PIN_ODR_HIGH(GPIOJ_PIN6) | \
1705 PIN_ODR_HIGH(GPIOJ_PIN7) | \
1706 PIN_ODR_HIGH(GPIOJ_PIN8) | \
1707 PIN_ODR_HIGH(GPIOJ_PIN9) | \
1708 PIN_ODR_HIGH(GPIOJ_PIN10) | \
1709 PIN_ODR_HIGH(GPIOJ_PIN11) | \
1710 PIN_ODR_HIGH(GPIOJ_PIN12) | \
1711 PIN_ODR_HIGH(GPIOJ_PIN13) | \
1712 PIN_ODR_HIGH(GPIOJ_PIN14) | \
1713 PIN_ODR_HIGH(GPIOJ_PIN15))
1714#define VAL_GPIOJ_AFRL (PIN_AFIO_AF(GPIOJ_PIN0, 0U) | \
1715 PIN_AFIO_AF(GPIOJ_PIN1, 0U) | \
1716 PIN_AFIO_AF(GPIOJ_PIN2, 0U) | \
1717 PIN_AFIO_AF(GPIOJ_PIN3, 0U) | \
1718 PIN_AFIO_AF(GPIOJ_PIN4, 0U) | \
1719 PIN_AFIO_AF(GPIOJ_PIN5, 0U) | \
1720 PIN_AFIO_AF(GPIOJ_PIN6, 0U) | \
1721 PIN_AFIO_AF(GPIOJ_PIN7, 0U))
1722#define VAL_GPIOJ_AFRH (PIN_AFIO_AF(GPIOJ_PIN8, 0U) | \
1723 PIN_AFIO_AF(GPIOJ_PIN9, 0U) | \
1724 PIN_AFIO_AF(GPIOJ_PIN10, 0U) | \
1725 PIN_AFIO_AF(GPIOJ_PIN11, 0U) | \
1726 PIN_AFIO_AF(GPIOJ_PIN12, 0U) | \
1727 PIN_AFIO_AF(GPIOJ_PIN13, 0U) | \
1728 PIN_AFIO_AF(GPIOJ_PIN14, 0U) | \
1729 PIN_AFIO_AF(GPIOJ_PIN15, 0U))
1730
1731/*
1732 * GPIOK setup:
1733 *
1734 * PK0 - PIN0 (input pullup).
1735 * PK1 - PIN1 (input pullup).
1736 * PK2 - PIN2 (input pullup).
1737 * PK3 - PIN3 (input pullup).
1738 * PK4 - PIN4 (input pullup).
1739 * PK5 - PIN5 (input pullup).
1740 * PK6 - PIN6 (input pullup).
1741 * PK7 - PIN7 (input pullup).
1742 * PK8 - PIN8 (input pullup).
1743 * PK9 - PIN9 (input pullup).
1744 * PK10 - PIN10 (input pullup).
1745 * PK11 - PIN11 (input pullup).
1746 * PK12 - PIN12 (input pullup).
1747 * PK13 - PIN13 (input pullup).
1748 * PK14 - PIN14 (input pullup).
1749 * PK15 - PIN15 (input pullup).
1750 */
1751#define VAL_GPIOK_MODER (PIN_MODE_INPUT(GPIOK_PIN0) | \
1752 PIN_MODE_INPUT(GPIOK_PIN1) | \
1753 PIN_MODE_INPUT(GPIOK_PIN2) | \
1754 PIN_MODE_INPUT(GPIOK_PIN3) | \
1755 PIN_MODE_INPUT(GPIOK_PIN4) | \
1756 PIN_MODE_INPUT(GPIOK_PIN5) | \
1757 PIN_MODE_INPUT(GPIOK_PIN6) | \
1758 PIN_MODE_INPUT(GPIOK_PIN7) | \
1759 PIN_MODE_INPUT(GPIOK_PIN8) | \
1760 PIN_MODE_INPUT(GPIOK_PIN9) | \
1761 PIN_MODE_INPUT(GPIOK_PIN10) | \
1762 PIN_MODE_INPUT(GPIOK_PIN11) | \
1763 PIN_MODE_INPUT(GPIOK_PIN12) | \
1764 PIN_MODE_INPUT(GPIOK_PIN13) | \
1765 PIN_MODE_INPUT(GPIOK_PIN14) | \
1766 PIN_MODE_INPUT(GPIOK_PIN15))
1767#define VAL_GPIOK_OTYPER (PIN_OTYPE_PUSHPULL(GPIOK_PIN0) | \
1768 PIN_OTYPE_PUSHPULL(GPIOK_PIN1) | \
1769 PIN_OTYPE_PUSHPULL(GPIOK_PIN2) | \
1770 PIN_OTYPE_PUSHPULL(GPIOK_PIN3) | \
1771 PIN_OTYPE_PUSHPULL(GPIOK_PIN4) | \
1772 PIN_OTYPE_PUSHPULL(GPIOK_PIN5) | \
1773 PIN_OTYPE_PUSHPULL(GPIOK_PIN6) | \
1774 PIN_OTYPE_PUSHPULL(GPIOK_PIN7) | \
1775 PIN_OTYPE_PUSHPULL(GPIOK_PIN8) | \
1776 PIN_OTYPE_PUSHPULL(GPIOK_PIN9) | \
1777 PIN_OTYPE_PUSHPULL(GPIOK_PIN10) | \
1778 PIN_OTYPE_PUSHPULL(GPIOK_PIN11) | \
1779 PIN_OTYPE_PUSHPULL(GPIOK_PIN12) | \
1780 PIN_OTYPE_PUSHPULL(GPIOK_PIN13) | \
1781 PIN_OTYPE_PUSHPULL(GPIOK_PIN14) | \
1782 PIN_OTYPE_PUSHPULL(GPIOK_PIN15))
1783#define VAL_GPIOK_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOK_PIN0) | \
1784 PIN_OSPEED_VERYLOW(GPIOK_PIN1) | \
1785 PIN_OSPEED_VERYLOW(GPIOK_PIN2) | \
1786 PIN_OSPEED_VERYLOW(GPIOK_PIN3) | \
1787 PIN_OSPEED_VERYLOW(GPIOK_PIN4) | \
1788 PIN_OSPEED_VERYLOW(GPIOK_PIN5) | \
1789 PIN_OSPEED_VERYLOW(GPIOK_PIN6) | \
1790 PIN_OSPEED_VERYLOW(GPIOK_PIN7) | \
1791 PIN_OSPEED_VERYLOW(GPIOK_PIN8) | \
1792 PIN_OSPEED_VERYLOW(GPIOK_PIN9) | \
1793 PIN_OSPEED_VERYLOW(GPIOK_PIN10) | \
1794 PIN_OSPEED_VERYLOW(GPIOK_PIN11) | \
1795 PIN_OSPEED_VERYLOW(GPIOK_PIN12) | \
1796 PIN_OSPEED_VERYLOW(GPIOK_PIN13) | \
1797 PIN_OSPEED_VERYLOW(GPIOK_PIN14) | \
1798 PIN_OSPEED_VERYLOW(GPIOK_PIN15))
1799#define VAL_GPIOK_PUPDR (PIN_PUPDR_PULLUP(GPIOK_PIN0) | \
1800 PIN_PUPDR_PULLUP(GPIOK_PIN1) | \
1801 PIN_PUPDR_PULLUP(GPIOK_PIN2) | \
1802 PIN_PUPDR_PULLUP(GPIOK_PIN3) | \
1803 PIN_PUPDR_PULLUP(GPIOK_PIN4) | \
1804 PIN_PUPDR_PULLUP(GPIOK_PIN5) | \
1805 PIN_PUPDR_PULLUP(GPIOK_PIN6) | \
1806 PIN_PUPDR_PULLUP(GPIOK_PIN7) | \
1807 PIN_PUPDR_PULLUP(GPIOK_PIN8) | \
1808 PIN_PUPDR_PULLUP(GPIOK_PIN9) | \
1809 PIN_PUPDR_PULLUP(GPIOK_PIN10) | \
1810 PIN_PUPDR_PULLUP(GPIOK_PIN11) | \
1811 PIN_PUPDR_PULLUP(GPIOK_PIN12) | \
1812 PIN_PUPDR_PULLUP(GPIOK_PIN13) | \
1813 PIN_PUPDR_PULLUP(GPIOK_PIN14) | \
1814 PIN_PUPDR_PULLUP(GPIOK_PIN15))
1815#define VAL_GPIOK_ODR (PIN_ODR_HIGH(GPIOK_PIN0) | \
1816 PIN_ODR_HIGH(GPIOK_PIN1) | \
1817 PIN_ODR_HIGH(GPIOK_PIN2) | \
1818 PIN_ODR_HIGH(GPIOK_PIN3) | \
1819 PIN_ODR_HIGH(GPIOK_PIN4) | \
1820 PIN_ODR_HIGH(GPIOK_PIN5) | \
1821 PIN_ODR_HIGH(GPIOK_PIN6) | \
1822 PIN_ODR_HIGH(GPIOK_PIN7) | \
1823 PIN_ODR_HIGH(GPIOK_PIN8) | \
1824 PIN_ODR_HIGH(GPIOK_PIN9) | \
1825 PIN_ODR_HIGH(GPIOK_PIN10) | \
1826 PIN_ODR_HIGH(GPIOK_PIN11) | \
1827 PIN_ODR_HIGH(GPIOK_PIN12) | \
1828 PIN_ODR_HIGH(GPIOK_PIN13) | \
1829 PIN_ODR_HIGH(GPIOK_PIN14) | \
1830 PIN_ODR_HIGH(GPIOK_PIN15))
1831#define VAL_GPIOK_AFRL (PIN_AFIO_AF(GPIOK_PIN0, 0U) | \
1832 PIN_AFIO_AF(GPIOK_PIN1, 0U) | \
1833 PIN_AFIO_AF(GPIOK_PIN2, 0U) | \
1834 PIN_AFIO_AF(GPIOK_PIN3, 0U) | \
1835 PIN_AFIO_AF(GPIOK_PIN4, 0U) | \
1836 PIN_AFIO_AF(GPIOK_PIN5, 0U) | \
1837 PIN_AFIO_AF(GPIOK_PIN6, 0U) | \
1838 PIN_AFIO_AF(GPIOK_PIN7, 0U))
1839#define VAL_GPIOK_AFRH (PIN_AFIO_AF(GPIOK_PIN8, 0U) | \
1840 PIN_AFIO_AF(GPIOK_PIN9, 0U) | \
1841 PIN_AFIO_AF(GPIOK_PIN10, 0U) | \
1842 PIN_AFIO_AF(GPIOK_PIN11, 0U) | \
1843 PIN_AFIO_AF(GPIOK_PIN12, 0U) | \
1844 PIN_AFIO_AF(GPIOK_PIN13, 0U) | \
1845 PIN_AFIO_AF(GPIOK_PIN14, 0U) | \
1846 PIN_AFIO_AF(GPIOK_PIN15, 0U))
1847
1848/*===========================================================================*/
1849/* External declarations. */
1850/*===========================================================================*/
1851
1852#if !defined(_FROM_ASM_)
1853#ifdef __cplusplus
1854extern "C" {
1855#endif
1856 void boardInit(void);
1857#ifdef __cplusplus
1858}
1859#endif
1860#endif /* _FROM_ASM_ */
1861
1862#endif /* BOARD_H */
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.mk b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.mk
new file mode 100644
index 000000000..3bcb17334
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_F767ZI/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_F767ZI
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg
new file mode 100644
index 000000000..e5ddf89a7
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.chcfg
@@ -0,0 +1,1459 @@
1<?xml version="1.0" encoding="UTF-8"?>
2<!-- STM32F7xx board Template -->
3<board
4 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
5 xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f7xx_board.xsd">
6 <configuration_settings>
7 <templates_path>resources/gencfg/processors/boards/stm32f7xx/templates</templates_path>
8 <output_path>..</output_path>
9 <hal_version>5.0.x</hal_version>
10 </configuration_settings>
11 <board_name>STMicroelectronics STM32 Nucleo144-F767ZI</board_name>
12 <board_id>ST_NUCLEO144_F767ZI</board_id>
13 <board_functions></board_functions>
14 <headers></headers>
15 <ethernet_phy>
16 <identifier>MII_LAN8742A_ID</identifier>
17 <bus_type>RMII</bus_type>
18 </ethernet_phy>
19 <subtype>STM32F767xx</subtype>
20 <clocks
21 HSEFrequency="8000000"
22 HSEBypass="true"
23 LSEFrequency="32768"
24 LSEBypass="false"
25 VDD="300"
26 LSEDrive="3 High Drive (default)" />
27 <ports>
28 <GPIOA>
29 <pin0
30 ID="ZIO_D32 TIM2_CH1"
31 Type="PushPull"
32 Level="High"
33 Speed="Maximum"
34 Resistor="PullUp"
35 Mode="Input"
36 Alternate="0" />
37 <pin1
38 ID="RMII_REF_CLK"
39 Type="PushPull"
40 Level="High"
41 Speed="Maximum"
42 Resistor="Floating"
43 Mode="Alternate"
44 Alternate="11" />
45 <pin2
46 ID="RMII_MDIO"
47 Type="PushPull"
48 Level="High"
49 Speed="Maximum"
50 Resistor="PullUp"
51 Mode="Alternate"
52 Alternate="11" />
53 <pin3
54 ID="ARD_A0 ADC123_IN3"
55 Type="PushPull"
56 Level="High"
57 Speed="Maximum"
58 Resistor="PullUp"
59 Mode="Input"
60 Alternate="0" />
61 <pin4
62 ID="ZIO_D24 SPI3_NSS"
63 Type="PushPull"
64 Level="High"
65 Speed="Maximum"
66 Resistor="PullUp"
67 Mode="Input"
68 Alternate="0" />
69 <pin5
70 ID="ARD_D13 SPI1_SCK"
71 Type="PushPull"
72 Level="High"
73 Speed="Maximum"
74 Resistor="PullUp"
75 Mode="Input"
76 Alternate="0" />
77 <pin6
78 ID="ARD_D12 SPI1_MISO"
79 Type="PushPull"
80 Level="High"
81 Speed="Maximum"
82 Resistor="PullUp"
83 Mode="Input"
84 Alternate="0" />
85 <pin7
86 ID="ARD_D11 SPI1_MOSI ZIO_D71 RMII_RX_DV"
87 Type="PushPull"
88 Level="High"
89 Speed="Maximum"
90 Resistor="PullUp"
91 Mode="Alternate"
92 Alternate="11" />
93 <pin8
94 ID="USB_SOF"
95 Type="PushPull"
96 Level="High"
97 Speed="Maximum"
98 Resistor="Floating"
99 Mode="Alternate"
100 Alternate="10" />
101 <pin9
102 ID="USB_VBUS"
103 Type="PushPull"
104 Level="High"
105 Speed="Maximum"
106 Resistor="Floating"
107 Mode="Analog"
108 Alternate="0" />
109 <pin10
110 ID="USB_ID"
111 Type="PushPull"
112 Level="High"
113 Speed="Maximum"
114 Resistor="Floating"
115 Mode="Alternate"
116 Alternate="10" />
117 <pin11
118 ID="USB_DM"
119 Type="PushPull"
120 Level="High"
121 Speed="Maximum"
122 Resistor="Floating"
123 Mode="Alternate"
124 Alternate="10" />
125 <pin12
126 ID="USB_DP"
127 Type="PushPull"
128 Level="High"
129 Speed="Maximum"
130 Resistor="Floating"
131 Mode="Alternate"
132 Alternate="10" />
133 <pin13
134 ID="SWDIO"
135 Type="PushPull"
136 Level="High"
137 Speed="Maximum"
138 Resistor="Floating"
139 Mode="Alternate"
140 Alternate="0" />
141 <pin14
142 ID="SWCLK"
143 Type="PushPull"
144 Level="High"
145 Speed="Maximum"
146 Resistor="Floating"
147 Mode="Alternate"
148 Alternate="0" />
149 <pin15
150 ID="ZIO_D20 I2S3_WS"
151 Type="PushPull"
152 Level="High"
153 Speed="Maximum"
154 Resistor="PullUp"
155 Mode="Input"
156 Alternate="0" />
157 </GPIOA>
158 <GPIOB>
159 <pin0
160 ID="ZIO_D33 TIM3_CH3 LED1"
161 Type="PushPull"
162 Level="Low"
163 Speed="Maximum"
164 Resistor="Floating"
165 Mode="Output"
166 Alternate="0" />
167 <pin1
168 ID="ZIO_A6 ADC12_IN9"
169 Type="PushPull"
170 Level="High"
171 Speed="Maximum"
172 Resistor="PullUp"
173 Mode="Input"
174 Alternate="0" />
175 <pin2
176 ID="ZIO_D27 QSPI_CLK"
177 Type="PushPull"
178 Level="High"
179 Speed="Maximum"
180 Resistor="PullUp"
181 Mode="Input"
182 Alternate="0" />
183 <pin3
184 ID="ZIO_D23 I2S3_CK"
185 Type="PushPull"
186 Level="High"
187 Speed="Maximum"
188 Resistor="PullUp"
189 Mode="Input"
190 Alternate="0" />
191 <pin4
192 ID="ZIO_D25 SPI3_MISO"
193 Type="PushPull"
194 Level="High"
195 Speed="Maximum"
196 Resistor="PullUp"
197 Mode="Input"
198 Alternate="0" />
199 <pin5
200 ID="ZIO_D22 I2S3_SD"
201 Type="PushPull"
202 Level="High"
203 Speed="Maximum"
204 Resistor="PullUp"
205 Mode="Input"
206 Alternate="0" />
207 <pin6
208 ID="ZIO_D26 QSPI_BK1_NCS"
209 Type="PushPull"
210 Level="High"
211 Speed="Maximum"
212 Resistor="PullUp"
213 Mode="Input"
214 Alternate="0" />
215 <pin7
216 ID="LED2"
217 Type="PushPull"
218 Level="Low"
219 Speed="Maximum"
220 Resistor="Floating"
221 Mode="Output"
222 Alternate="0" />
223 <pin8
224 ID="ARD_D15 I2C1_SCL"
225 Type="PushPull"
226 Level="High"
227 Speed="Maximum"
228 Resistor="PullUp"
229 Mode="Input"
230 Alternate="0" />
231 <pin9
232 ID="ARD_D14 I2C1_SDA"
233 Type="PushPull"
234 Level="High"
235 Speed="Maximum"
236 Resistor="PullUp"
237 Mode="Input"
238 Alternate="0" />
239 <pin10
240 ID="ZIO_D36 TIM2_CH3"
241 Type="PushPull"
242 Level="High"
243 Speed="Maximum"
244 Resistor="PullUp"
245 Mode="Input"
246 Alternate="0" />
247 <pin11
248 ID="ZIO_D35 TIM2_CH4"
249 Type="PushPull"
250 Level="High"
251 Speed="Maximum"
252 Resistor="PullUp"
253 Mode="Input"
254 Alternate="0" />
255 <pin12
256 ID="ZIO_D19 I2S2_WS"
257 Type="PushPull"
258 Level="High"
259 Speed="Maximum"
260 Resistor="PullUp"
261 Mode="Input"
262 Alternate="0" />
263 <pin13
264 ID="ZIO_D18 I2S2_CK RMII_TXD1"
265 Type="PushPull"
266 Level="High"
267 Speed="Maximum"
268 Resistor="PullUp"
269 Mode="Alternate"
270 Alternate="11" />
271 <pin14
272 ID="LED3"
273 Type="PushPull"
274 Level="Low"
275 Speed="Maximum"
276 Resistor="Floating"
277 Mode="Output"
278 Alternate="0" />
279 <pin15
280 ID="ZIO_D17 I2S2_SD"
281 Type="PushPull"
282 Level="High"
283 Speed="Maximum"
284 Resistor="PullUp"
285 Mode="Input"
286 Alternate="0" />
287 </GPIOB>
288 <GPIOC>
289 <pin0
290 ID="ARD_A1 ADC123_IN10"
291 Type="PushPull"
292 Level="High"
293 Speed="Maximum"
294 Resistor="PullUp"
295 Mode="Input"
296 Alternate="0" />
297 <pin1
298 ID="RMII_MDC"
299 Type="PushPull"
300 Level="High"
301 Speed="Maximum"
302 Resistor="Floating"
303 Mode="Alternate"
304 Alternate="11" />
305 <pin2
306 ID="ZIO_A7 ADC123_IN12"
307 Type="PushPull"
308 Level="High"
309 Speed="Maximum"
310 Resistor="PullUp"
311 Mode="Input"
312 Alternate="0" />
313 <pin3
314 ID="ARD_A2 ADC123_IN13"
315 Type="PushPull"
316 Level="High"
317 Speed="Maximum"
318 Resistor="PullUp"
319 Mode="Input"
320 Alternate="0" />
321 <pin4
322 ID="RMII_RXD0"
323 Type="PushPull"
324 Level="High"
325 Speed="Maximum"
326 Resistor="Floating"
327 Mode="Alternate"
328 Alternate="11" />
329 <pin5
330 ID="RMII_RXD1"
331 Type="PushPull"
332 Level="High"
333 Speed="Maximum"
334 Resistor="Floating"
335 Mode="Alternate"
336 Alternate="11" />
337 <pin6
338 ID="ZIO_D16 I2S2_MCK"
339 Type="PushPull"
340 Level="High"
341 Speed="Maximum"
342 Resistor="PullUp"
343 Mode="Input"
344 Alternate="0" />
345 <pin7
346 ID="ZIO_D21 I2S3_MCK"
347 Type="PushPull"
348 Level="High"
349 Speed="Maximum"
350 Resistor="PullUp"
351 Mode="Input"
352 Alternate="0" />
353 <pin8
354 ID="ZIO_D43 SDMMC_D0"
355 Type="PushPull"
356 Level="High"
357 Speed="Maximum"
358 Resistor="PullUp"
359 Mode="Input"
360 Alternate="0" />
361 <pin9
362 ID="ZIO_D44 SDMMC_D1"
363 Type="PushPull"
364 Level="High"
365 Speed="Maximum"
366 Resistor="PullUp"
367 Mode="Input"
368 Alternate="0" />
369 <pin10
370 ID="ZIO_D45 SDMMC_D2"
371 Type="PushPull"
372 Level="High"
373 Speed="Maximum"
374 Resistor="PullUp"
375 Mode="Input"
376 Alternate="0" />
377 <pin11
378 ID="ZIO_D46 SDMMC_D3"
379 Type="PushPull"
380 Level="High"
381 Speed="Maximum"
382 Resistor="PullUp"
383 Mode="Input"
384 Alternate="0" />
385 <pin12
386 ID="ZIO_D47 SDMMC_CK"
387 Type="PushPull"
388 Level="High"
389 Speed="Maximum"
390 Resistor="PullUp"
391 Mode="Input"
392 Alternate="0" />
393 <pin13
394 ID="BUTTON"
395 Type="PushPull"
396 Level="High"
397 Speed="Maximum"
398 Resistor="Floating"
399 Mode="Input"
400 Alternate="0" />
401 <pin14
402 ID="OSC32_IN"
403 Type="PushPull"
404 Level="High"
405 Speed="Minimum"
406 Resistor="Floating"
407 Mode="Input"
408 Alternate="0" />
409 <pin15
410 ID="OSC32_OUT"
411 Type="PushPull"
412 Level="High"
413 Speed="Minimum"
414 Resistor="Floating"
415 Mode="Input"
416 Alternate="0" />
417 </GPIOC>
418 <GPIOD>
419 <pin0
420 ID="ZIO_D67 CAN1_RX"
421 Type="PushPull"
422 Level="High"
423 Speed="Maximum"
424 Resistor="PullUp"
425 Mode="Input"
426 Alternate="0" />
427 <pin1
428 ID="ZIO_D66 CAN1_TX"
429 Type="PushPull"
430 Level="High"
431 Speed="Maximum"
432 Resistor="PullUp"
433 Mode="Input"
434 Alternate="0" />
435 <pin2
436 ID="ZIO_D48 SDMMC_CMD"
437 Type="PushPull"
438 Level="High"
439 Speed="Maximum"
440 Resistor="PullUp"
441 Mode="Input"
442 Alternate="0" />
443 <pin3
444 ID="ZIO_D55 USART2_CTS"
445 Type="PushPull"
446 Level="High"
447 Speed="Maximum"
448 Resistor="PullUp"
449 Mode="Input"
450 Alternate="0" />
451 <pin4
452 ID="ZIO_D54 USART2_RTS"
453 Type="PushPull"
454 Level="High"
455 Speed="Maximum"
456 Resistor="PullUp"
457 Mode="Input"
458 Alternate="0" />
459 <pin5
460 ID="ZIO_D53 USART2_TX"
461 Type="PushPull"
462 Level="High"
463 Speed="Maximum"
464 Resistor="PullUp"
465 Mode="Input"
466 Alternate="0" />
467 <pin6
468 ID="ZIO_D52 USART2_RX"
469 Type="PushPull"
470 Level="High"
471 Speed="Maximum"
472 Resistor="PullUp"
473 Mode="Input"
474 Alternate="0" />
475 <pin7
476 ID="ZIO_D51 USART2_SCLK"
477 Type="PushPull"
478 Level="High"
479 Speed="Maximum"
480 Resistor="PullUp"
481 Mode="Input"
482 Alternate="0" />
483 <pin8
484 ID="USART3_RX STLK_RX"
485 Type="PushPull"
486 Level="High"
487 Speed="Maximum"
488 Resistor="Floating"
489 Mode="Alternate"
490 Alternate="7" />
491 <pin9
492 ID="USART3_TX STLK_TX"
493 Type="PushPull"
494 Level="High"
495 Speed="Maximum"
496 Resistor="Floating"
497 Mode="Alternate"
498 Alternate="7" />
499 <pin10
500 ID=""
501 Type="PushPull"
502 Level="High"
503 Speed="Minimum"
504 Resistor="PullUp"
505 Mode="Input"
506 Alternate="0" />
507 <pin11
508 ID="ZIO_D30 QSPI_BK1_IO0"
509 Type="PushPull"
510 Level="High"
511 Speed="Maximum"
512 Resistor="PullUp"
513 Mode="Input"
514 Alternate="0" />
515 <pin12
516 ID="ZIO_D29 QSPI_BK1_IO1"
517 Type="PushPull"
518 Level="High"
519 Speed="Maximum"
520 Resistor="PullUp"
521 Mode="Input"
522 Alternate="0" />
523 <pin13
524 ID="ZIO_D28 QSPI_BK1_IO3"
525 Type="PushPull"
526 Level="High"
527 Speed="Maximum"
528 Resistor="PullUp"
529 Mode="Input"
530 Alternate="0" />
531 <pin14
532 ID="ARD_D10 SPI1_NSS"
533 Type="PushPull"
534 Level="High"
535 Speed="Maximum"
536 Resistor="PullUp"
537 Mode="Input"
538 Alternate="0" />
539 <pin15
540 ID="ARD_D9 TIM4_CH4"
541 Type="PushPull"
542 Level="High"
543 Speed="Maximum"
544 Resistor="PullUp"
545 Mode="Input"
546 Alternate="0" />
547 </GPIOD>
548 <GPIOE>
549 <pin0
550 ID="ZIO_D34 TIM4_ETR"
551 Type="PushPull"
552 Level="High"
553 Speed="Maximum"
554 Resistor="PullUp"
555 Mode="Input"
556 Alternate="0" />
557 <pin1
558 ID=""
559 Type="PushPull"
560 Level="High"
561 Speed="Minimum"
562 Resistor="PullUp"
563 Mode="Input"
564 Alternate="0" />
565 <pin2
566 ID="ZIO_D31 ZIO_D56 SAI1_MCLK_A"
567 Type="PushPull"
568 Level="High"
569 Speed="Maximum"
570 Resistor="PullUp"
571 Mode="Input"
572 Alternate="0" />
573 <pin3
574 ID="ZIO_D60 SAI1_SD_B"
575 Type="PushPull"
576 Level="High"
577 Speed="Maximum"
578 Resistor="PullUp"
579 Mode="Input"
580 Alternate="0" />
581 <pin4
582 ID="ZIO_D57 SAI1_FS_A"
583 Type="PushPull"
584 Level="High"
585 Speed="Maximum"
586 Resistor="PullUp"
587 Mode="Input"
588 Alternate="0" />
589 <pin5
590 ID="ZIO_D58 SAI1_SCK_A"
591 Type="PushPull"
592 Level="High"
593 Speed="Maximum"
594 Resistor="PullUp"
595 Mode="Input"
596 Alternate="0" />
597 <pin6
598 ID="ZIO_D59 SAI1_SD_A"
599 Type="PushPull"
600 Level="High"
601 Speed="Maximum"
602 Resistor="PullUp"
603 Mode="Input"
604 Alternate="0" />
605 <pin7
606 ID="ZIO_D41 TIM1_ETR"
607 Type="PushPull"
608 Level="High"
609 Speed="Maximum"
610 Resistor="PullUp"
611 Mode="Input"
612 Alternate="0" />
613 <pin8
614 ID="ZIO_D42 TIM1_CH1N"
615 Type="PushPull"
616 Level="High"
617 Speed="Maximum"
618 Resistor="PullUp"
619 Mode="Input"
620 Alternate="0" />
621 <pin9
622 ID="ARD_D6 TIM1_CH1"
623 Type="PushPull"
624 Level="High"
625 Speed="Maximum"
626 Resistor="PullUp"
627 Mode="Input"
628 Alternate="0" />
629 <pin10
630 ID="ZIO_D40 TIM1_CH2N"
631 Type="PushPull"
632 Level="High"
633 Speed="Maximum"
634 Resistor="PullUp"
635 Mode="Input"
636 Alternate="0" />
637 <pin11
638 ID="ARD_D5 TIM1_CH2"
639 Type="PushPull"
640 Level="High"
641 Speed="Maximum"
642 Resistor="PullUp"
643 Mode="Input"
644 Alternate="0" />
645 <pin12
646 ID="ZIO_D39 TIM1_CH3N"
647 Type="PushPull"
648 Level="High"
649 Speed="Maximum"
650 Resistor="PullUp"
651 Mode="Input"
652 Alternate="0" />
653 <pin13
654 ID="ARD_D3 TIM1_CH3"
655 Type="PushPull"
656 Level="High"
657 Speed="Maximum"
658 Resistor="PullUp"
659 Mode="Input"
660 Alternate="0" />
661 <pin14
662 ID="ZIO_D38"
663 Type="PushPull"
664 Level="High"
665 Speed="Minimum"
666 Resistor="PullUp"
667 Mode="Input"
668 Alternate="0" />
669 <pin15
670 ID="ZIO_D37 TIM1_BKIN1"
671 Type="PushPull"
672 Level="High"
673 Speed="Maximum"
674 Resistor="PullUp"
675 Mode="Input"
676 Alternate="0" />
677 </GPIOE>
678 <GPIOF>
679 <pin0
680 ID="ZIO_D68 I2C2_SDA"
681 Type="PushPull"
682 Level="High"
683 Speed="Maximum"
684 Resistor="PullUp"
685 Mode="Input"
686 Alternate="0" />
687 <pin1
688 ID="ZIO_D69 I2C2_SCL"
689 Type="PushPull"
690 Level="High"
691 Speed="Maximum"
692 Resistor="PullUp"
693 Mode="Input"
694 Alternate="0" />
695 <pin2
696 ID="ZIO_D70 I2C2_SMBA"
697 Type="PushPull"
698 Level="High"
699 Speed="Maximum"
700 Resistor="PullUp"
701 Mode="Input"
702 Alternate="0" />
703 <pin3
704 ID="ARD_A3 ADC3_IN9"
705 Type="PushPull"
706 Level="High"
707 Speed="Maximum"
708 Resistor="PullUp"
709 Mode="Input"
710 Alternate="0" />
711 <pin4
712 ID="ZIO_A8 ADC3_IN14"
713 Type="PushPull"
714 Level="High"
715 Speed="Maximum"
716 Resistor="PullUp"
717 Mode="Input"
718 Alternate="0" />
719 <pin5
720 ID="ARD_A4 ADC3_IN15"
721 Type="PushPull"
722 Level="High"
723 Speed="Maximum"
724 Resistor="PullUp"
725 Mode="Input"
726 Alternate="0" />
727 <pin6
728 ID=""
729 Type="PushPull"
730 Level="High"
731 Speed="Minimum"
732 Resistor="PullUp"
733 Mode="Input"
734 Alternate="0" />
735 <pin7
736 ID="ZIO_D62 SAI1_MCLK_B"
737 Type="PushPull"
738 Level="High"
739 Speed="Maximum"
740 Resistor="PullUp"
741 Mode="Input"
742 Alternate="0" />
743 <pin8
744 ID="ZIO_D61 SAI1_SCK_B"
745 Type="PushPull"
746 Level="High"
747 Speed="Maximum"
748 Resistor="PullUp"
749 Mode="Input"
750 Alternate="0" />
751 <pin9
752 ID="ZIO_D63 SAI1_FS_B"
753 Type="PushPull"
754 Level="High"
755 Speed="Maximum"
756 Resistor="PullUp"
757 Mode="Input"
758 Alternate="0" />
759 <pin10
760 ID="ARD_A5 ADC3_IN8"
761 Type="PushPull"
762 Level="High"
763 Speed="Maximum"
764 Resistor="PullUp"
765 Mode="Input"
766 Alternate="0" />
767 <pin11
768 ID=""
769 Type="PushPull"
770 Level="High"
771 Speed="Minimum"
772 Resistor="PullUp"
773 Mode="Input"
774 Alternate="0" />
775 <pin12
776 ID="ARD_D8"
777 Type="PushPull"
778 Level="High"
779 Speed="Minimum"
780 Resistor="PullUp"
781 Mode="Input"
782 Alternate="0" />
783 <pin13
784 ID="ARD_D7"
785 Type="PushPull"
786 Level="High"
787 Speed="Minimum"
788 Resistor="PullUp"
789 Mode="Input"
790 Alternate="0" />
791 <pin14
792 ID="ARD_D4"
793 Type="PushPull"
794 Level="High"
795 Speed="Minimum"
796 Resistor="PullUp"
797 Mode="Input"
798 Alternate="0" />
799 <pin15
800 ID="ARD_D2"
801 Type="PushPull"
802 Level="High"
803 Speed="Minimum"
804 Resistor="PullUp"
805 Mode="Input"
806 Alternate="0" />
807 </GPIOF>
808 <GPIOG>
809 <pin0
810 ID="ZIO_D65"
811 Type="PushPull"
812 Level="High"
813 Speed="Minimum"
814 Resistor="PullUp"
815 Mode="Input"
816 Alternate="0" />
817 <pin1
818 ID="ZIO_D64"
819 Type="PushPull"
820 Level="High"
821 Speed="Minimum"
822 Resistor="PullUp"
823 Mode="Input"
824 Alternate="0" />
825 <pin2
826 ID="ZIO_D49"
827 Type="PushPull"
828 Level="High"
829 Speed="Minimum"
830 Resistor="PullUp"
831 Mode="Input"
832 Alternate="0" />
833 <pin3
834 ID="ZIO_D50"
835 Type="PushPull"
836 Level="High"
837 Speed="Minimum"
838 Resistor="PullUp"
839 Mode="Input"
840 Alternate="0" />
841 <pin4
842 ID=""
843 Type="PushPull"
844 Level="High"
845 Speed="Minimum"
846 Resistor="PullUp"
847 Mode="Input"
848 Alternate="0" />
849 <pin5
850 ID=""
851 Type="PushPull"
852 Level="High"
853 Speed="Minimum"
854 Resistor="PullUp"
855 Mode="Input"
856 Alternate="0" />
857 <pin6
858 ID="USB_GPIO_OUT"
859 Type="PushPull"
860 Level="High"
861 Speed="Maximum"
862 Resistor="PullUp"
863 Mode="Input"
864 Alternate="0" />
865 <pin7
866 ID="USB_GPIO_IN"
867 Type="PushPull"
868 Level="High"
869 Speed="Maximum"
870 Resistor="PullUp"
871 Mode="Input"
872 Alternate="0" />
873 <pin8
874 ID=""
875 Type="PushPull"
876 Level="High"
877 Speed="Minimum"
878 Resistor="PullUp"
879 Mode="Input"
880 Alternate="0" />
881 <pin9
882 ID="ARD_D0 USART6_RX"
883 Type="PushPull"
884 Level="High"
885 Speed="Maximum"
886 Resistor="PullUp"
887 Mode="Input"
888 Alternate="0" />
889 <pin10
890 ID=""
891 Type="PushPull"
892 Level="High"
893 Speed="Minimum"
894 Resistor="PullUp"
895 Mode="Input"
896 Alternate="0" />
897 <pin11
898 ID="RMII_TX_EN"
899 Type="PushPull"
900 Level="High"
901 Speed="Maximum"
902 Resistor="Floating"
903 Mode="Alternate"
904 Alternate="11" />
905 <pin12
906 ID=""
907 Type="PushPull"
908 Level="High"
909 Speed="Minimum"
910 Resistor="PullUp"
911 Mode="Input"
912 Alternate="0" />
913 <pin13
914 ID="RMII_TXD0"
915 Type="PushPull"
916 Level="High"
917 Speed="Maximum"
918 Resistor="Floating"
919 Mode="Alternate"
920 Alternate="11" />
921 <pin14
922 ID="ARD_D1 USART6_TX"
923 Type="PushPull"
924 Level="High"
925 Speed="Maximum"
926 Resistor="PullUp"
927 Mode="Input"
928 Alternate="0" />
929 <pin15
930 ID=""
931 Type="PushPull"
932 Level="High"
933 Speed="Minimum"
934 Resistor="PullUp"
935 Mode="Input"
936 Alternate="0" />
937 </GPIOG>
938 <GPIOH>
939 <pin0
940 ID="OSC_IN"
941 Type="PushPull"
942 Level="High"
943 Speed="Maximum"
944 Resistor="Floating"
945 Mode="Input"
946 Alternate="0" />
947 <pin1
948 ID="OSC_OUT"
949 Type="PushPull"
950 Level="High"
951 Speed="Maximum"
952 Resistor="Floating"
953 Mode="Input"
954 Alternate="0" />
955 <pin2
956 ID=""
957 Type="PushPull"
958 Level="High"
959 Speed="Minimum"
960 Resistor="PullUp"
961 Mode="Input"
962 Alternate="0" />
963 <pin3
964 ID=""
965 Type="PushPull"
966 Level="High"
967 Speed="Minimum"
968 Resistor="PullUp"
969 Mode="Input"
970 Alternate="0" />
971 <pin4
972 ID=""
973 Type="PushPull"
974 Level="High"
975 Speed="Minimum"
976 Resistor="PullUp"
977 Mode="Input"
978 Alternate="0" />
979 <pin5
980 ID=""
981 Type="PushPull"
982 Level="High"
983 Speed="Minimum"
984 Resistor="PullUp"
985 Mode="Input"
986 Alternate="0" />
987 <pin6
988 ID=""
989 Type="PushPull"
990 Level="High"
991 Speed="Minimum"
992 Resistor="PullUp"
993 Mode="Input"
994 Alternate="0" />
995 <pin7
996 ID=""
997 Type="PushPull"
998 Level="High"
999 Speed="Minimum"
1000 Resistor="PullUp"
1001 Mode="Input"
1002 Alternate="0" />
1003 <pin8
1004 ID=""
1005 Type="PushPull"
1006 Level="High"
1007 Speed="Minimum"
1008 Resistor="PullUp"
1009 Mode="Input"
1010 Alternate="0" />
1011 <pin9
1012 ID=""
1013 Type="PushPull"
1014 Level="High"
1015 Speed="Minimum"
1016 Resistor="PullUp"
1017 Mode="Input"
1018 Alternate="0" />
1019 <pin10
1020 ID=""
1021 Type="PushPull"
1022 Level="High"
1023 Speed="Minimum"
1024 Resistor="PullUp"
1025 Mode="Input"
1026 Alternate="0" />
1027 <pin11
1028 ID=""
1029 Type="PushPull"
1030 Level="High"
1031 Speed="Minimum"
1032 Resistor="PullUp"
1033 Mode="Input"
1034 Alternate="0" />
1035 <pin12
1036 ID=""
1037 Type="PushPull"
1038 Level="High"
1039 Speed="Minimum"
1040 Resistor="PullUp"
1041 Mode="Input"
1042 Alternate="0" />
1043 <pin13
1044 ID=""
1045 Type="PushPull"
1046 Level="High"
1047 Speed="Minimum"
1048 Resistor="PullUp"
1049 Mode="Input"
1050 Alternate="0" />
1051 <pin14
1052 ID=""
1053 Type="PushPull"
1054 Level="High"
1055 Speed="Minimum"
1056 Resistor="PullUp"
1057 Mode="Input"
1058 Alternate="0" />
1059 <pin15
1060 ID=""
1061 Type="PushPull"
1062 Level="High"
1063 Speed="Minimum"
1064 Resistor="PullUp"
1065 Mode="Input"
1066 Alternate="0" />
1067 </GPIOH>
1068 <GPIOI>
1069 <pin0
1070 ID=""
1071 Type="PushPull"
1072 Level="High"
1073 Speed="Minimum"
1074 Resistor="PullUp"
1075 Mode="Input"
1076 Alternate="0" />
1077 <pin1
1078 ID=""
1079 Type="PushPull"
1080 Level="High"
1081 Speed="Minimum"
1082 Resistor="PullUp"
1083 Mode="Input"
1084 Alternate="0" />
1085 <pin2
1086 ID=""
1087 Type="PushPull"
1088 Level="High"
1089 Speed="Minimum"
1090 Resistor="PullUp"
1091 Mode="Input"
1092 Alternate="0" />
1093 <pin3
1094 ID=""
1095 Type="PushPull"
1096 Level="High"
1097 Speed="Minimum"
1098 Resistor="PullUp"
1099 Mode="Input"
1100 Alternate="0" />
1101 <pin4
1102 ID=""
1103 Type="PushPull"
1104 Level="High"
1105 Speed="Minimum"
1106 Resistor="PullUp"
1107 Mode="Input"
1108 Alternate="0" />
1109 <pin5
1110 ID=""
1111 Type="PushPull"
1112 Level="High"
1113 Speed="Minimum"
1114 Resistor="PullUp"
1115 Mode="Input"
1116 Alternate="0" />
1117 <pin6
1118 ID=""
1119 Type="PushPull"
1120 Level="High"
1121 Speed="Minimum"
1122 Resistor="PullUp"
1123 Mode="Input"
1124 Alternate="0" />
1125 <pin7
1126 ID=""
1127 Type="PushPull"
1128 Level="High"
1129 Speed="Minimum"
1130 Resistor="PullUp"
1131 Mode="Input"
1132 Alternate="0" />
1133 <pin8
1134 ID=""
1135 Type="PushPull"
1136 Level="High"
1137 Speed="Minimum"
1138 Resistor="PullUp"
1139 Mode="Input"
1140 Alternate="0" />
1141 <pin9
1142 ID=""
1143 Type="PushPull"
1144 Level="High"
1145 Speed="Minimum"
1146 Resistor="PullUp"
1147 Mode="Input"
1148 Alternate="0" />
1149 <pin10
1150 ID=""
1151 Type="PushPull"
1152 Level="High"
1153 Speed="Minimum"
1154 Resistor="PullUp"
1155 Mode="Input"
1156 Alternate="0" />
1157 <pin11
1158 ID=""
1159 Type="PushPull"
1160 Level="High"
1161 Speed="Minimum"
1162 Resistor="PullUp"
1163 Mode="Input"
1164 Alternate="0" />
1165 <pin12
1166 ID=""
1167 Type="PushPull"
1168 Level="High"
1169 Speed="Minimum"
1170 Resistor="PullUp"
1171 Mode="Input"
1172 Alternate="0" />
1173 <pin13
1174 ID=""
1175 Type="PushPull"
1176 Level="High"
1177 Speed="Minimum"
1178 Resistor="PullUp"
1179 Mode="Input"
1180 Alternate="0" />
1181 <pin14
1182 ID=""
1183 Type="PushPull"
1184 Level="High"
1185 Speed="Minimum"
1186 Resistor="PullUp"
1187 Mode="Input"
1188 Alternate="0" />
1189 <pin15
1190 ID=""
1191 Type="PushPull"
1192 Level="High"
1193 Speed="Minimum"
1194 Resistor="PullUp"
1195 Mode="Input"
1196 Alternate="0" />
1197 </GPIOI>
1198 <GPIOJ>
1199 <pin0
1200 ID=""
1201 Type="PushPull"
1202 Level="High"
1203 Speed="Minimum"
1204 Resistor="PullUp"
1205 Mode="Input"
1206 Alternate="0" />
1207 <pin1
1208 ID=""
1209 Type="PushPull"
1210 Level="High"
1211 Speed="Minimum"
1212 Resistor="PullUp"
1213 Mode="Input"
1214 Alternate="0" />
1215 <pin2
1216 ID=""
1217 Type="PushPull"
1218 Level="High"
1219 Speed="Minimum"
1220 Resistor="PullUp"
1221 Mode="Input"
1222 Alternate="0" />
1223 <pin3
1224 ID=""
1225 Type="PushPull"
1226 Level="High"
1227 Speed="Minimum"
1228 Resistor="PullUp"
1229 Mode="Input"
1230 Alternate="0" />
1231 <pin4
1232 ID=""
1233 Type="PushPull"
1234 Level="High"
1235 Speed="Minimum"
1236 Resistor="PullUp"
1237 Mode="Input"
1238 Alternate="0" />
1239 <pin5
1240 ID=""
1241 Type="PushPull"
1242 Level="High"
1243 Speed="Minimum"
1244 Resistor="PullUp"
1245 Mode="Input"
1246 Alternate="0" />
1247 <pin6
1248 ID=""
1249 Type="PushPull"
1250 Level="High"
1251 Speed="Minimum"
1252 Resistor="PullUp"
1253 Mode="Input"
1254 Alternate="0" />
1255 <pin7
1256 ID=""
1257 Type="PushPull"
1258 Level="High"
1259 Speed="Minimum"
1260 Resistor="PullUp"
1261 Mode="Input"
1262 Alternate="0" />
1263 <pin8
1264 ID=""
1265 Type="PushPull"
1266 Level="High"
1267 Speed="Minimum"
1268 Resistor="PullUp"
1269 Mode="Input"
1270 Alternate="0" />
1271 <pin9
1272 ID=""
1273 Type="PushPull"
1274 Level="High"
1275 Speed="Minimum"
1276 Resistor="PullUp"
1277 Mode="Input"
1278 Alternate="0" />
1279 <pin10
1280 ID=""
1281 Type="PushPull"
1282 Level="High"
1283 Speed="Minimum"
1284 Resistor="PullUp"
1285 Mode="Input"
1286 Alternate="0" />
1287 <pin11
1288 ID=""
1289 Type="PushPull"
1290 Level="High"
1291 Speed="Minimum"
1292 Resistor="PullUp"
1293 Mode="Input"
1294 Alternate="0" />
1295 <pin12
1296 ID=""
1297 Type="PushPull"
1298 Level="High"
1299 Speed="Minimum"
1300 Resistor="PullUp"
1301 Mode="Input"
1302 Alternate="0" />
1303 <pin13
1304 ID=""
1305 Type="PushPull"
1306 Level="High"
1307 Speed="Minimum"
1308 Resistor="PullUp"
1309 Mode="Input"
1310 Alternate="0" />
1311 <pin14
1312 ID=""
1313 Type="PushPull"
1314 Level="High"
1315 Speed="Minimum"
1316 Resistor="PullUp"
1317 Mode="Input"
1318 Alternate="0" />
1319 <pin15
1320 ID=""
1321 Type="PushPull"
1322 Level="High"
1323 Speed="Minimum"
1324 Resistor="PullUp"
1325 Mode="Input"
1326 Alternate="0" />
1327 </GPIOJ>
1328 <GPIOK>
1329 <pin0
1330 ID=""
1331 Type="PushPull"
1332 Level="High"
1333 Speed="Minimum"
1334 Resistor="PullUp"
1335 Mode="Input"
1336 Alternate="0" />
1337 <pin1
1338 ID=""
1339 Type="PushPull"
1340 Level="High"
1341 Speed="Minimum"
1342 Resistor="PullUp"
1343 Mode="Input"
1344 Alternate="0" />
1345 <pin2
1346 ID=""
1347 Type="PushPull"
1348 Level="High"
1349 Speed="Minimum"
1350 Resistor="PullUp"
1351 Mode="Input"
1352 Alternate="0" />
1353 <pin3
1354 ID=""
1355 Type="PushPull"
1356 Level="High"
1357 Speed="Minimum"
1358 Resistor="PullUp"
1359 Mode="Input"
1360 Alternate="0" />
1361 <pin4
1362 ID=""
1363 Type="PushPull"
1364 Level="High"
1365 Speed="Minimum"
1366 Resistor="PullUp"
1367 Mode="Input"
1368 Alternate="0" />
1369 <pin5
1370 ID=""
1371 Type="PushPull"
1372 Level="High"
1373 Speed="Minimum"
1374 Resistor="PullUp"
1375 Mode="Input"
1376 Alternate="0" />
1377 <pin6
1378 ID=""
1379 Type="PushPull"
1380 Level="High"
1381 Speed="Minimum"
1382 Resistor="PullUp"
1383 Mode="Input"
1384 Alternate="0" />
1385 <pin7
1386 ID=""
1387 Type="PushPull"
1388 Level="High"
1389 Speed="Minimum"
1390 Resistor="PullUp"
1391 Mode="Input"
1392 Alternate="0" />
1393 <pin8
1394 ID=""
1395 Type="PushPull"
1396 Level="High"
1397 Speed="Minimum"
1398 Resistor="PullUp"
1399 Mode="Input"
1400 Alternate="0" />
1401 <pin9
1402 ID=""
1403 Type="PushPull"
1404 Level="High"
1405 Speed="Minimum"
1406 Resistor="PullUp"
1407 Mode="Input"
1408 Alternate="0" />
1409 <pin10
1410 ID=""
1411 Type="PushPull"
1412 Level="High"
1413 Speed="Minimum"
1414 Resistor="PullUp"
1415 Mode="Input"
1416 Alternate="0" />
1417 <pin11
1418 ID=""
1419 Type="PushPull"
1420 Level="High"
1421 Speed="Minimum"
1422 Resistor="PullUp"
1423 Mode="Input"
1424 Alternate="0" />
1425 <pin12
1426 ID=""
1427 Type="PushPull"
1428 Level="High"
1429 Speed="Minimum"
1430 Resistor="PullUp"
1431 Mode="Input"
1432 Alternate="0" />
1433 <pin13
1434 ID=""
1435 Type="PushPull"
1436 Level="High"
1437 Speed="Minimum"
1438 Resistor="PullUp"
1439 Mode="Input"
1440 Alternate="0" />
1441 <pin14
1442 ID=""
1443 Type="PushPull"
1444 Level="High"
1445 Speed="Minimum"
1446 Resistor="PullUp"
1447 Mode="Input"
1448 Alternate="0" />
1449 <pin15
1450 ID=""
1451 Type="PushPull"
1452 Level="High"
1453 Speed="Minimum"
1454 Resistor="PullUp"
1455 Mode="Input"
1456 Alternate="0" />
1457 </GPIOK>
1458 </ports>
1459</board>
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp
new file mode 100644
index 000000000..ded6d509f
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO144_F767ZI/cfg/board.fmpp
@@ -0,0 +1,15 @@
1sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f7xx/templates
2outputRoot: ..
3dataRoot: .
4
5freemarkerLinks: {
6 lib: ../../../../../tools/ftl/libs
7}
8
9data : {
10 doc1:xml (
11 board.chcfg
12 {
13 }
14 )
15}
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 20:55:37 +0100