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-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.c266
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.h953
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.mk9
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg799
-rw-r--r--lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp15
5 files changed, 2042 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.c b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.c
new file mode 100644
index 000000000..68e5c6b94
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.c
@@ -0,0 +1,266 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
95 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
96#endif
97#if STM32_HAS_GPIOB
98 {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
99 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
100#endif
101#if STM32_HAS_GPIOC
102 {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
103 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
104#endif
105#if STM32_HAS_GPIOD
106 {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
107 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
108#endif
109#if STM32_HAS_GPIOE
110 {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
111 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
112#endif
113#if STM32_HAS_GPIOF
114 {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
115 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
116#endif
117#if STM32_HAS_GPIOG
118 {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
119 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
120#endif
121#if STM32_HAS_GPIOH
122 {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
123 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
124#endif
125#if STM32_HAS_GPIOI
126 {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
127 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
128#endif
129#if STM32_HAS_GPIOJ
130 {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
131 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
132#endif
133#if STM32_HAS_GPIOK
134 {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
135 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
136#endif
137};
138
139/*===========================================================================*/
140/* Driver local functions. */
141/*===========================================================================*/
142
143static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
144
145 gpiop->OTYPER = config->otyper;
146 gpiop->OSPEEDR = config->ospeedr;
147 gpiop->PUPDR = config->pupdr;
148 gpiop->ODR = config->odr;
149 gpiop->AFRL = config->afrl;
150 gpiop->AFRH = config->afrh;
151 gpiop->MODER = config->moder;
152}
153
154static void stm32_gpio_init(void) {
155
156 /* Enabling GPIO-related clocks, the mask comes from the
157 registry header file.*/
158 rccResetAHB(STM32_GPIO_EN_MASK);
159 rccEnableAHB(STM32_GPIO_EN_MASK, true);
160
161 /* Initializing all the defined GPIO ports.*/
162#if STM32_HAS_GPIOA
163 gpio_init(GPIOA, &gpio_default_config.PAData);
164#endif
165#if STM32_HAS_GPIOB
166 gpio_init(GPIOB, &gpio_default_config.PBData);
167#endif
168#if STM32_HAS_GPIOC
169 gpio_init(GPIOC, &gpio_default_config.PCData);
170#endif
171#if STM32_HAS_GPIOD
172 gpio_init(GPIOD, &gpio_default_config.PDData);
173#endif
174#if STM32_HAS_GPIOE
175 gpio_init(GPIOE, &gpio_default_config.PEData);
176#endif
177#if STM32_HAS_GPIOF
178 gpio_init(GPIOF, &gpio_default_config.PFData);
179#endif
180#if STM32_HAS_GPIOG
181 gpio_init(GPIOG, &gpio_default_config.PGData);
182#endif
183#if STM32_HAS_GPIOH
184 gpio_init(GPIOH, &gpio_default_config.PHData);
185#endif
186#if STM32_HAS_GPIOI
187 gpio_init(GPIOI, &gpio_default_config.PIData);
188#endif
189#if STM32_HAS_GPIOJ
190 gpio_init(GPIOJ, &gpio_default_config.PJData);
191#endif
192#if STM32_HAS_GPIOK
193 gpio_init(GPIOK, &gpio_default_config.PKData);
194#endif
195}
196
197/*===========================================================================*/
198/* Driver interrupt handlers. */
199/*===========================================================================*/
200
201/*===========================================================================*/
202/* Driver exported functions. */
203/*===========================================================================*/
204
205/**
206 * @brief Early initialization code.
207 * @details GPIO ports and system clocks are initialized before everything
208 * else.
209 */
210void __early_init(void) {
211
212 stm32_gpio_init();
213 stm32_clock_init();
214}
215
216#if HAL_USE_SDC || defined(__DOXYGEN__)
217/**
218 * @brief SDC card detection.
219 */
220bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
221
222 (void)sdcp;
223 /* CHTODO: Fill the implementation.*/
224 return true;
225}
226
227/**
228 * @brief SDC card write protection detection.
229 */
230bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
231
232 (void)sdcp;
233 /* CHTODO: Fill the implementation.*/
234 return false;
235}
236#endif /* HAL_USE_SDC */
237
238#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
239/**
240 * @brief MMC_SPI card detection.
241 */
242bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
243
244 (void)mmcp;
245 /* CHTODO: Fill the implementation.*/
246 return true;
247}
248
249/**
250 * @brief MMC_SPI card write protection detection.
251 */
252bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
253
254 (void)mmcp;
255 /* CHTODO: Fill the implementation.*/
256 return false;
257}
258#endif
259
260/**
261 * @brief Board-specific initialization code.
262 * @note You can add your board-specific code here.
263 */
264void boardInit(void) {
265
266}
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.h b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.h
new file mode 100644
index 000000000..8ff81abcb
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.h
@@ -0,0 +1,953 @@
1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#ifndef BOARD_H
23#define BOARD_H
24
25/*===========================================================================*/
26/* Driver constants. */
27/*===========================================================================*/
28
29/*
30 * Setup for STMicroelectronics STM32 Nucleo32-F031K6 board.
31 */
32
33/*
34 * Board identifier.
35 */
36#define BOARD_ST_NUCLEO32_F031K6
37#define BOARD_NAME "STMicroelectronics STM32 Nucleo32-F031K6"
38
39/*
40 * Board oscillators-related settings.
41 * NOTE: LSE not fitted.
42 * NOTE: HSE not fitted.
43 */
44#if !defined(STM32_LSECLK)
45#define STM32_LSECLK 0U
46#endif
47
48#define STM32_LSEDRV (3U << 3U)
49
50#if !defined(STM32_HSECLK)
51#define STM32_HSECLK 0U
52#endif
53
54/*
55 * MCU type as defined in the ST header.
56 */
57#define STM32F031x6
58
59/*
60 * IO pins assignments.
61 */
62#define GPIOA_ARD_A0 0U
63#define GPIOA_ARD_A1 1U
64#define GPIOA_VCP_TX 2U
65#define GPIOA_ARD_A2 3U
66#define GPIOA_ARD_A3 4U
67#define GPIOA_ARD_A4 5U
68#define GPIOA_ARD_A5 6U
69#define GPIOA_ARD_A6 7U
70#define GPIOA_ARD_D9 8U
71#define GPIOA_ARD_D1 9U
72#define GPIOA_ARD_D0 10U
73#define GPIOA_ARD_D10 11U
74#define GPIOA_ARD_D2 12U
75#define GPIOA_SWDIO 13U
76#define GPIOA_SWCLK 14U
77#define GPIOA_VCP_RX 15U
78
79#define GPIOB_ARD_D3 0U
80#define GPIOB_ARD_D6 1U
81#define GPIOB_PIN2 2U
82#define GPIOB_ARD_D13 3U
83#define GPIOB_LED_GREEN 3U
84#define GPIOB_ARD_D12 4U
85#define GPIOB_ARD_D11 5U
86#define GPIOB_ARD_D5 6U
87#define GPIOB_ARD_A5_ALT 6U
88#define GPIOB_ARD_D4 7U
89#define GPIOB_ARD_A4_ALT 7U
90#define GPIOB_PIN8 8U
91#define GPIOB_PIN9 9U
92#define GPIOB_PIN10 10U
93#define GPIOB_PIN11 11U
94#define GPIOB_PIN12 12U
95#define GPIOB_PIN13 13U
96#define GPIOB_PIN14 14U
97#define GPIOB_PIN15 15U
98
99#define GPIOC_PIN0 0U
100#define GPIOC_PIN1 1U
101#define GPIOC_PIN2 2U
102#define GPIOC_PIN3 3U
103#define GPIOC_PIN4 4U
104#define GPIOC_PIN5 5U
105#define GPIOC_PIN6 6U
106#define GPIOC_PIN7 7U
107#define GPIOC_PIN8 8U
108#define GPIOC_PIN9 9U
109#define GPIOC_PIN10 10U
110#define GPIOC_PIN11 11U
111#define GPIOC_PIN12 12U
112#define GPIOC_PIN13 13U
113#define GPIOC_PIN14 14U
114#define GPIOC_PIN15 15U
115
116#define GPIOD_PIN0 0U
117#define GPIOD_PIN1 1U
118#define GPIOD_PIN2 2U
119#define GPIOD_PIN3 3U
120#define GPIOD_PIN4 4U
121#define GPIOD_PIN5 5U
122#define GPIOD_PIN6 6U
123#define GPIOD_PIN7 7U
124#define GPIOD_PIN8 8U
125#define GPIOD_PIN9 9U
126#define GPIOD_PIN10 10U
127#define GPIOD_PIN11 11U
128#define GPIOD_PIN12 12U
129#define GPIOD_PIN13 13U
130#define GPIOD_PIN14 14U
131#define GPIOD_PIN15 15U
132
133#define GPIOE_PIN0 0U
134#define GPIOE_PIN1 1U
135#define GPIOE_PIN2 2U
136#define GPIOE_PIN3 3U
137#define GPIOE_PIN4 4U
138#define GPIOE_PIN5 5U
139#define GPIOE_PIN6 6U
140#define GPIOE_PIN7 7U
141#define GPIOE_PIN8 8U
142#define GPIOE_PIN9 9U
143#define GPIOE_PIN10 10U
144#define GPIOE_PIN11 11U
145#define GPIOE_PIN12 12U
146#define GPIOE_PIN13 13U
147#define GPIOE_PIN14 14U
148#define GPIOE_PIN15 15U
149
150#define GPIOF_ARD_D7 0U
151#define GPIOF_ARD_D8 1U
152#define GPIOF_PIN2 2U
153#define GPIOF_PIN3 3U
154#define GPIOF_PIN4 4U
155#define GPIOF_PIN5 5U
156#define GPIOF_PIN6 6U
157#define GPIOF_PIN7 7U
158#define GPIOF_PIN8 8U
159#define GPIOF_PIN9 9U
160#define GPIOF_PIN10 10U
161#define GPIOF_PIN11 11U
162#define GPIOF_PIN12 12U
163#define GPIOF_PIN13 13U
164#define GPIOF_PIN14 14U
165#define GPIOF_PIN15 15U
166
167/*
168 * IO lines assignments.
169 */
170#define LINE_ARD_A0 PAL_LINE(GPIOA, 0U)
171#define LINE_ARD_A1 PAL_LINE(GPIOA, 1U)
172#define LINE_VCP_TX PAL_LINE(GPIOA, 2U)
173#define LINE_ARD_A2 PAL_LINE(GPIOA, 3U)
174#define LINE_ARD_A3 PAL_LINE(GPIOA, 4U)
175#define LINE_ARD_A4 PAL_LINE(GPIOA, 5U)
176#define LINE_ARD_A5 PAL_LINE(GPIOA, 6U)
177#define LINE_ARD_A6 PAL_LINE(GPIOA, 7U)
178#define LINE_ARD_D9 PAL_LINE(GPIOA, 8U)
179#define LINE_ARD_D1 PAL_LINE(GPIOA, 9U)
180#define LINE_ARD_D0 PAL_LINE(GPIOA, 10U)
181#define LINE_ARD_D10 PAL_LINE(GPIOA, 11U)
182#define LINE_ARD_D2 PAL_LINE(GPIOA, 12U)
183#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
184#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
185#define LINE_VCP_RX PAL_LINE(GPIOA, 15U)
186#define LINE_ARD_D3 PAL_LINE(GPIOB, 0U)
187#define LINE_ARD_D6 PAL_LINE(GPIOB, 1U)
188#define LINE_ARD_D13 PAL_LINE(GPIOB, 3U)
189#define LINE_LED_GREEN PAL_LINE(GPIOB, 3U)
190#define LINE_ARD_D12 PAL_LINE(GPIOB, 4U)
191#define LINE_ARD_D11 PAL_LINE(GPIOB, 5U)
192#define LINE_ARD_D5 PAL_LINE(GPIOB, 6U)
193#define LINE_ARD_A5_ALT PAL_LINE(GPIOB, 6U)
194#define LINE_ARD_D4 PAL_LINE(GPIOB, 7U)
195#define LINE_ARD_A4_ALT PAL_LINE(GPIOB, 7U)
196#define LINE_ARD_D7 PAL_LINE(GPIOF, 0U)
197#define LINE_ARD_D8 PAL_LINE(GPIOF, 1U)
198
199/*===========================================================================*/
200/* Driver pre-compile time settings. */
201/*===========================================================================*/
202
203/*===========================================================================*/
204/* Derived constants and error checks. */
205/*===========================================================================*/
206
207/*===========================================================================*/
208/* Driver data structures and types. */
209/*===========================================================================*/
210
211/*===========================================================================*/
212/* Driver macros. */
213/*===========================================================================*/
214
215/*
216 * I/O ports initial setup, this configuration is established soon after reset
217 * in the initialization code.
218 * Please refer to the STM32 Reference Manual for details.
219 */
220#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
221#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
222#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
223#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
224#define PIN_ODR_LOW(n) (0U << (n))
225#define PIN_ODR_HIGH(n) (1U << (n))
226#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
227#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
228#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
229#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
230#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
231#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
232#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
233#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
234#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
235#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
236
237/*
238 * GPIOA setup:
239 *
240 * PA0 - ARD_A0 (input pullup).
241 * PA1 - ARD_A1 (input pullup).
242 * PA2 - VCP_TX (alternate 1).
243 * PA3 - ARD_A2 (input pullup).
244 * PA4 - ARD_A3 (input pullup).
245 * PA5 - ARD_A4 (input pullup).
246 * PA6 - ARD_A5 (input pullup).
247 * PA7 - ARD_A6 (input pullup).
248 * PA8 - ARD_D9 (input pullup).
249 * PA9 - ARD_D1 (input pullup).
250 * PA10 - ARD_D0 (input pullup).
251 * PA11 - ARD_D10 (input pullup).
252 * PA12 - ARD_D2 (input pullup).
253 * PA13 - SWDIO (alternate 0).
254 * PA14 - SWCLK (alternate 0).
255 * PA15 - VCP_RX (alternate 1).
256 */
257#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_ARD_A0) | \
258 PIN_MODE_INPUT(GPIOA_ARD_A1) | \
259 PIN_MODE_ALTERNATE(GPIOA_VCP_TX) | \
260 PIN_MODE_INPUT(GPIOA_ARD_A2) | \
261 PIN_MODE_INPUT(GPIOA_ARD_A3) | \
262 PIN_MODE_INPUT(GPIOA_ARD_A4) | \
263 PIN_MODE_INPUT(GPIOA_ARD_A5) | \
264 PIN_MODE_INPUT(GPIOA_ARD_A6) | \
265 PIN_MODE_INPUT(GPIOA_ARD_D9) | \
266 PIN_MODE_INPUT(GPIOA_ARD_D1) | \
267 PIN_MODE_INPUT(GPIOA_ARD_D0) | \
268 PIN_MODE_INPUT(GPIOA_ARD_D10) | \
269 PIN_MODE_INPUT(GPIOA_ARD_D2) | \
270 PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
271 PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
272 PIN_MODE_ALTERNATE(GPIOA_VCP_RX))
273#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) | \
274 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) | \
275 PIN_OTYPE_PUSHPULL(GPIOA_VCP_TX) | \
276 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) | \
277 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A3) | \
278 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A4) | \
279 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A5) | \
280 PIN_OTYPE_PUSHPULL(GPIOA_ARD_A6) | \
281 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D9) | \
282 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) | \
283 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) | \
284 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D10) | \
285 PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) | \
286 PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
287 PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
288 PIN_OTYPE_PUSHPULL(GPIOA_VCP_RX))
289#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_ARD_A0) | \
290 PIN_OSPEED_HIGH(GPIOA_ARD_A1) | \
291 PIN_OSPEED_LOW(GPIOA_VCP_TX) | \
292 PIN_OSPEED_LOW(GPIOA_ARD_A2) | \
293 PIN_OSPEED_HIGH(GPIOA_ARD_A3) | \
294 PIN_OSPEED_LOW(GPIOA_ARD_A4) | \
295 PIN_OSPEED_HIGH(GPIOA_ARD_A5) | \
296 PIN_OSPEED_HIGH(GPIOA_ARD_A6) | \
297 PIN_OSPEED_HIGH(GPIOA_ARD_D9) | \
298 PIN_OSPEED_HIGH(GPIOA_ARD_D1) | \
299 PIN_OSPEED_HIGH(GPIOA_ARD_D0) | \
300 PIN_OSPEED_HIGH(GPIOA_ARD_D10) | \
301 PIN_OSPEED_HIGH(GPIOA_ARD_D2) | \
302 PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
303 PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
304 PIN_OSPEED_HIGH(GPIOA_VCP_RX))
305#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_ARD_A0) | \
306 PIN_PUPDR_PULLUP(GPIOA_ARD_A1) | \
307 PIN_PUPDR_FLOATING(GPIOA_VCP_TX) | \
308 PIN_PUPDR_PULLUP(GPIOA_ARD_A2) | \
309 PIN_PUPDR_PULLUP(GPIOA_ARD_A3) | \
310 PIN_PUPDR_PULLUP(GPIOA_ARD_A4) | \
311 PIN_PUPDR_PULLUP(GPIOA_ARD_A5) | \
312 PIN_PUPDR_PULLUP(GPIOA_ARD_A6) | \
313 PIN_PUPDR_PULLUP(GPIOA_ARD_D9) | \
314 PIN_PUPDR_PULLUP(GPIOA_ARD_D1) | \
315 PIN_PUPDR_PULLUP(GPIOA_ARD_D0) | \
316 PIN_PUPDR_PULLUP(GPIOA_ARD_D10) | \
317 PIN_PUPDR_PULLUP(GPIOA_ARD_D2) | \
318 PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
319 PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
320 PIN_PUPDR_FLOATING(GPIOA_VCP_RX))
321#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_ARD_A0) | \
322 PIN_ODR_HIGH(GPIOA_ARD_A1) | \
323 PIN_ODR_HIGH(GPIOA_VCP_TX) | \
324 PIN_ODR_HIGH(GPIOA_ARD_A2) | \
325 PIN_ODR_HIGH(GPIOA_ARD_A3) | \
326 PIN_ODR_LOW(GPIOA_ARD_A4) | \
327 PIN_ODR_HIGH(GPIOA_ARD_A5) | \
328 PIN_ODR_HIGH(GPIOA_ARD_A6) | \
329 PIN_ODR_HIGH(GPIOA_ARD_D9) | \
330 PIN_ODR_HIGH(GPIOA_ARD_D1) | \
331 PIN_ODR_HIGH(GPIOA_ARD_D0) | \
332 PIN_ODR_HIGH(GPIOA_ARD_D10) | \
333 PIN_ODR_HIGH(GPIOA_ARD_D2) | \
334 PIN_ODR_HIGH(GPIOA_SWDIO) | \
335 PIN_ODR_HIGH(GPIOA_SWCLK) | \
336 PIN_ODR_HIGH(GPIOA_VCP_RX))
337#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) | \
338 PIN_AFIO_AF(GPIOA_ARD_A1, 0U) | \
339 PIN_AFIO_AF(GPIOA_VCP_TX, 1U) | \
340 PIN_AFIO_AF(GPIOA_ARD_A2, 0U) | \
341 PIN_AFIO_AF(GPIOA_ARD_A3, 0U) | \
342 PIN_AFIO_AF(GPIOA_ARD_A4, 0U) | \
343 PIN_AFIO_AF(GPIOA_ARD_A5, 0U) | \
344 PIN_AFIO_AF(GPIOA_ARD_A6, 0U))
345#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_ARD_D9, 0U) | \
346 PIN_AFIO_AF(GPIOA_ARD_D1, 0U) | \
347 PIN_AFIO_AF(GPIOA_ARD_D0, 0U) | \
348 PIN_AFIO_AF(GPIOA_ARD_D10, 0U) | \
349 PIN_AFIO_AF(GPIOA_ARD_D2, 0U) | \
350 PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
351 PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
352 PIN_AFIO_AF(GPIOA_VCP_RX, 1U))
353
354/*
355 * GPIOB setup:
356 *
357 * PB0 - ARD_D3 (input pullup).
358 * PB1 - ARD_D6 (input pullup).
359 * PB2 - PIN2 (input pullup).
360 * PB3 - ARD_D13 LED_GREEN (output pushpull maximum).
361 * PB4 - ARD_D12 (input pullup).
362 * PB5 - ARD_D11 (input pullup).
363 * PB6 - ARD_D5 ARD_A5_ALT (input pullup).
364 * PB7 - ARD_D4 ARD_A4_ALT (input pullup).
365 * PB8 - PIN8 (input pullup).
366 * PB9 - PIN9 (input pullup).
367 * PB10 - PIN10 (input pullup).
368 * PB11 - PIN11 (input pullup).
369 * PB12 - PIN12 (input pullup).
370 * PB13 - PIN13 (input pullup).
371 * PB14 - PIN14 (input pullup).
372 * PB15 - PIN15 (input pullup).
373 */
374#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_ARD_D3) | \
375 PIN_MODE_INPUT(GPIOB_ARD_D6) | \
376 PIN_MODE_INPUT(GPIOB_PIN2) | \
377 PIN_MODE_OUTPUT(GPIOB_ARD_D13) | \
378 PIN_MODE_INPUT(GPIOB_ARD_D12) | \
379 PIN_MODE_INPUT(GPIOB_ARD_D11) | \
380 PIN_MODE_INPUT(GPIOB_ARD_D5) | \
381 PIN_MODE_INPUT(GPIOB_ARD_D4) | \
382 PIN_MODE_INPUT(GPIOB_PIN8) | \
383 PIN_MODE_INPUT(GPIOB_PIN9) | \
384 PIN_MODE_INPUT(GPIOB_PIN10) | \
385 PIN_MODE_INPUT(GPIOB_PIN11) | \
386 PIN_MODE_INPUT(GPIOB_PIN12) | \
387 PIN_MODE_INPUT(GPIOB_PIN13) | \
388 PIN_MODE_INPUT(GPIOB_PIN14) | \
389 PIN_MODE_INPUT(GPIOB_PIN15))
390#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) | \
391 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) | \
392 PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
393 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D13) | \
394 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D12) | \
395 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D11) | \
396 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) | \
397 PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) | \
398 PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
399 PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
400 PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
401 PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
402 PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
403 PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
404 PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
405 PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
406#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_ARD_D3) | \
407 PIN_OSPEED_HIGH(GPIOB_ARD_D6) | \
408 PIN_OSPEED_HIGH(GPIOB_PIN2) | \
409 PIN_OSPEED_HIGH(GPIOB_ARD_D13) | \
410 PIN_OSPEED_HIGH(GPIOB_ARD_D12) | \
411 PIN_OSPEED_HIGH(GPIOB_ARD_D11) | \
412 PIN_OSPEED_HIGH(GPIOB_ARD_D5) | \
413 PIN_OSPEED_HIGH(GPIOB_ARD_D4) | \
414 PIN_OSPEED_HIGH(GPIOB_PIN8) | \
415 PIN_OSPEED_HIGH(GPIOB_PIN9) | \
416 PIN_OSPEED_HIGH(GPIOB_PIN10) | \
417 PIN_OSPEED_HIGH(GPIOB_PIN11) | \
418 PIN_OSPEED_HIGH(GPIOB_PIN12) | \
419 PIN_OSPEED_HIGH(GPIOB_PIN13) | \
420 PIN_OSPEED_HIGH(GPIOB_PIN14) | \
421 PIN_OSPEED_HIGH(GPIOB_PIN15))
422#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_ARD_D3) | \
423 PIN_PUPDR_PULLUP(GPIOB_ARD_D6) | \
424 PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
425 PIN_PUPDR_FLOATING(GPIOB_ARD_D13) | \
426 PIN_PUPDR_PULLUP(GPIOB_ARD_D12) | \
427 PIN_PUPDR_PULLUP(GPIOB_ARD_D11) | \
428 PIN_PUPDR_PULLUP(GPIOB_ARD_D5) | \
429 PIN_PUPDR_PULLUP(GPIOB_ARD_D4) | \
430 PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
431 PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
432 PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
433 PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
434 PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
435 PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
436 PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
437 PIN_PUPDR_PULLUP(GPIOB_PIN15))
438#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_ARD_D3) | \
439 PIN_ODR_HIGH(GPIOB_ARD_D6) | \
440 PIN_ODR_HIGH(GPIOB_PIN2) | \
441 PIN_ODR_LOW(GPIOB_ARD_D13) | \
442 PIN_ODR_HIGH(GPIOB_ARD_D12) | \
443 PIN_ODR_HIGH(GPIOB_ARD_D11) | \
444 PIN_ODR_HIGH(GPIOB_ARD_D5) | \
445 PIN_ODR_HIGH(GPIOB_ARD_D4) | \
446 PIN_ODR_HIGH(GPIOB_PIN8) | \
447 PIN_ODR_HIGH(GPIOB_PIN9) | \
448 PIN_ODR_HIGH(GPIOB_PIN10) | \
449 PIN_ODR_HIGH(GPIOB_PIN11) | \
450 PIN_ODR_HIGH(GPIOB_PIN12) | \
451 PIN_ODR_HIGH(GPIOB_PIN13) | \
452 PIN_ODR_HIGH(GPIOB_PIN14) | \
453 PIN_ODR_HIGH(GPIOB_PIN15))
454#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_ARD_D3, 0U) | \
455 PIN_AFIO_AF(GPIOB_ARD_D6, 0U) | \
456 PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
457 PIN_AFIO_AF(GPIOB_ARD_D13, 0U) | \
458 PIN_AFIO_AF(GPIOB_ARD_D12, 0U) | \
459 PIN_AFIO_AF(GPIOB_ARD_D11, 0U) | \
460 PIN_AFIO_AF(GPIOB_ARD_D5, 0U) | \
461 PIN_AFIO_AF(GPIOB_ARD_D4, 0U))
462#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
463 PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
464 PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
465 PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
466 PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
467 PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
468 PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
469 PIN_AFIO_AF(GPIOB_PIN15, 0U))
470
471/*
472 * GPIOC setup:
473 *
474 * PC0 - PIN0 (input pullup).
475 * PC1 - PIN1 (input pullup).
476 * PC2 - PIN2 (input pullup).
477 * PC3 - PIN3 (input pullup).
478 * PC4 - PIN4 (input pullup).
479 * PC5 - PIN5 (input pullup).
480 * PC6 - PIN6 (input pullup).
481 * PC7 - PIN7 (input pullup).
482 * PC8 - PIN8 (input pullup).
483 * PC9 - PIN9 (input pullup).
484 * PC10 - PIN10 (input pullup).
485 * PC11 - PIN11 (input pullup).
486 * PC12 - PIN12 (input pullup).
487 * PC13 - PIN13 (input pullup).
488 * PC14 - PIN14 (input pullup).
489 * PC15 - PIN15 (input pullup).
490 */
491#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
492 PIN_MODE_INPUT(GPIOC_PIN1) | \
493 PIN_MODE_INPUT(GPIOC_PIN2) | \
494 PIN_MODE_INPUT(GPIOC_PIN3) | \
495 PIN_MODE_INPUT(GPIOC_PIN4) | \
496 PIN_MODE_INPUT(GPIOC_PIN5) | \
497 PIN_MODE_INPUT(GPIOC_PIN6) | \
498 PIN_MODE_INPUT(GPIOC_PIN7) | \
499 PIN_MODE_INPUT(GPIOC_PIN8) | \
500 PIN_MODE_INPUT(GPIOC_PIN9) | \
501 PIN_MODE_INPUT(GPIOC_PIN10) | \
502 PIN_MODE_INPUT(GPIOC_PIN11) | \
503 PIN_MODE_INPUT(GPIOC_PIN12) | \
504 PIN_MODE_INPUT(GPIOC_PIN13) | \
505 PIN_MODE_INPUT(GPIOC_PIN14) | \
506 PIN_MODE_INPUT(GPIOC_PIN15))
507#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
508 PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
509 PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
510 PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
511 PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
512 PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
513 PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
514 PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
515 PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
516 PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
517 PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
518 PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
519 PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
520 PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
521 PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
522 PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
523#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_PIN0) | \
524 PIN_OSPEED_HIGH(GPIOC_PIN1) | \
525 PIN_OSPEED_HIGH(GPIOC_PIN2) | \
526 PIN_OSPEED_HIGH(GPIOC_PIN3) | \
527 PIN_OSPEED_HIGH(GPIOC_PIN4) | \
528 PIN_OSPEED_HIGH(GPIOC_PIN5) | \
529 PIN_OSPEED_HIGH(GPIOC_PIN6) | \
530 PIN_OSPEED_HIGH(GPIOC_PIN7) | \
531 PIN_OSPEED_HIGH(GPIOC_PIN8) | \
532 PIN_OSPEED_HIGH(GPIOC_PIN9) | \
533 PIN_OSPEED_HIGH(GPIOC_PIN10) | \
534 PIN_OSPEED_HIGH(GPIOC_PIN11) | \
535 PIN_OSPEED_HIGH(GPIOC_PIN12) | \
536 PIN_OSPEED_HIGH(GPIOC_PIN13) | \
537 PIN_OSPEED_HIGH(GPIOC_PIN14) | \
538 PIN_OSPEED_HIGH(GPIOC_PIN15))
539#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
540 PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
541 PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
542 PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
543 PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
544 PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
545 PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
546 PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
547 PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
548 PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
549 PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
550 PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
551 PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
552 PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
553 PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
554 PIN_PUPDR_PULLUP(GPIOC_PIN15))
555#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
556 PIN_ODR_HIGH(GPIOC_PIN1) | \
557 PIN_ODR_HIGH(GPIOC_PIN2) | \
558 PIN_ODR_HIGH(GPIOC_PIN3) | \
559 PIN_ODR_HIGH(GPIOC_PIN4) | \
560 PIN_ODR_HIGH(GPIOC_PIN5) | \
561 PIN_ODR_HIGH(GPIOC_PIN6) | \
562 PIN_ODR_HIGH(GPIOC_PIN7) | \
563 PIN_ODR_HIGH(GPIOC_PIN8) | \
564 PIN_ODR_HIGH(GPIOC_PIN9) | \
565 PIN_ODR_HIGH(GPIOC_PIN10) | \
566 PIN_ODR_HIGH(GPIOC_PIN11) | \
567 PIN_ODR_HIGH(GPIOC_PIN12) | \
568 PIN_ODR_HIGH(GPIOC_PIN13) | \
569 PIN_ODR_HIGH(GPIOC_PIN14) | \
570 PIN_ODR_HIGH(GPIOC_PIN15))
571#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
572 PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
573 PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
574 PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
575 PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
576 PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
577 PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
578 PIN_AFIO_AF(GPIOC_PIN7, 0U))
579#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
580 PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
581 PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
582 PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
583 PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
584 PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
585 PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
586 PIN_AFIO_AF(GPIOC_PIN15, 0U))
587
588/*
589 * GPIOD setup:
590 *
591 * PD0 - PIN0 (input pullup).
592 * PD1 - PIN1 (input pullup).
593 * PD2 - PIN2 (input pullup).
594 * PD3 - PIN3 (input pullup).
595 * PD4 - PIN4 (input pullup).
596 * PD5 - PIN5 (input pullup).
597 * PD6 - PIN6 (input pullup).
598 * PD7 - PIN7 (input pullup).
599 * PD8 - PIN8 (input pullup).
600 * PD9 - PIN9 (input pullup).
601 * PD10 - PIN10 (input pullup).
602 * PD11 - PIN11 (input pullup).
603 * PD12 - PIN12 (input pullup).
604 * PD13 - PIN13 (input pullup).
605 * PD14 - PIN14 (input pullup).
606 * PD15 - PIN15 (input pullup).
607 */
608#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
609 PIN_MODE_INPUT(GPIOD_PIN1) | \
610 PIN_MODE_INPUT(GPIOD_PIN2) | \
611 PIN_MODE_INPUT(GPIOD_PIN3) | \
612 PIN_MODE_INPUT(GPIOD_PIN4) | \
613 PIN_MODE_INPUT(GPIOD_PIN5) | \
614 PIN_MODE_INPUT(GPIOD_PIN6) | \
615 PIN_MODE_INPUT(GPIOD_PIN7) | \
616 PIN_MODE_INPUT(GPIOD_PIN8) | \
617 PIN_MODE_INPUT(GPIOD_PIN9) | \
618 PIN_MODE_INPUT(GPIOD_PIN10) | \
619 PIN_MODE_INPUT(GPIOD_PIN11) | \
620 PIN_MODE_INPUT(GPIOD_PIN12) | \
621 PIN_MODE_INPUT(GPIOD_PIN13) | \
622 PIN_MODE_INPUT(GPIOD_PIN14) | \
623 PIN_MODE_INPUT(GPIOD_PIN15))
624#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
625 PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
626 PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
627 PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
628 PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
629 PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
630 PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
631 PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
632 PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
633 PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
634 PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
635 PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
636 PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
637 PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
638 PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
639 PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
640#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
641 PIN_OSPEED_HIGH(GPIOD_PIN1) | \
642 PIN_OSPEED_HIGH(GPIOD_PIN2) | \
643 PIN_OSPEED_HIGH(GPIOD_PIN3) | \
644 PIN_OSPEED_HIGH(GPIOD_PIN4) | \
645 PIN_OSPEED_HIGH(GPIOD_PIN5) | \
646 PIN_OSPEED_HIGH(GPIOD_PIN6) | \
647 PIN_OSPEED_HIGH(GPIOD_PIN7) | \
648 PIN_OSPEED_HIGH(GPIOD_PIN8) | \
649 PIN_OSPEED_HIGH(GPIOD_PIN9) | \
650 PIN_OSPEED_HIGH(GPIOD_PIN10) | \
651 PIN_OSPEED_HIGH(GPIOD_PIN11) | \
652 PIN_OSPEED_HIGH(GPIOD_PIN12) | \
653 PIN_OSPEED_HIGH(GPIOD_PIN13) | \
654 PIN_OSPEED_HIGH(GPIOD_PIN14) | \
655 PIN_OSPEED_HIGH(GPIOD_PIN15))
656#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
657 PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
658 PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
659 PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
660 PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
661 PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
662 PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
663 PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
664 PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
665 PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
666 PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
667 PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
668 PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
669 PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
670 PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
671 PIN_PUPDR_PULLUP(GPIOD_PIN15))
672#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
673 PIN_ODR_HIGH(GPIOD_PIN1) | \
674 PIN_ODR_HIGH(GPIOD_PIN2) | \
675 PIN_ODR_HIGH(GPIOD_PIN3) | \
676 PIN_ODR_HIGH(GPIOD_PIN4) | \
677 PIN_ODR_HIGH(GPIOD_PIN5) | \
678 PIN_ODR_HIGH(GPIOD_PIN6) | \
679 PIN_ODR_HIGH(GPIOD_PIN7) | \
680 PIN_ODR_HIGH(GPIOD_PIN8) | \
681 PIN_ODR_HIGH(GPIOD_PIN9) | \
682 PIN_ODR_HIGH(GPIOD_PIN10) | \
683 PIN_ODR_HIGH(GPIOD_PIN11) | \
684 PIN_ODR_HIGH(GPIOD_PIN12) | \
685 PIN_ODR_HIGH(GPIOD_PIN13) | \
686 PIN_ODR_HIGH(GPIOD_PIN14) | \
687 PIN_ODR_HIGH(GPIOD_PIN15))
688#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
689 PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
690 PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
691 PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
692 PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
693 PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
694 PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
695 PIN_AFIO_AF(GPIOD_PIN7, 0U))
696#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
697 PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
698 PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
699 PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
700 PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
701 PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
702 PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
703 PIN_AFIO_AF(GPIOD_PIN15, 0U))
704
705/*
706 * GPIOE setup:
707 *
708 * PE0 - PIN0 (input pullup).
709 * PE1 - PIN1 (input pullup).
710 * PE2 - PIN2 (input pullup).
711 * PE3 - PIN3 (input pullup).
712 * PE4 - PIN4 (input pullup).
713 * PE5 - PIN5 (input pullup).
714 * PE6 - PIN6 (input pullup).
715 * PE7 - PIN7 (input pullup).
716 * PE8 - PIN8 (input pullup).
717 * PE9 - PIN9 (input pullup).
718 * PE10 - PIN10 (input pullup).
719 * PE11 - PIN11 (input pullup).
720 * PE12 - PIN12 (input pullup).
721 * PE13 - PIN13 (input pullup).
722 * PE14 - PIN14 (input pullup).
723 * PE15 - PIN15 (input pullup).
724 */
725#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
726 PIN_MODE_INPUT(GPIOE_PIN1) | \
727 PIN_MODE_INPUT(GPIOE_PIN2) | \
728 PIN_MODE_INPUT(GPIOE_PIN3) | \
729 PIN_MODE_INPUT(GPIOE_PIN4) | \
730 PIN_MODE_INPUT(GPIOE_PIN5) | \
731 PIN_MODE_INPUT(GPIOE_PIN6) | \
732 PIN_MODE_INPUT(GPIOE_PIN7) | \
733 PIN_MODE_INPUT(GPIOE_PIN8) | \
734 PIN_MODE_INPUT(GPIOE_PIN9) | \
735 PIN_MODE_INPUT(GPIOE_PIN10) | \
736 PIN_MODE_INPUT(GPIOE_PIN11) | \
737 PIN_MODE_INPUT(GPIOE_PIN12) | \
738 PIN_MODE_INPUT(GPIOE_PIN13) | \
739 PIN_MODE_INPUT(GPIOE_PIN14) | \
740 PIN_MODE_INPUT(GPIOE_PIN15))
741#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \
742 PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \
743 PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \
744 PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
745 PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \
746 PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \
747 PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
748 PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
749 PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
750 PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
751 PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
752 PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
753 PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
754 PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
755 PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
756 PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
757#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
758 PIN_OSPEED_HIGH(GPIOE_PIN1) | \
759 PIN_OSPEED_HIGH(GPIOE_PIN2) | \
760 PIN_OSPEED_HIGH(GPIOE_PIN3) | \
761 PIN_OSPEED_HIGH(GPIOE_PIN4) | \
762 PIN_OSPEED_HIGH(GPIOE_PIN5) | \
763 PIN_OSPEED_HIGH(GPIOE_PIN6) | \
764 PIN_OSPEED_HIGH(GPIOE_PIN7) | \
765 PIN_OSPEED_HIGH(GPIOE_PIN8) | \
766 PIN_OSPEED_HIGH(GPIOE_PIN9) | \
767 PIN_OSPEED_HIGH(GPIOE_PIN10) | \
768 PIN_OSPEED_HIGH(GPIOE_PIN11) | \
769 PIN_OSPEED_HIGH(GPIOE_PIN12) | \
770 PIN_OSPEED_HIGH(GPIOE_PIN13) | \
771 PIN_OSPEED_HIGH(GPIOE_PIN14) | \
772 PIN_OSPEED_HIGH(GPIOE_PIN15))
773#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
774 PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
775 PIN_PUPDR_PULLUP(GPIOE_PIN2) | \
776 PIN_PUPDR_PULLUP(GPIOE_PIN3) | \
777 PIN_PUPDR_PULLUP(GPIOE_PIN4) | \
778 PIN_PUPDR_PULLUP(GPIOE_PIN5) | \
779 PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
780 PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
781 PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
782 PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
783 PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
784 PIN_PUPDR_PULLUP(GPIOE_PIN11) | \
785 PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
786 PIN_PUPDR_PULLUP(GPIOE_PIN13) | \
787 PIN_PUPDR_PULLUP(GPIOE_PIN14) | \
788 PIN_PUPDR_PULLUP(GPIOE_PIN15))
789#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
790 PIN_ODR_HIGH(GPIOE_PIN1) | \
791 PIN_ODR_HIGH(GPIOE_PIN2) | \
792 PIN_ODR_HIGH(GPIOE_PIN3) | \
793 PIN_ODR_HIGH(GPIOE_PIN4) | \
794 PIN_ODR_HIGH(GPIOE_PIN5) | \
795 PIN_ODR_HIGH(GPIOE_PIN6) | \
796 PIN_ODR_HIGH(GPIOE_PIN7) | \
797 PIN_ODR_HIGH(GPIOE_PIN8) | \
798 PIN_ODR_HIGH(GPIOE_PIN9) | \
799 PIN_ODR_HIGH(GPIOE_PIN10) | \
800 PIN_ODR_HIGH(GPIOE_PIN11) | \
801 PIN_ODR_HIGH(GPIOE_PIN12) | \
802 PIN_ODR_HIGH(GPIOE_PIN13) | \
803 PIN_ODR_HIGH(GPIOE_PIN14) | \
804 PIN_ODR_HIGH(GPIOE_PIN15))
805#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
806 PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
807 PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
808 PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
809 PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
810 PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
811 PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
812 PIN_AFIO_AF(GPIOE_PIN7, 0U))
813#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
814 PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
815 PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
816 PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
817 PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
818 PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
819 PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
820 PIN_AFIO_AF(GPIOE_PIN15, 0U))
821
822/*
823 * GPIOF setup:
824 *
825 * PF0 - ARD_D7 (input pullup).
826 * PF1 - ARD_D8 (input pullup).
827 * PF2 - PIN2 (input pullup).
828 * PF3 - PIN3 (input pullup).
829 * PF4 - PIN4 (input pullup).
830 * PF5 - PIN5 (input pullup).
831 * PF6 - PIN6 (input pullup).
832 * PF7 - PIN7 (input pullup).
833 * PF8 - PIN8 (input pullup).
834 * PF9 - PIN9 (input pullup).
835 * PF10 - PIN10 (input pullup).
836 * PF11 - PIN11 (input pullup).
837 * PF12 - PIN12 (input pullup).
838 * PF13 - PIN13 (input pullup).
839 * PF14 - PIN14 (input pullup).
840 * PF15 - PIN15 (input pullup).
841 */
842#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_ARD_D7) | \
843 PIN_MODE_INPUT(GPIOF_ARD_D8) | \
844 PIN_MODE_INPUT(GPIOF_PIN2) | \
845 PIN_MODE_INPUT(GPIOF_PIN3) | \
846 PIN_MODE_INPUT(GPIOF_PIN4) | \
847 PIN_MODE_INPUT(GPIOF_PIN5) | \
848 PIN_MODE_INPUT(GPIOF_PIN6) | \
849 PIN_MODE_INPUT(GPIOF_PIN7) | \
850 PIN_MODE_INPUT(GPIOF_PIN8) | \
851 PIN_MODE_INPUT(GPIOF_PIN9) | \
852 PIN_MODE_INPUT(GPIOF_PIN10) | \
853 PIN_MODE_INPUT(GPIOF_PIN11) | \
854 PIN_MODE_INPUT(GPIOF_PIN12) | \
855 PIN_MODE_INPUT(GPIOF_PIN13) | \
856 PIN_MODE_INPUT(GPIOF_PIN14) | \
857 PIN_MODE_INPUT(GPIOF_PIN15))
858#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_ARD_D7) | \
859 PIN_OTYPE_PUSHPULL(GPIOF_ARD_D8) | \
860 PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
861 PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
862 PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
863 PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
864 PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
865 PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
866 PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
867 PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
868 PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
869 PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
870 PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
871 PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
872 PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
873 PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
874#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_ARD_D7) | \
875 PIN_OSPEED_HIGH(GPIOF_ARD_D8) | \
876 PIN_OSPEED_HIGH(GPIOF_PIN2) | \
877 PIN_OSPEED_HIGH(GPIOF_PIN3) | \
878 PIN_OSPEED_HIGH(GPIOF_PIN4) | \
879 PIN_OSPEED_HIGH(GPIOF_PIN5) | \
880 PIN_OSPEED_HIGH(GPIOF_PIN6) | \
881 PIN_OSPEED_HIGH(GPIOF_PIN7) | \
882 PIN_OSPEED_HIGH(GPIOF_PIN8) | \
883 PIN_OSPEED_HIGH(GPIOF_PIN9) | \
884 PIN_OSPEED_HIGH(GPIOF_PIN10) | \
885 PIN_OSPEED_HIGH(GPIOF_PIN11) | \
886 PIN_OSPEED_HIGH(GPIOF_PIN12) | \
887 PIN_OSPEED_HIGH(GPIOF_PIN13) | \
888 PIN_OSPEED_HIGH(GPIOF_PIN14) | \
889 PIN_OSPEED_HIGH(GPIOF_PIN15))
890#define VAL_GPIOF_PUPDR (PIN_PUPDR_PULLUP(GPIOF_ARD_D7) | \
891 PIN_PUPDR_PULLUP(GPIOF_ARD_D8) | \
892 PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
893 PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
894 PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
895 PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
896 PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
897 PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
898 PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
899 PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
900 PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
901 PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
902 PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
903 PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
904 PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
905 PIN_PUPDR_PULLUP(GPIOF_PIN15))
906#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_ARD_D7) | \
907 PIN_ODR_HIGH(GPIOF_ARD_D8) | \
908 PIN_ODR_HIGH(GPIOF_PIN2) | \
909 PIN_ODR_HIGH(GPIOF_PIN3) | \
910 PIN_ODR_HIGH(GPIOF_PIN4) | \
911 PIN_ODR_HIGH(GPIOF_PIN5) | \
912 PIN_ODR_HIGH(GPIOF_PIN6) | \
913 PIN_ODR_HIGH(GPIOF_PIN7) | \
914 PIN_ODR_HIGH(GPIOF_PIN8) | \
915 PIN_ODR_HIGH(GPIOF_PIN9) | \
916 PIN_ODR_HIGH(GPIOF_PIN10) | \
917 PIN_ODR_HIGH(GPIOF_PIN11) | \
918 PIN_ODR_HIGH(GPIOF_PIN12) | \
919 PIN_ODR_HIGH(GPIOF_PIN13) | \
920 PIN_ODR_HIGH(GPIOF_PIN14) | \
921 PIN_ODR_HIGH(GPIOF_PIN15))
922#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_ARD_D7, 0U) | \
923 PIN_AFIO_AF(GPIOF_ARD_D8, 0U) | \
924 PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
925 PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
926 PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
927 PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
928 PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
929 PIN_AFIO_AF(GPIOF_PIN7, 0U))
930#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
931 PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
932 PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
933 PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
934 PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
935 PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
936 PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
937 PIN_AFIO_AF(GPIOF_PIN15, 0U))
938
939/*===========================================================================*/
940/* External declarations. */
941/*===========================================================================*/
942
943#if !defined(_FROM_ASM_)
944#ifdef __cplusplus
945extern "C" {
946#endif
947 void boardInit(void);
948#ifdef __cplusplus
949}
950#endif
951#endif /* _FROM_ASM_ */
952
953#endif /* BOARD_H */
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.mk b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.mk
new file mode 100644
index 000000000..dee941a0c
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/board.mk
@@ -0,0 +1,9 @@
1# List of all the board related files.
2BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_F031K6/board.c
3
4# Required include directories
5BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_F031K6
6
7# Shared variables
8ALLCSRC += $(BOARDSRC)
9ALLINC += $(BOARDINC)
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg
new file mode 100644
index 000000000..937718bda
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.chcfg
@@ -0,0 +1,799 @@
1<?xml version="1.0" encoding="UTF-8"?>
2<!-- STM32F0xx board Template -->
3<board
4 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
5 xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f0xx_board.xsd">
6 <configuration_settings>
7 <templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
8 <output_path>..</output_path>
9 <hal_version>5.0.x</hal_version>
10 </configuration_settings>
11 <board_name>STMicroelectronics STM32 Nucleo32-F031K6</board_name>
12 <board_id>ST_NUCLEO32_F031K6</board_id>
13 <board_functions></board_functions>
14 <subtype>STM32F031x6</subtype>
15 <clocks HSEFrequency="0" HSEBypass="false" LSEFrequency="0"
16 LSEBypass="false" LSEDrive="3 High Drive (default)" />
17 <ports>
18 <GPIOA>
19 <pin0
20 ID="ARD_A0"
21 Type="PushPull"
22 Level="High"
23 Speed="Maximum"
24 Resistor="PullUp"
25 Mode="Input"
26 Alternate="0" />
27 <pin1
28 ID="ARD_A1"
29 Type="PushPull"
30 Level="High"
31 Speed="Maximum"
32 Resistor="PullUp"
33 Mode="Input"
34 Alternate="0" />
35 <pin2
36 ID="VCP_TX"
37 Type="PushPull"
38 Level="High"
39 Speed="High"
40 Resistor="Floating"
41 Mode="Alternate"
42 Alternate="1" />
43 <pin3
44 ID="ARD_A2"
45 Type="PushPull"
46 Level="High"
47 Speed="High"
48 Resistor="PullUp"
49 Mode="Input"
50 Alternate="0" />
51 <pin4
52 ID="ARD_A3"
53 Type="PushPull"
54 Level="High"
55 Speed="Maximum"
56 Resistor="PullUp"
57 Mode="Input"
58 Alternate="0" />
59 <pin5
60 ID="ARD_A4"
61 Type="PushPull"
62 Level="Low"
63 Speed="High"
64 Resistor="PullUp"
65 Mode="Input"
66 Alternate="0" />
67 <pin6
68 ID="ARD_A5"
69 Type="PushPull"
70 Level="High"
71 Speed="Maximum"
72 Resistor="PullUp"
73 Mode="Input"
74 Alternate="0" />
75 <pin7
76 ID="ARD_A6"
77 Type="PushPull"
78 Level="High"
79 Speed="Maximum"
80 Resistor="PullUp"
81 Mode="Input"
82 Alternate="0" />
83 <pin8
84 ID="ARD_D9"
85 Type="PushPull"
86 Level="High"
87 Speed="Maximum"
88 Resistor="PullUp"
89 Mode="Input"
90 Alternate="0" />
91 <pin9
92 ID="ARD_D1"
93 Type="PushPull"
94 Level="High"
95 Speed="Maximum"
96 Resistor="PullUp"
97 Mode="Input"
98 Alternate="0" />
99 <pin10
100 ID="ARD_D0"
101 Type="PushPull"
102 Level="High"
103 Speed="Maximum"
104 Resistor="PullUp"
105 Mode="Input"
106 Alternate="0" />
107 <pin11
108 ID="ARD_D10"
109 Type="PushPull"
110 Level="High"
111 Speed="Maximum"
112 Resistor="PullUp"
113 Mode="Input"
114 Alternate="0" />
115 <pin12
116 ID="ARD_D2"
117 Type="PushPull"
118 Level="High"
119 Speed="Maximum"
120 Resistor="PullUp"
121 Mode="Input"
122 Alternate="0" />
123 <pin13
124 ID="SWDIO"
125 Type="PushPull"
126 Level="High"
127 Speed="Maximum"
128 Resistor="PullUp"
129 Mode="Alternate"
130 Alternate="0" />
131 <pin14
132 ID="SWCLK"
133 Type="PushPull"
134 Level="High"
135 Speed="Maximum"
136 Resistor="PullDown"
137 Mode="Alternate"
138 Alternate="0" />
139 <pin15
140 ID="VCP_RX"
141 Type="PushPull"
142 Level="High"
143 Speed="Maximum"
144 Resistor="Floating"
145 Mode="Alternate"
146 Alternate="1" />
147 </GPIOA>
148 <GPIOB>
149 <pin0
150 ID="ARD_D3"
151 Type="PushPull"
152 Level="High"
153 Speed="Maximum"
154 Resistor="PullUp"
155 Mode="Input"
156 Alternate="0" />
157 <pin1
158 ID="ARD_D6"
159 Type="PushPull"
160 Level="High"
161 Speed="Maximum"
162 Resistor="PullUp"
163 Mode="Input"
164 Alternate="0" />
165 <pin2
166 ID=""
167 Type="PushPull"
168 Level="High"
169 Speed="Maximum"
170 Resistor="PullUp"
171 Mode="Input"
172 Alternate="0" />
173 <pin3
174 ID="ARD_D13 LED_GREEN"
175 Type="PushPull"
176 Level="Low"
177 Speed="Maximum"
178 Resistor="Floating"
179 Mode="Output"
180 Alternate="0" />
181 <pin4
182 ID="ARD_D12"
183 Type="PushPull"
184 Level="High"
185 Speed="Maximum"
186 Resistor="PullUp"
187 Mode="Input"
188 Alternate="0" />
189 <pin5
190 ID="ARD_D11"
191 Type="PushPull"
192 Level="High"
193 Speed="Maximum"
194 Resistor="PullUp"
195 Mode="Input"
196 Alternate="0" />
197 <pin6
198 ID="ARD_D5 ARD_A5_ALT"
199 Type="PushPull"
200 Level="High"
201 Speed="Maximum"
202 Resistor="PullUp"
203 Mode="Input"
204 Alternate="0" />
205 <pin7
206 ID="ARD_D4 ARD_A4_ALT"
207 Type="PushPull"
208 Level="High"
209 Speed="Maximum"
210 Resistor="PullUp"
211 Mode="Input"
212 Alternate="0" />
213 <pin8
214 ID=""
215 Type="PushPull"
216 Level="High"
217 Speed="Maximum"
218 Resistor="PullUp"
219 Mode="Input"
220 Alternate="0" />
221 <pin9
222 ID=""
223 Type="PushPull"
224 Level="High"
225 Speed="Maximum"
226 Resistor="PullUp"
227 Mode="Input"
228 Alternate="0" />
229 <pin10
230 ID=""
231 Type="PushPull"
232 Level="High"
233 Speed="Maximum"
234 Resistor="PullUp"
235 Mode="Input"
236 Alternate="0" />
237 <pin11
238 ID=""
239 Type="PushPull"
240 Level="High"
241 Speed="Maximum"
242 Resistor="PullUp"
243 Mode="Input"
244 Alternate="0" />
245 <pin12
246 ID=""
247 Type="PushPull"
248 Level="High"
249 Speed="Maximum"
250 Resistor="PullUp"
251 Mode="Input"
252 Alternate="0" />
253 <pin13
254 ID=""
255 Type="PushPull"
256 Level="High"
257 Speed="Maximum"
258 Resistor="PullUp"
259 Mode="Input"
260 Alternate="0" />
261 <pin14
262 ID=""
263 Type="PushPull"
264 Level="High"
265 Speed="Maximum"
266 Resistor="PullUp"
267 Mode="Input"
268 Alternate="0" />
269 <pin15
270 ID=""
271 Type="PushPull"
272 Level="High"
273 Speed="Maximum"
274 Resistor="PullUp"
275 Mode="Input"
276 Alternate="0" />
277 </GPIOB>
278 <GPIOC>
279 <pin0
280 ID=""
281 Type="PushPull"
282 Level="High"
283 Speed="Maximum"
284 Resistor="PullUp"
285 Mode="Input"
286 Alternate="0" />
287 <pin1
288 ID=""
289 Type="PushPull"
290 Level="High"
291 Speed="Maximum"
292 Resistor="PullUp"
293 Mode="Input"
294 Alternate="0" />
295 <pin2
296 ID=""
297 Type="PushPull"
298 Level="High"
299 Speed="Maximum"
300 Resistor="PullUp"
301 Mode="Input"
302 Alternate="0" />
303 <pin3
304 ID=""
305 Type="PushPull"
306 Level="High"
307 Speed="Maximum"
308 Resistor="PullUp"
309 Mode="Input"
310 Alternate="0" />
311 <pin4
312 ID=""
313 Type="PushPull"
314 Level="High"
315 Speed="Maximum"
316 Resistor="PullUp"
317 Mode="Input"
318 Alternate="0" />
319 <pin5
320 ID=""
321 Type="PushPull"
322 Level="High"
323 Speed="Maximum"
324 Resistor="PullUp"
325 Mode="Input"
326 Alternate="0" />
327 <pin6
328 ID=""
329 Type="PushPull"
330 Level="High"
331 Speed="Maximum"
332 Resistor="PullUp"
333 Mode="Input"
334 Alternate="0" />
335 <pin7
336 ID=""
337 Type="PushPull"
338 Level="High"
339 Speed="Maximum"
340 Resistor="PullUp"
341 Mode="Input"
342 Alternate="0" />
343 <pin8
344 ID=""
345 Type="PushPull"
346 Level="High"
347 Speed="Maximum"
348 Resistor="PullUp"
349 Mode="Input"
350 Alternate="0" />
351 <pin9
352 ID=""
353 Type="PushPull"
354 Level="High"
355 Speed="Maximum"
356 Resistor="PullUp"
357 Mode="Input"
358 Alternate="0" />
359 <pin10
360 ID=""
361 Type="PushPull"
362 Level="High"
363 Speed="Maximum"
364 Resistor="PullUp"
365 Mode="Input"
366 Alternate="0" />
367 <pin11
368 ID=""
369 Type="PushPull"
370 Level="High"
371 Speed="Maximum"
372 Resistor="PullUp"
373 Mode="Input"
374 Alternate="0" />
375 <pin12
376 ID=""
377 Type="PushPull"
378 Level="High"
379 Speed="Maximum"
380 Resistor="PullUp"
381 Mode="Input"
382 Alternate="0" />
383 <pin13
384 ID=""
385 Type="PushPull"
386 Level="High"
387 Speed="Maximum"
388 Resistor="PullUp"
389 Mode="Input"
390 Alternate="0" />
391 <pin14
392 ID=""
393 Type="PushPull"
394 Level="High"
395 Speed="Maximum"
396 Resistor="PullUp"
397 Mode="Input"
398 Alternate="0" />
399 <pin15
400 ID=""
401 Type="PushPull"
402 Level="High"
403 Speed="Maximum"
404 Resistor="PullUp"
405 Mode="Input"
406 Alternate="0" />
407 </GPIOC>
408 <GPIOD>
409 <pin0
410 ID=""
411 Type="PushPull"
412 Level="High"
413 Speed="Maximum"
414 Resistor="PullUp"
415 Mode="Input"
416 Alternate="0" />
417 <pin1
418 ID=""
419 Type="PushPull"
420 Level="High"
421 Speed="Maximum"
422 Resistor="PullUp"
423 Mode="Input"
424 Alternate="0" />
425 <pin2
426 ID=""
427 Type="PushPull"
428 Level="High"
429 Speed="Maximum"
430 Resistor="PullUp"
431 Mode="Input"
432 Alternate="0" />
433 <pin3
434 ID=""
435 Type="PushPull"
436 Level="High"
437 Speed="Maximum"
438 Resistor="PullUp"
439 Mode="Input"
440 Alternate="0" />
441 <pin4
442 ID=""
443 Type="PushPull"
444 Level="High"
445 Speed="Maximum"
446 Resistor="PullUp"
447 Mode="Input"
448 Alternate="0" />
449 <pin5
450 ID=""
451 Type="PushPull"
452 Level="High"
453 Speed="Maximum"
454 Resistor="PullUp"
455 Mode="Input"
456 Alternate="0" />
457 <pin6
458 ID=""
459 Type="PushPull"
460 Level="High"
461 Speed="Maximum"
462 Resistor="PullUp"
463 Mode="Input"
464 Alternate="0" />
465 <pin7
466 ID=""
467 Type="PushPull"
468 Level="High"
469 Speed="Maximum"
470 Resistor="PullUp"
471 Mode="Input"
472 Alternate="0" />
473 <pin8
474 ID=""
475 Type="PushPull"
476 Level="High"
477 Speed="Maximum"
478 Resistor="PullUp"
479 Mode="Input"
480 Alternate="0" />
481 <pin9
482 ID=""
483 Type="PushPull"
484 Level="High"
485 Speed="Maximum"
486 Resistor="PullUp"
487 Mode="Input"
488 Alternate="0" />
489 <pin10
490 ID=""
491 Type="PushPull"
492 Level="High"
493 Speed="Maximum"
494 Resistor="PullUp"
495 Mode="Input"
496 Alternate="0" />
497 <pin11
498 ID=""
499 Type="PushPull"
500 Level="High"
501 Speed="Maximum"
502 Resistor="PullUp"
503 Mode="Input"
504 Alternate="0" />
505 <pin12
506 ID=""
507 Type="PushPull"
508 Level="High"
509 Speed="Maximum"
510 Resistor="PullUp"
511 Mode="Input"
512 Alternate="0" />
513 <pin13
514 ID=""
515 Type="PushPull"
516 Level="High"
517 Speed="Maximum"
518 Resistor="PullUp"
519 Mode="Input"
520 Alternate="0" />
521 <pin14
522 ID=""
523 Type="PushPull"
524 Level="High"
525 Speed="Maximum"
526 Resistor="PullUp"
527 Mode="Input"
528 Alternate="0" />
529 <pin15
530 ID=""
531 Type="PushPull"
532 Level="High"
533 Speed="Maximum"
534 Resistor="PullUp"
535 Mode="Input"
536 Alternate="0" />
537 </GPIOD>
538 <GPIOE>
539 <pin0
540 ID=""
541 Type="PushPull"
542 Level="High"
543 Speed="Maximum"
544 Resistor="PullUp"
545 Mode="Input"
546 Alternate="0" />
547 <pin1
548 ID=""
549 Type="PushPull"
550 Level="High"
551 Speed="Maximum"
552 Resistor="PullUp"
553 Mode="Input"
554 Alternate="0" />
555 <pin2
556 ID=""
557 Type="PushPull"
558 Level="High"
559 Speed="Maximum"
560 Resistor="PullUp"
561 Mode="Input"
562 Alternate="0" />
563 <pin3
564 ID=""
565 Type="PushPull"
566 Level="High"
567 Speed="Maximum"
568 Resistor="PullUp"
569 Mode="Input"
570 Alternate="0" />
571 <pin4
572 ID=""
573 Type="PushPull"
574 Level="High"
575 Speed="Maximum"
576 Resistor="PullUp"
577 Mode="Input"
578 Alternate="0" />
579 <pin5
580 ID=""
581 Type="PushPull"
582 Level="High"
583 Speed="Maximum"
584 Resistor="PullUp"
585 Mode="Input"
586 Alternate="0" />
587 <pin6
588 ID=""
589 Type="PushPull"
590 Level="High"
591 Speed="Maximum"
592 Resistor="PullUp"
593 Mode="Input"
594 Alternate="0" />
595 <pin7
596 ID=""
597 Type="PushPull"
598 Level="High"
599 Speed="Maximum"
600 Resistor="PullUp"
601 Mode="Input"
602 Alternate="0" />
603 <pin8
604 ID=""
605 Type="PushPull"
606 Level="High"
607 Speed="Maximum"
608 Resistor="PullUp"
609 Mode="Input"
610 Alternate="0" />
611 <pin9
612 ID=""
613 Type="PushPull"
614 Level="High"
615 Speed="Maximum"
616 Resistor="PullUp"
617 Mode="Input"
618 Alternate="0" />
619 <pin10
620 ID=""
621 Type="PushPull"
622 Level="High"
623 Speed="Maximum"
624 Resistor="PullUp"
625 Mode="Input"
626 Alternate="0" />
627 <pin11
628 ID=""
629 Type="PushPull"
630 Level="High"
631 Speed="Maximum"
632 Resistor="PullUp"
633 Mode="Input"
634 Alternate="0" />
635 <pin12
636 ID=""
637 Type="PushPull"
638 Level="High"
639 Speed="Maximum"
640 Resistor="PullUp"
641 Mode="Input"
642 Alternate="0" />
643 <pin13
644 ID=""
645 Type="PushPull"
646 Level="High"
647 Speed="Maximum"
648 Resistor="PullUp"
649 Mode="Input"
650 Alternate="0" />
651 <pin14
652 ID=""
653 Type="PushPull"
654 Level="High"
655 Speed="Maximum"
656 Resistor="PullUp"
657 Mode="Input"
658 Alternate="0" />
659 <pin15
660 ID=""
661 Type="PushPull"
662 Level="High"
663 Speed="Maximum"
664 Resistor="PullUp"
665 Mode="Input"
666 Alternate="0" />
667 </GPIOE>
668 <GPIOF>
669 <pin0
670 ID="ARD_D7"
671 Type="PushPull"
672 Level="High"
673 Speed="Maximum"
674 Resistor="PullUp"
675 Mode="Input"
676 Alternate="0" />
677 <pin1
678 ID="ARD_D8"
679 Type="PushPull"
680 Level="High"
681 Speed="Maximum"
682 Resistor="PullUp"
683 Mode="Input"
684 Alternate="0" />
685 <pin2
686 ID=""
687 Type="PushPull"
688 Level="High"
689 Speed="Maximum"
690 Resistor="PullUp"
691 Mode="Input"
692 Alternate="0" />
693 <pin3
694 ID=""
695 Type="PushPull"
696 Level="High"
697 Speed="Maximum"
698 Resistor="PullUp"
699 Mode="Input"
700 Alternate="0" />
701 <pin4
702 ID=""
703 Type="PushPull"
704 Level="High"
705 Speed="Maximum"
706 Resistor="PullUp"
707 Mode="Input"
708 Alternate="0" />
709 <pin5
710 ID=""
711 Type="PushPull"
712 Level="High"
713 Speed="Maximum"
714 Resistor="PullUp"
715 Mode="Input"
716 Alternate="0" />
717 <pin6
718 ID=""
719 Type="PushPull"
720 Level="High"
721 Speed="Maximum"
722 Resistor="PullUp"
723 Mode="Input"
724 Alternate="0" />
725 <pin7
726 ID=""
727 Type="PushPull"
728 Level="High"
729 Speed="Maximum"
730 Resistor="PullUp"
731 Mode="Input"
732 Alternate="0" />
733 <pin8
734 ID=""
735 Type="PushPull"
736 Level="High"
737 Speed="Maximum"
738 Resistor="PullUp"
739 Mode="Input"
740 Alternate="0" />
741 <pin9
742 ID=""
743 Type="PushPull"
744 Level="High"
745 Speed="Maximum"
746 Resistor="PullUp"
747 Mode="Input"
748 Alternate="0" />
749 <pin10
750 ID=""
751 Type="PushPull"
752 Level="High"
753 Speed="Maximum"
754 Resistor="PullUp"
755 Mode="Input"
756 Alternate="0" />
757 <pin11
758 ID=""
759 Type="PushPull"
760 Level="High"
761 Speed="Maximum"
762 Resistor="PullUp"
763 Mode="Input"
764 Alternate="0" />
765 <pin12
766 ID=""
767 Type="PushPull"
768 Level="High"
769 Speed="Maximum"
770 Resistor="PullUp"
771 Mode="Input"
772 Alternate="0" />
773 <pin13
774 ID=""
775 Type="PushPull"
776 Level="High"
777 Speed="Maximum"
778 Resistor="PullUp"
779 Mode="Input"
780 Alternate="0" />
781 <pin14
782 ID=""
783 Type="PushPull"
784 Level="High"
785 Speed="Maximum"
786 Resistor="PullUp"
787 Mode="Input"
788 Alternate="0" />
789 <pin15
790 ID=""
791 Type="PushPull"
792 Level="High"
793 Speed="Maximum"
794 Resistor="PullUp"
795 Mode="Input"
796 Alternate="0" />
797 </GPIOF>
798 </ports>
799</board>
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp
new file mode 100644
index 000000000..55cd396e4
--- /dev/null
+++ b/lib/chibios/os/hal/boards/ST_NUCLEO32_F031K6/cfg/board.fmpp
@@ -0,0 +1,15 @@
1sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f0xx/templates
2outputRoot: ..
3dataRoot: .
4
5freemarkerLinks: {
6 lib: ../../../../../tools/ftl/libs
7}
8
9data : {
10 doc1:xml (
11 board.chcfg
12 {
13 }
14 )
15}
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 22:51:16 +0100