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Diffstat (limited to 'lib/chibios/os/hal/boards/ST_NUCLEO64_F103RB/board.h')
-rw-r--r-- | lib/chibios/os/hal/boards/ST_NUCLEO64_F103RB/board.h | 260 |
1 files changed, 260 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/boards/ST_NUCLEO64_F103RB/board.h b/lib/chibios/os/hal/boards/ST_NUCLEO64_F103RB/board.h new file mode 100644 index 000000000..f81de8f2e --- /dev/null +++ b/lib/chibios/os/hal/boards/ST_NUCLEO64_F103RB/board.h | |||
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1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Setup for the ST INEMO-M1 Discovery board. | ||
22 | */ | ||
23 | |||
24 | /* | ||
25 | * Board identifier. | ||
26 | */ | ||
27 | #define BOARD_ST_NUCLEO64_F103RB | ||
28 | #define BOARD_NAME "STMicroelectronics NUCLEO-F103RB" | ||
29 | |||
30 | /* | ||
31 | * Board frequencies. | ||
32 | */ | ||
33 | #define STM32_LSECLK 0 | ||
34 | |||
35 | #if defined(NUCLEO_EXTERNAL_OSCILLATOR) | ||
36 | #define STM32_HSECLK 8000000 | ||
37 | #define STM32_HSE_BYPASS | ||
38 | |||
39 | #elif defined(NUCLEO_HSE_CRYSTAL) | ||
40 | #define STM32_HSECLK 8000000 | ||
41 | |||
42 | #else | ||
43 | #define STM32_HSECLK 0 | ||
44 | #endif | ||
45 | |||
46 | /* | ||
47 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
48 | */ | ||
49 | #define STM32F103xB | ||
50 | |||
51 | /* | ||
52 | * IO pins assignments. | ||
53 | */ | ||
54 | #define GPIOA_ARD_A0 0U | ||
55 | #define GPIOA_ADC1_IN0 0U | ||
56 | #define GPIOA_ARD_A1 1U | ||
57 | #define GPIOA_ADC1_IN1 1U | ||
58 | #define GPIOA_ARD_D1 2U | ||
59 | #define GPIOA_USART2_TX 2U | ||
60 | #define GPIOA_ARD_D0 3U | ||
61 | #define GPIOA_USART2_RX 3U | ||
62 | #define GPIOA_ARD_A2 4U | ||
63 | #define GPIOA_ADC1_IN4 4U | ||
64 | #define GPIOA_LED_GREEN 5U | ||
65 | #define GPIOA_ARD_D13 5U | ||
66 | #define GPIOA_ARD_D12 6U | ||
67 | #define GPIOA_ARD_D11 7U | ||
68 | #define GPIOA_ARD_D7 8U | ||
69 | #define GPIOA_ARD_D8 9U | ||
70 | #define GPIOA_ARD_D2 10U | ||
71 | #define GPIOA_PIN11 11U | ||
72 | #define GPIOA_PIN12 12U | ||
73 | #define GPIOA_SWDIO 13U | ||
74 | #define GPIOA_SWCLK 14U | ||
75 | #define GPIOA_PIN15 15U | ||
76 | |||
77 | #define GPIOB_ARD_A3 0U | ||
78 | #define GPIOB_ADC1_IN8 0U | ||
79 | #define GPIOB_PIN1 1U | ||
80 | #define GPIOB_PIN2 2U | ||
81 | #define GPIOB_SWO 3U | ||
82 | #define GPIOB_ARD_D3 3U | ||
83 | #define GPIOB_ARD_D5 4U | ||
84 | #define GPIOB_ARD_D4 5U | ||
85 | #define GPIOB_ARD_D10 6U | ||
86 | #define GPIOB_PIN7 7U | ||
87 | #define GPIOB_ARD_D15 8U | ||
88 | #define GPIOB_ARD_D14 9U | ||
89 | #define GPIOB_ARD_D6 10U | ||
90 | #define GPIOB_PIN11 11U | ||
91 | #define GPIOB_PIN12 12U | ||
92 | #define GPIOB_PIN13 13U | ||
93 | #define GPIOB_PIN14 14U | ||
94 | #define GPIOB_PIN15 15U | ||
95 | |||
96 | #define GPIOC_ARD_A5 0U | ||
97 | #define GPIOC_ADC1_IN11 0U | ||
98 | #define GPIOC_ARD_A4 1U | ||
99 | #define GPIOC_ADC1_IN10 1U | ||
100 | #define GPIOC_PIN2 2U | ||
101 | #define GPIOC_PIN3 3U | ||
102 | #define GPIOC_PIN4 4U | ||
103 | #define GPIOC_PIN5 5U | ||
104 | #define GPIOC_PIN6 6U | ||
105 | #define GPIOC_ARD_D9 7U | ||
106 | #define GPIOC_PIN8 8U | ||
107 | #define GPIOC_PIN9 9U | ||
108 | #define GPIOC_PIN10 10U | ||
109 | #define GPIOC_PIN11 11U | ||
110 | #define GPIOC_PIN12 12U | ||
111 | #define GPIOC_BUTTON 13U | ||
112 | #define GPIOC_PIN14 14U | ||
113 | #define GPIOC_PIN15 15U | ||
114 | |||
115 | #define GPIOD_OSC_IN 0U | ||
116 | #define GPIOD_PIN0 0U | ||
117 | #define GPIOD_OSC_OUT 1U | ||
118 | #define GPIOD_PIN1 1U | ||
119 | #define GPIOD_PIN2 2U | ||
120 | #define GPIOD_PIN3 3U | ||
121 | #define GPIOD_PIN4 4U | ||
122 | #define GPIOD_PIN5 5U | ||
123 | #define GPIOD_PIN6 6U | ||
124 | #define GPIOD_PIN7 7U | ||
125 | #define GPIOD_PIN8 8U | ||
126 | #define GPIOD_PIN9 9U | ||
127 | #define GPIOD_PIN10 10U | ||
128 | #define GPIOD_PIN11 11U | ||
129 | #define GPIOD_PIN12 12U | ||
130 | #define GPIOD_PIN13 13U | ||
131 | #define GPIOD_PIN14 14U | ||
132 | #define GPIOD_PIN15 15U | ||
133 | |||
134 | #define GPIOE_PIN0 0U | ||
135 | #define GPIOE_PIN1 1U | ||
136 | #define GPIOE_PIN2 2U | ||
137 | #define GPIOE_PIN3 3U | ||
138 | #define GPIOE_PIN4 4U | ||
139 | #define GPIOE_PIN5 5U | ||
140 | #define GPIOE_PIN6 6U | ||
141 | #define GPIOE_PIN7 7U | ||
142 | #define GPIOE_PIN8 8U | ||
143 | #define GPIOE_PIN9 9U | ||
144 | #define GPIOE_PIN10 10U | ||
145 | #define GPIOE_PIN11 11U | ||
146 | #define GPIOE_PIN12 12U | ||
147 | #define GPIOE_PIN13 13U | ||
148 | #define GPIOE_PIN14 14U | ||
149 | #define GPIOE_PIN15 15U | ||
150 | |||
151 | #define GPIOF_PIN0 0U | ||
152 | #define GPIOF_PIN1 1U | ||
153 | #define GPIOF_PIN2 2U | ||
154 | #define GPIOF_PIN3 3U | ||
155 | #define GPIOF_PIN4 4U | ||
156 | #define GPIOF_PIN5 5U | ||
157 | #define GPIOF_PIN6 6U | ||
158 | #define GPIOF_PIN7 7U | ||
159 | #define GPIOF_PIN8 8U | ||
160 | #define GPIOF_PIN9 9U | ||
161 | #define GPIOF_PIN10 10U | ||
162 | #define GPIOF_PIN11 11U | ||
163 | #define GPIOF_PIN12 12U | ||
164 | #define GPIOF_PIN13 13U | ||
165 | #define GPIOF_PIN14 14U | ||
166 | #define GPIOF_PIN15 15U | ||
167 | /* | ||
168 | * I/O ports initial setup, this configuration is established soon after reset | ||
169 | * in the initialization code. | ||
170 | * | ||
171 | * The digits have the following meaning: | ||
172 | * 0 - Analog input. | ||
173 | * 1 - Push Pull output 10MHz. | ||
174 | * 2 - Push Pull output 2MHz. | ||
175 | * 3 - Push Pull output 50MHz. | ||
176 | * 4 - Digital input. | ||
177 | * 5 - Open Drain output 10MHz. | ||
178 | * 6 - Open Drain output 2MHz. | ||
179 | * 7 - Open Drain output 50MHz. | ||
180 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
181 | * 9 - Alternate Push Pull output 10MHz. | ||
182 | * A - Alternate Push Pull output 2MHz. | ||
183 | * B - Alternate Push Pull output 50MHz. | ||
184 | * C - Reserved. | ||
185 | * D - Alternate Open Drain output 10MHz. | ||
186 | * E - Alternate Open Drain output 2MHz. | ||
187 | * F - Alternate Open Drain output 50MHz. | ||
188 | * Please refer to the STM32 Reference Manual for details. | ||
189 | */ | ||
190 | |||
191 | /* | ||
192 | * Port A setup. | ||
193 | * Everything input with pull-up except: | ||
194 | * PA2 - Alternate output (GPIOA_ARD_D1, GPIOA_USART2_TX). | ||
195 | * PA3 - Normal input (GPIOA_ARD_D0, GPIOA_USART2_RX). | ||
196 | * PA5 - Push Pull output (GPIOA_LED_GREEN). | ||
197 | * PA13 - Pull-up input (GPIOA_SWDIO). | ||
198 | * PA14 - Pull-down input (GPIOA_SWCLK). | ||
199 | */ | ||
200 | #define VAL_GPIOACRL 0x88384B88 /* PA7...PA0 */ | ||
201 | #define VAL_GPIOACRH 0x88888888 /* PA15...PA8 */ | ||
202 | #define VAL_GPIOAODR 0xFFFFBFDF | ||
203 | |||
204 | /* | ||
205 | * Port B setup. | ||
206 | * Everything input with pull-up except: | ||
207 | * PB3 - Pull-up input (GPIOA_SWO). | ||
208 | */ | ||
209 | #define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */ | ||
210 | #define VAL_GPIOBCRH 0x88888888 /* PB15...PB8 */ | ||
211 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
212 | |||
213 | /* | ||
214 | * Port C setup. | ||
215 | * Everything input with pull-up except: | ||
216 | * PC13 - Normal input (GPIOC_BUTTON). | ||
217 | */ | ||
218 | #define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */ | ||
219 | #define VAL_GPIOCCRH 0x88488888 /* PC15...PC8 */ | ||
220 | #define VAL_GPIOCODR 0xFFFFFFFF | ||
221 | |||
222 | /* | ||
223 | * Port D setup. | ||
224 | * Everything input with pull-up except: | ||
225 | * PD0 - Normal input (GPIOD_OSC_IN). | ||
226 | * PD1 - Normal input (GPIOD_OSC_OUT). | ||
227 | */ | ||
228 | #define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */ | ||
229 | #define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */ | ||
230 | #define VAL_GPIODODR 0xFFFFFFFF | ||
231 | |||
232 | /* | ||
233 | * Port E setup. | ||
234 | * Everything input with pull-up except: | ||
235 | */ | ||
236 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ | ||
237 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ | ||
238 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
239 | |||
240 | /* | ||
241 | * USB bus activation macro, required by the USB driver. | ||
242 | */ | ||
243 | #define usb_lld_connect_bus(usbp) | ||
244 | |||
245 | /* | ||
246 | * USB bus de-activation macro, required by the USB driver. | ||
247 | */ | ||
248 | #define usb_lld_disconnect_bus(usbp) | ||
249 | |||
250 | #if !defined(_FROM_ASM_) | ||
251 | #ifdef __cplusplus | ||
252 | extern "C" { | ||
253 | #endif | ||
254 | void boardInit(void); | ||
255 | #ifdef __cplusplus | ||
256 | } | ||
257 | #endif | ||
258 | #endif /* _FROM_ASM_ */ | ||
259 | |||
260 | #endif /* _BOARD_H_ */ | ||