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Diffstat (limited to 'lib/chibios/os/hal/boards/ST_STM3210C_EVAL/board.h')
-rw-r--r-- | lib/chibios/os/hal/boards/ST_STM3210C_EVAL/board.h | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/lib/chibios/os/hal/boards/ST_STM3210C_EVAL/board.h b/lib/chibios/os/hal/boards/ST_STM3210C_EVAL/board.h new file mode 100644 index 000000000..f90a6de44 --- /dev/null +++ b/lib/chibios/os/hal/boards/ST_STM3210C_EVAL/board.h | |||
@@ -0,0 +1,128 @@ | |||
1 | /* | ||
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | #ifndef _BOARD_H_ | ||
18 | #define _BOARD_H_ | ||
19 | |||
20 | /* | ||
21 | * Setup for the STMicroelectronics STM3210C-EVAL evaluation board. | ||
22 | */ | ||
23 | |||
24 | #define GPIOD_LED1 7 | ||
25 | #define GPIOD_LED2 13 | ||
26 | #define GPIOD_LED3 3 | ||
27 | #define GPIOD_LED4 4 | ||
28 | |||
29 | /* | ||
30 | * Board identifier. | ||
31 | */ | ||
32 | #define BOARD_ST_STM3210C_EVAL | ||
33 | #define BOARD_NAME "ST STM3210C-EVAL" | ||
34 | |||
35 | /* | ||
36 | * Board frequencies. | ||
37 | */ | ||
38 | #define STM32_LSECLK 32768 | ||
39 | #define STM32_HSECLK 25000000 | ||
40 | |||
41 | /* | ||
42 | * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h. | ||
43 | */ | ||
44 | #define STM32F107xC | ||
45 | |||
46 | /* | ||
47 | * IO pins assignments. | ||
48 | * *********************TO BE COMPLETED********************* | ||
49 | */ | ||
50 | |||
51 | /* | ||
52 | * I/O ports initial setup, this configuration is established soon after reset | ||
53 | * in the initialization code. | ||
54 | * | ||
55 | * The digits have the following meaning: | ||
56 | * 0 - Analog input. | ||
57 | * 1 - Push Pull output 10MHz. | ||
58 | * 2 - Push Pull output 2MHz. | ||
59 | * 3 - Push Pull output 50MHz. | ||
60 | * 4 - Digital input. | ||
61 | * 5 - Open Drain output 10MHz. | ||
62 | * 6 - Open Drain output 2MHz. | ||
63 | * 7 - Open Drain output 50MHz. | ||
64 | * 8 - Digital input with PullUp or PullDown resistor depending on ODR. | ||
65 | * 9 - Alternate Push Pull output 10MHz. | ||
66 | * A - Alternate Push Pull output 2MHz. | ||
67 | * B - Alternate Push Pull output 50MHz. | ||
68 | * C - Reserved. | ||
69 | * D - Alternate Open Drain output 10MHz. | ||
70 | * E - Alternate Open Drain output 2MHz. | ||
71 | * F - Alternate Open Drain output 50MHz. | ||
72 | * Please refer to the STM32 Reference Manual for details. | ||
73 | */ | ||
74 | |||
75 | /* | ||
76 | * Port A setup. | ||
77 | * Everything input except: | ||
78 | */ | ||
79 | #define VAL_GPIOACRL 0x44444444 /* PA7...PA0 */ | ||
80 | #define VAL_GPIOACRH 0x44444444 /* PA15...PA8 */ | ||
81 | #define VAL_GPIOAODR 0xFFFFFFFF | ||
82 | |||
83 | /* | ||
84 | * Port B setup. | ||
85 | * Everything input except: | ||
86 | */ | ||
87 | #define VAL_GPIOBCRL 0x44444444 /* PB7...PB0 */ | ||
88 | #define VAL_GPIOBCRH 0x44444444 /* PB15...PB8 */ | ||
89 | #define VAL_GPIOBODR 0xFFFFFFFF | ||
90 | |||
91 | /* | ||
92 | * Port C setup. | ||
93 | * Everything input except: | ||
94 | */ | ||
95 | #define VAL_GPIOCCRL 0x44444444 /* PC7...PC0 */ | ||
96 | #define VAL_GPIOCCRH 0x44444444 /* PC15...PC8 */ | ||
97 | #define VAL_GPIOCODR 0xFFFFFFFF | ||
98 | |||
99 | /* | ||
100 | * Port D setup. | ||
101 | * Everything input except: | ||
102 | * PD5 - USART2TX (remapped) AF PP Output | ||
103 | * PD6 - USART2RX (remapped) Digital Input | ||
104 | * PD7 - LED (LD1) PP Output | ||
105 | */ | ||
106 | #define VAL_GPIODCRL 0x34B33444 /* PD7...PD0 */ | ||
107 | #define VAL_GPIODCRH 0x44344444 /* PD15...PD8 */ | ||
108 | #define VAL_GPIODODR 0x0000DF67 | ||
109 | |||
110 | /* | ||
111 | * Port E setup. | ||
112 | * Everything input except: | ||
113 | */ | ||
114 | #define VAL_GPIOECRL 0x44444444 /* PE7...PE0 */ | ||
115 | #define VAL_GPIOECRH 0x44344444 /* PE15...PE8 */ | ||
116 | #define VAL_GPIOEODR 0xFFFFFFFF | ||
117 | |||
118 | #if !defined(_FROM_ASM_) | ||
119 | #ifdef __cplusplus | ||
120 | extern "C" { | ||
121 | #endif | ||
122 | void boardInit(void); | ||
123 | #ifdef __cplusplus | ||
124 | } | ||
125 | #endif | ||
126 | #endif /* _FROM_ASM_ */ | ||
127 | |||
128 | #endif /* _BOARD_H_ */ | ||