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diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.c b/lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.c
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@@ -0,0 +1,605 @@
1/*
2 * Copyright 2020 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8/***********************************************************************************************************************
9 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11 **********************************************************************************************************************/
12
13/*
14 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
15!!GlobalInfo
16product: Pins v8.0
17processor: MIMXRT1024xxxxx
18package_id: MIMXRT1024DAG5A
19mcu_data: ksdk2_0
20processor_version: 0.0.0
21board: MIMXRT1024-EVK
22pin_labels:
23- {pin_num: '49', pin_signal: ONOFF, label: ONOFF}
24- {pin_num: '53', pin_signal: PMIC_ON_REQ, label: PMIC_ON_REQ}
25- {pin_num: '51', pin_signal: TEST_MODE, label: GND}
26- {pin_num: '63', pin_signal: USB_OTG1_DP, label: OTG1_DP}
27- {pin_num: '62', pin_signal: USB_OTG1_DN, label: OTG1_DN}
28- {pin_num: '6', pin_signal: VSS0, label: GND}
29- {pin_num: '40', pin_signal: VSS1, label: GND}
30- {pin_num: '60', pin_signal: VSS2, label: GND}
31- {pin_num: '70', pin_signal: VSS3, label: GND}
32- {pin_num: '85', pin_signal: VSS4, label: GND}
33- {pin_num: '103', pin_signal: VSS5, label: GND}
34- {pin_num: '113', pin_signal: VSS6, label: GND}
35- {pin_num: '135', pin_signal: VSS7, label: GND}
36- {pin_num: '14', pin_signal: GPIO_EMC_04, label: 'SEMC_D4/U14[8]', identifier: SEMC_D4}
37- {pin_num: '5', pin_signal: VDD_SOC_IN0, label: VDD_SOC_IN}
38- {pin_num: '31', pin_signal: VDD_SOC_IN1, label: VDD_SOC_IN}
39- {pin_num: '39', pin_signal: VDD_SOC_IN2, label: VDD_SOC_IN}
40- {pin_num: '86', pin_signal: VDD_SOC_IN3, label: VDD_SOC_IN}
41- {pin_num: '102', pin_signal: VDD_SOC_IN4, label: VDD_SOC_IN}
42- {pin_num: '114', pin_signal: VDD_SOC_IN5, label: VDD_SOC_IN}
43- {pin_num: '134', pin_signal: VDD_SOC_IN6, label: VDD_SOC_IN}
44- {pin_num: '65', pin_signal: VDD_HIGH_CAP, label: VDDA_2P5_CAP}
45- {pin_num: '56', pin_signal: VDD_SNVS_CAP, label: GND}
46- {pin_num: '69', pin_signal: VDD_HIGH_IN, label: VDD_HIGH_IN_MCU}
47- {pin_num: '55', pin_signal: VDD_SNVS_IN, label: VDD_SNVS_IN}
48- {pin_num: '72', pin_signal: NVCC_PLL, label: VDDA_1P1_CAP}
49- {pin_num: '11', pin_signal: NVCC_GPIO0, label: NVCC_GPIO_3V3}
50- {pin_num: '20', pin_signal: NVCC_GPIO1, label: NVCC_GPIO_3V3}
51- {pin_num: '29', pin_signal: NVCC_GPIO2, label: NVCC_GPIO_3V3}
52- {pin_num: '144', pin_signal: NVCC_GPIO4, label: NVCC_GPIO_3V3}
53- {pin_num: '59', pin_signal: USB_OTG1_VBUS, label: 5V_USB_OTG}
54- {pin_num: '64', pin_signal: NGND_KEL0, label: GND}
55- {pin_num: '73', pin_signal: VDDA_ADC_3P3, label: VDDA_ADC_3P3_MCU}
56- {pin_num: '61', pin_signal: VDD_USB_CAP, label: VDD_USB_3V}
57- {pin_num: '38', pin_signal: DCDC_IN_Q, label: MCU_DCDC_IN_3V3}
58- {pin_num: '52', pin_signal: WAKEUP, label: USER_BUTTON}
59- {pin_num: '34', pin_signal: DCDC_IN, label: MCU_DCDC_IN_3V3}
60- {pin_num: '36', pin_signal: DCDC_LP, label: DCDC_OUT}
61- {pin_num: '35', pin_signal: DCDC_GND, label: GND}
62- {pin_num: '37', pin_signal: DCDC_PSWITCH, label: MCU_DCDC_IN_3V3}
63- {pin_num: '54', pin_signal: PMIC_STBY_REQ, label: SD_PWREN}
64- {pin_num: '44', pin_signal: NVCC_SD0, label: NVCC_SD}
65- {pin_num: '18', pin_signal: GPIO_EMC_00, label: 'SEMC_D0/U14[2]', identifier: SEMC_D0}
66- {pin_num: '17', pin_signal: GPIO_EMC_01, label: 'SEMC_D1/U14[4]', identifier: SEMC_D1}
67- {pin_num: '16', pin_signal: GPIO_EMC_02, label: 'SEMC_D2/U14[5]', identifier: SEMC_D2}
68- {pin_num: '15', pin_signal: GPIO_EMC_03, label: 'SEMC_D3/U14[7]', identifier: SEMC_D3}
69- {pin_num: '13', pin_signal: GPIO_EMC_05, label: 'SEMC_D5/U14[10]', identifier: SEMC_D5}
70- {pin_num: '12', pin_signal: GPIO_EMC_06, label: 'SEMC_D6/U14[11]', identifier: SEMC_D6}
71- {pin_num: '10', pin_signal: GPIO_EMC_07, label: 'SEMC_D7/U14[13]', identifier: SEMC_D7}
72- {pin_num: '9', pin_signal: GPIO_EMC_08, label: 'SEMC_DM0/U14[15]', identifier: SEMC_DM0}
73- {pin_num: '8', pin_signal: GPIO_EMC_09, label: 'SEMC_WE/U14[16]', identifier: SEMC_WE}
74- {pin_num: '7', pin_signal: GPIO_EMC_10, label: 'SEMC_CAS/U14[17]', identifier: SEMC_CAS}
75- {pin_num: '4', pin_signal: GPIO_EMC_11, label: 'SEMC_RAS/U14[18]', identifier: SEMC_RAS}
76- {pin_num: '3', pin_signal: GPIO_EMC_12, label: 'SEMC_CS0/U14[19]', identifier: SEMC_CS0}
77- {pin_num: '2', pin_signal: GPIO_EMC_13, label: 'SEMC_BA0/U14[20]', identifier: SEMC_BA0}
78- {pin_num: '1', pin_signal: GPIO_EMC_14, label: 'SEMC_BA1/U14[21]', identifier: SEMC_BA1}
79- {pin_num: '143', pin_signal: GPIO_EMC_15, label: 'SEMC_A10/U14[22]', identifier: SEMC_A10}
80- {pin_num: '142', pin_signal: GPIO_EMC_16, label: 'SEMC_A0/U14[23]/BOOT_MODE[0]', identifier: SEMC_A0}
81- {pin_num: '141', pin_signal: GPIO_EMC_17, label: 'SEMC_A1/U14[24]/BOOT_MODE[1]', identifier: SEMC_A1}
82- {pin_num: '140', pin_signal: GPIO_EMC_18, label: 'SEMC_A2/U14[25]/BT_CFG[0]', identifier: SEMC_A2}
83- {pin_num: '139', pin_signal: GPIO_EMC_19, label: 'SEMC_A3/U14[26]/BT_CFG[1]', identifier: SEMC_A3}
84- {pin_num: '138', pin_signal: GPIO_EMC_20, label: 'SEMC_A4/U14[29]/BT_CFG[2]', identifier: SEMC_A4}
85- {pin_num: '137', pin_signal: GPIO_EMC_21, label: 'SEMC_A5/U14[30]/BT_CFG[3]', identifier: SEMC_A5}
86- {pin_num: '136', pin_signal: GPIO_EMC_22, label: 'SEMC_A6/U14[31]/BT_CFG[4]', identifier: SEMC_A6}
87- {pin_num: '133', pin_signal: GPIO_EMC_23, label: 'SEMC_A7/U14[32]/BT_CFG[5]', identifier: SEMC_A7}
88- {pin_num: '132', pin_signal: GPIO_EMC_24, label: 'SEMC_A8/U14[33]/BT_CFG[6]', identifier: SEMC_A8}
89- {pin_num: '131', pin_signal: GPIO_EMC_25, label: 'SEMC_A9/U14[34]/BT_CFG[7]', identifier: SEMC_A9}
90- {pin_num: '130', pin_signal: GPIO_EMC_26, label: 'SEMC_A11/U14[35]/BT_CFG[8]', identifier: SEMC_A11}
91- {pin_num: '129', pin_signal: GPIO_EMC_27, label: 'SEMC_A12/U14[36]/BT_CFG[9]', identifier: SEMC_A12}
92- {pin_num: '128', pin_signal: GPIO_EMC_28, label: SEMC_DQS, identifier: SEMC_DQS}
93- {pin_num: '127', pin_signal: GPIO_EMC_29, label: 'SEMC_CKE/U14[37]', identifier: SEMC_CKE}
94- {pin_num: '126', pin_signal: GPIO_EMC_30, label: 'SEMC_CLK/U14[38]', identifier: SEMC_CLK}
95- {pin_num: '125', pin_signal: GPIO_EMC_31, label: 'SEMC_DM1/U14[39]', identifier: SEMC_DM1}
96- {pin_num: '124', pin_signal: GPIO_EMC_32, label: 'SEMC_D8/U14[42]', identifier: SEMC_D8}
97- {pin_num: '123', pin_signal: GPIO_EMC_33, label: 'SEMC_D9/U14[44]', identifier: SEMC_D9}
98- {pin_num: '122', pin_signal: GPIO_EMC_34, label: 'SEMC_D10/U14[45]', identifier: SEMC_D10}
99- {pin_num: '121', pin_signal: GPIO_EMC_35, label: 'SEMC_D11/U14[47]', identifier: SEMC_D11}
100- {pin_num: '120', pin_signal: GPIO_EMC_36, label: 'SEMC_D12/U14[48]', identifier: SEMC_D12}
101- {pin_num: '119', pin_signal: GPIO_EMC_37, label: 'SEMC_D13/U14[50]', identifier: SEMC_D13}
102- {pin_num: '118', pin_signal: GPIO_EMC_38, label: 'SEMC_D14/U14[51]', identifier: SEMC_D14}
103- {pin_num: '117', pin_signal: GPIO_EMC_39, label: 'SEMC_D15/U14[53]', identifier: SEMC_D15}
104- {pin_num: '116', pin_signal: GPIO_EMC_40, label: 'ENET_MDIO/U11[11]', identifier: ENET_MDIO}
105- {pin_num: '115', pin_signal: GPIO_EMC_41, label: 'ENET_MDC/U11[12]', identifier: ENET_MDC}
106- {pin_num: '112', pin_signal: NVCC_GPIO3, label: NVCC_GPIO_3V3}
107- {pin_num: '111', pin_signal: GPIO_AD_B0_00, label: 'JTAG_TMS/J16[7]/SWD_DIO'}
108- {pin_num: '110', pin_signal: GPIO_AD_B0_01, label: 'JTAG_TCK/J16[9]/SWD_CLK'}
109- {pin_num: '109', pin_signal: GPIO_AD_B0_02, label: GND}
110- {pin_num: '108', pin_signal: GPIO_AD_B0_03, label: 'JTAG_TDI/J16[5]/WDOG_B'}
111- {pin_num: '107', pin_signal: GPIO_AD_B0_04, label: 'JTAG_TDO/J16[13]/ENET_RST/U11[32]', identifier: ENET_RST}
112- {pin_num: '106', pin_signal: GPIO_AD_B0_05, label: 'JTAG_nTRST/J16[3]/USER_LED/J17[5]'}
113- {pin_num: '105', pin_signal: GPIO_AD_B0_06, label: 'UART1_TXD/J17[6]', identifier: UART1_TXD}
114- {pin_num: '101', pin_signal: GPIO_AD_B0_07, label: 'UART1_RXD/J17[4]', identifier: UART1_RXD}
115- {pin_num: '100', pin_signal: GPIO_AD_B0_08, label: 'ENET_TX_CLK/U11[9]', identifier: ENET_TX_CLK}
116- {pin_num: '99', pin_signal: GPIO_AD_B0_09, label: 'ENET_RXD1/U11[15]/J17[3]', identifier: ENET_RXD1}
117- {pin_num: '98', pin_signal: GPIO_AD_B0_10, label: 'ENET_RXD0/U11[16]/J19[6]', identifier: ENET_RXD0}
118- {pin_num: '97', pin_signal: GPIO_AD_B0_11, label: 'ENET_CRS_DV/U11[18]/J19[3]', identifier: ENET_CRS_DV}
119- {pin_num: '96', pin_signal: GPIO_AD_B0_12, label: 'ENET_RXER/U11[20]/J19[4]', identifier: ENET_RXER}
120- {pin_num: '95', pin_signal: GPIO_AD_B0_13, label: 'ENET_TXEN/U11[23]/J19[5]', identifier: ENET_TXEN}
121- {pin_num: '94', pin_signal: GPIO_AD_B0_14, label: 'ENET_TXD0/U11[24]/J17[7]', identifier: ENET_TXD0}
122- {pin_num: '93', pin_signal: GPIO_AD_B0_15, label: 'ENET_TXD1/U11[25]/J19[2]', identifier: ENET_TXD1}
123- {pin_num: '84', pin_signal: GPIO_AD_B1_06, label: 'ENET_INT/U11[21]/J17[8]', identifier: ENET_INT}
124- {pin_num: '83', pin_signal: GPIO_AD_B1_07, label: 'SD0_VSELECT/J19[1]'}
125- {pin_num: '80', pin_signal: GPIO_AD_B1_10, label: 'USB_OTG1_PWR/J18[1]'}
126- {pin_num: '79', pin_signal: GPIO_AD_B1_11, label: 'USB_OTG1_ID/J18[2]'}
127- {pin_num: '78', pin_signal: GPIO_AD_B1_12, label: 'USB_OTG1_OC/J18[3]'}
128- {pin_num: '76', pin_signal: GPIO_AD_B1_13, label: 'CAN_STBY/J18[4]', identifier: CAN_STBY}
129- {pin_num: '75', pin_signal: GPIO_AD_B1_14, label: 'I2C1_SCL/U10[17]/J18[6]'}
130- {pin_num: '74', pin_signal: GPIO_AD_B1_15, label: 'I2C1_SDA/U10[18]/J18[5]'}
131- {pin_num: '48', pin_signal: GPIO_SD_B0_00, label: 'SD1_D2/J15[1]', identifier: SD1_D2}
132- {pin_num: '47', pin_signal: GPIO_SD_B0_01, label: 'SD1_D3/J15[2]', identifier: SD1_D3}
133- {pin_num: '46', pin_signal: GPIO_SD_B0_02, label: 'SD1_CMD/J15[3]', identifier: SD1_CMD}
134- {pin_num: '45', pin_signal: GPIO_SD_B0_03, label: 'SD1_CLK/J15[5]', identifier: SD1_CLK}
135- {pin_num: '43', pin_signal: GPIO_SD_B0_04, label: 'SD1_D0/J15[7]', identifier: SD1_D0}
136- {pin_num: '42', pin_signal: GPIO_SD_B0_05, label: 'SD1_D1/J15[8]', identifier: SD1_D1}
137- {pin_num: '41', pin_signal: GPIO_SD_B0_06, label: 'SD_CD_SW/J15[9]', identifier: SD_CD_SW}
138- {pin_num: '33', pin_signal: GPIO_SD_B1_00, label: 'CAN1_TX/U9[1]', identifier: CAN1_TX}
139- {pin_num: '32', pin_signal: GPIO_SD_B1_01, label: 'CAN1_RX/U9[4]', identifier: CAN1_RX}
140- {pin_num: '30', pin_signal: GPIO_SD_B1_02, label: I2C4_SCL}
141- {pin_num: '25', pin_signal: GPIO_SD_B1_06, label: 'FlexSPI_D3_A/U13[7]', identifier: FlexSPI_D3_A}
142- {pin_num: '26', pin_signal: GPIO_SD_B1_05, label: INT2_COMBO}
143- {pin_num: '27', pin_signal: GPIO_SD_B1_04, label: INT1_COMBO}
144- {pin_num: '28', pin_signal: GPIO_SD_B1_03, label: I2C4_SDA}
145- {pin_num: '24', pin_signal: GPIO_SD_B1_07, label: 'FlexSPI_CLK/U13[6]', identifier: FlexSPI_CLK}
146- {pin_num: '23', pin_signal: GPIO_SD_B1_08, label: 'FlexSPI_D0_A/U13[5]', identifier: FlexSPI_D0_A}
147- {pin_num: '22', pin_signal: GPIO_SD_B1_09, label: 'FlexSPI_D2_A/U13[3]', identifier: FlexSPI_D2_A}
148- {pin_num: '21', pin_signal: GPIO_SD_B1_10, label: 'FlexSPI_D1_A/U13[2]', identifier: FlexSPI_D1_A}
149- {pin_num: '19', pin_signal: GPIO_SD_B1_11, label: 'FlexSPI_SS0/U13[1]', identifier: FlexSPI_SS0}
150- {pin_num: '50', pin_signal: POR_B, label: 'POR_B/J16[5]/RST_TGTMCU_B/J20[3]'}
151- {pin_num: '81', pin_signal: GPIO_AD_B1_09, label: 'UART_RX/J17[1]'}
152- {pin_num: '82', pin_signal: GPIO_AD_B1_08, label: 'UART_TX/J17[2]'}
153- {pin_num: '67', pin_signal: XTALI, label: XTALI}
154- {pin_num: '68', pin_signal: XTALO, label: XTALO}
155- {pin_num: '57', pin_signal: RTC_XTALI, label: RTC_XTALI}
156- {pin_num: '58', pin_signal: RTC_XTALO, label: RTC_XTALO}
157- {pin_num: '92', pin_signal: NC6, label: SAI1_MCLK}
158- {pin_num: '91', pin_signal: NC5, label: SAI1_TX_BCLK}
159- {pin_num: '90', pin_signal: NC4, label: 'SAI1_TX_SYNC/J19[10]'}
160- {pin_num: '89', pin_signal: NC3, label: 'SAI1_TXD/J19[9]'}
161- {pin_num: '88', pin_signal: NC2, label: AUD_INT}
162- {pin_num: '87', pin_signal: NC1, label: SAI1_RXD}
163power_domains: {NVCC_GPIO: '3.3'}
164 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
165 */
166
167#include "fsl_common.h"
168#include "fsl_iomuxc.h"
169#include "pin_mux.h"
170
171/* FUNCTION ************************************************************************************************************
172 *
173 * Function Name : BOARD_InitBootPins
174 * Description : Calls initialization functions.
175 *
176 * END ****************************************************************************************************************/
177void BOARD_InitBootPins(void) {
178 BOARD_InitPins();
179 BOARD_InitDEBUG_UARTPins();
180
181/* GPIO_AD_B1_00~GPIO_AD_B1_05 can only be configured as flexspi function. Note that it can't be modified here */
182 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_FLEXSPI_A_DATA03,1U);
183 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_FLEXSPI_A_SCLK,1U);
184 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_02_FLEXSPI_A_DATA00,1U);
185 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_03_FLEXSPI_A_DATA02,1U);
186 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_04_FLEXSPI_A_DATA01,1U);
187 IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_05_FLEXSPI_A_SS0_B,1U);
188}
189
190/*
191 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
192BOARD_InitPins:
193- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
194- pin_list: []
195 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
196 */
197
198/* FUNCTION ************************************************************************************************************
199 *
200 * Function Name : BOARD_InitPins
201 * Description : Configures pin routing and optionally pin electrical features.
202 *
203 * END ****************************************************************************************************************/
204void BOARD_InitPins(void) {
205}
206
207
208/*
209 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
210BOARD_InitDEBUG_UARTPins:
211- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
212- pin_list:
213 - {pin_num: '101', peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_07}
214 - {pin_num: '105', peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_06}
215 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
216 */
217
218/* FUNCTION ************************************************************************************************************
219 *
220 * Function Name : BOARD_InitDEBUG_UARTPins
221 * Description : Configures pin routing and optionally pin electrical features.
222 *
223 * END ****************************************************************************************************************/
224void BOARD_InitDEBUG_UARTPins(void) {
225 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
226
227 IOMUXC_SetPinMux(
228 IOMUXC_GPIO_AD_B0_06_LPUART1_TX, /* GPIO_AD_B0_06 is configured as LPUART1_TX */
229 0U); /* Software Input On Field: Input Path is determined by functionality */
230 IOMUXC_SetPinMux(
231 IOMUXC_GPIO_AD_B0_07_LPUART1_RX, /* GPIO_AD_B0_07 is configured as LPUART1_RX */
232 0U); /* Software Input On Field: Input Path is determined by functionality */
233}
234
235
236/*
237 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
238BOARD_InitSDRAMPins:
239- options: {coreID: core0, enableClock: 'true'}
240- pin_list:
241 - {pin_num: '142', peripheral: SEMC, signal: 'ADDR, 00', pin_signal: GPIO_EMC_16}
242 - {pin_num: '141', peripheral: SEMC, signal: 'ADDR, 01', pin_signal: GPIO_EMC_17}
243 - {pin_num: '140', peripheral: SEMC, signal: 'ADDR, 02', pin_signal: GPIO_EMC_18}
244 - {pin_num: '139', peripheral: SEMC, signal: 'ADDR, 03', pin_signal: GPIO_EMC_19}
245 - {pin_num: '138', peripheral: SEMC, signal: 'ADDR, 04', pin_signal: GPIO_EMC_20}
246 - {pin_num: '136', peripheral: SEMC, signal: 'ADDR, 06', pin_signal: GPIO_EMC_22}
247 - {pin_num: '137', peripheral: SEMC, signal: 'ADDR, 05', pin_signal: GPIO_EMC_21}
248 - {pin_num: '133', peripheral: SEMC, signal: 'ADDR, 07', pin_signal: GPIO_EMC_23}
249 - {pin_num: '132', peripheral: SEMC, signal: 'ADDR, 08', pin_signal: GPIO_EMC_24}
250 - {pin_num: '131', peripheral: SEMC, signal: 'ADDR, 09', pin_signal: GPIO_EMC_25}
251 - {pin_num: '143', peripheral: SEMC, signal: 'ADDR, 10', pin_signal: GPIO_EMC_15}
252 - {pin_num: '130', peripheral: SEMC, signal: 'ADDR, 11', pin_signal: GPIO_EMC_26}
253 - {pin_num: '129', peripheral: SEMC, signal: 'ADDR, 12', pin_signal: GPIO_EMC_27}
254 - {pin_num: '2', peripheral: SEMC, signal: 'BA, 0', pin_signal: GPIO_EMC_13}
255 - {pin_num: '1', peripheral: SEMC, signal: 'BA, 1', pin_signal: GPIO_EMC_14}
256 - {pin_num: '7', peripheral: SEMC, signal: semc_cas, pin_signal: GPIO_EMC_10}
257 - {pin_num: '127', peripheral: SEMC, signal: semc_cke, pin_signal: GPIO_EMC_29}
258 - {pin_num: '126', peripheral: SEMC, signal: semc_clk, pin_signal: GPIO_EMC_30}
259 - {pin_num: '3', peripheral: SEMC, signal: 'CS, 0', pin_signal: GPIO_EMC_12}
260 - {pin_num: '8', peripheral: SEMC, signal: semc_we, pin_signal: GPIO_EMC_09}
261 - {pin_num: '4', peripheral: SEMC, signal: semc_ras, pin_signal: GPIO_EMC_11}
262 - {pin_num: '128', peripheral: SEMC, signal: semc_dqs, pin_signal: GPIO_EMC_28}
263 - {pin_num: '125', peripheral: SEMC, signal: 'DM, 1', pin_signal: GPIO_EMC_31}
264 - {pin_num: '9', peripheral: SEMC, signal: 'DM, 0', pin_signal: GPIO_EMC_08}
265 - {pin_num: '117', peripheral: SEMC, signal: 'DATA, 15', pin_signal: GPIO_EMC_39}
266 - {pin_num: '118', peripheral: SEMC, signal: 'DATA, 14', pin_signal: GPIO_EMC_38}
267 - {pin_num: '119', peripheral: SEMC, signal: 'DATA, 13', pin_signal: GPIO_EMC_37}
268 - {pin_num: '120', peripheral: SEMC, signal: 'DATA, 12', pin_signal: GPIO_EMC_36}
269 - {pin_num: '122', peripheral: SEMC, signal: 'DATA, 10', pin_signal: GPIO_EMC_34}
270 - {pin_num: '121', peripheral: SEMC, signal: 'DATA, 11', pin_signal: GPIO_EMC_35}
271 - {pin_num: '123', peripheral: SEMC, signal: 'DATA, 09', pin_signal: GPIO_EMC_33}
272 - {pin_num: '124', peripheral: SEMC, signal: 'DATA, 08', pin_signal: GPIO_EMC_32}
273 - {pin_num: '10', peripheral: SEMC, signal: 'DATA, 07', pin_signal: GPIO_EMC_07}
274 - {pin_num: '12', peripheral: SEMC, signal: 'DATA, 06', pin_signal: GPIO_EMC_06}
275 - {pin_num: '13', peripheral: SEMC, signal: 'DATA, 05', pin_signal: GPIO_EMC_05}
276 - {pin_num: '14', peripheral: SEMC, signal: 'DATA, 04', pin_signal: GPIO_EMC_04}
277 - {pin_num: '15', peripheral: SEMC, signal: 'DATA, 03', pin_signal: GPIO_EMC_03}
278 - {pin_num: '16', peripheral: SEMC, signal: 'DATA, 02', pin_signal: GPIO_EMC_02}
279 - {pin_num: '17', peripheral: SEMC, signal: 'DATA, 01', pin_signal: GPIO_EMC_01}
280 - {pin_num: '18', peripheral: SEMC, signal: 'DATA, 00', pin_signal: GPIO_EMC_00}
281 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
282 */
283
284/* FUNCTION ************************************************************************************************************
285 *
286 * Function Name : BOARD_InitSDRAMPins
287 * Description : Configures pin routing and optionally pin electrical features.
288 *
289 * END ****************************************************************************************************************/
290void BOARD_InitSDRAMPins(void) {
291 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
292
293 IOMUXC_SetPinMux(
294 IOMUXC_GPIO_EMC_00_SEMC_DATA00, /* GPIO_EMC_00 is configured as SEMC_DATA00 */
295 0U); /* Software Input On Field: Input Path is determined by functionality */
296 IOMUXC_SetPinMux(
297 IOMUXC_GPIO_EMC_01_SEMC_DATA01, /* GPIO_EMC_01 is configured as SEMC_DATA01 */
298 0U); /* Software Input On Field: Input Path is determined by functionality */
299 IOMUXC_SetPinMux(
300 IOMUXC_GPIO_EMC_02_SEMC_DATA02, /* GPIO_EMC_02 is configured as SEMC_DATA02 */
301 0U); /* Software Input On Field: Input Path is determined by functionality */
302 IOMUXC_SetPinMux(
303 IOMUXC_GPIO_EMC_03_SEMC_DATA03, /* GPIO_EMC_03 is configured as SEMC_DATA03 */
304 0U); /* Software Input On Field: Input Path is determined by functionality */
305 IOMUXC_SetPinMux(
306 IOMUXC_GPIO_EMC_04_SEMC_DATA04, /* GPIO_EMC_04 is configured as SEMC_DATA04 */
307 0U); /* Software Input On Field: Input Path is determined by functionality */
308 IOMUXC_SetPinMux(
309 IOMUXC_GPIO_EMC_05_SEMC_DATA05, /* GPIO_EMC_05 is configured as SEMC_DATA05 */
310 0U); /* Software Input On Field: Input Path is determined by functionality */
311 IOMUXC_SetPinMux(
312 IOMUXC_GPIO_EMC_06_SEMC_DATA06, /* GPIO_EMC_06 is configured as SEMC_DATA06 */
313 0U); /* Software Input On Field: Input Path is determined by functionality */
314 IOMUXC_SetPinMux(
315 IOMUXC_GPIO_EMC_07_SEMC_DATA07, /* GPIO_EMC_07 is configured as SEMC_DATA07 */
316 0U); /* Software Input On Field: Input Path is determined by functionality */
317 IOMUXC_SetPinMux(
318 IOMUXC_GPIO_EMC_08_SEMC_DM00, /* GPIO_EMC_08 is configured as SEMC_DM00 */
319 0U); /* Software Input On Field: Input Path is determined by functionality */
320 IOMUXC_SetPinMux(
321 IOMUXC_GPIO_EMC_09_SEMC_WE, /* GPIO_EMC_09 is configured as SEMC_WE */
322 0U); /* Software Input On Field: Input Path is determined by functionality */
323 IOMUXC_SetPinMux(
324 IOMUXC_GPIO_EMC_10_SEMC_CAS, /* GPIO_EMC_10 is configured as SEMC_CAS */
325 0U); /* Software Input On Field: Input Path is determined by functionality */
326 IOMUXC_SetPinMux(
327 IOMUXC_GPIO_EMC_11_SEMC_RAS, /* GPIO_EMC_11 is configured as SEMC_RAS */
328 0U); /* Software Input On Field: Input Path is determined by functionality */
329 IOMUXC_SetPinMux(
330 IOMUXC_GPIO_EMC_12_SEMC_CS0, /* GPIO_EMC_12 is configured as SEMC_CS0 */
331 0U); /* Software Input On Field: Input Path is determined by functionality */
332 IOMUXC_SetPinMux(
333 IOMUXC_GPIO_EMC_13_SEMC_BA0, /* GPIO_EMC_13 is configured as SEMC_BA0 */
334 0U); /* Software Input On Field: Input Path is determined by functionality */
335 IOMUXC_SetPinMux(
336 IOMUXC_GPIO_EMC_14_SEMC_BA1, /* GPIO_EMC_14 is configured as SEMC_BA1 */
337 0U); /* Software Input On Field: Input Path is determined by functionality */
338 IOMUXC_SetPinMux(
339 IOMUXC_GPIO_EMC_15_SEMC_ADDR10, /* GPIO_EMC_15 is configured as SEMC_ADDR10 */
340 0U); /* Software Input On Field: Input Path is determined by functionality */
341 IOMUXC_SetPinMux(
342 IOMUXC_GPIO_EMC_16_SEMC_ADDR00, /* GPIO_EMC_16 is configured as SEMC_ADDR00 */
343 0U); /* Software Input On Field: Input Path is determined by functionality */
344 IOMUXC_SetPinMux(
345 IOMUXC_GPIO_EMC_17_SEMC_ADDR01, /* GPIO_EMC_17 is configured as SEMC_ADDR01 */
346 0U); /* Software Input On Field: Input Path is determined by functionality */
347 IOMUXC_SetPinMux(
348 IOMUXC_GPIO_EMC_18_SEMC_ADDR02, /* GPIO_EMC_18 is configured as SEMC_ADDR02 */
349 0U); /* Software Input On Field: Input Path is determined by functionality */
350 IOMUXC_SetPinMux(
351 IOMUXC_GPIO_EMC_19_SEMC_ADDR03, /* GPIO_EMC_19 is configured as SEMC_ADDR03 */
352 0U); /* Software Input On Field: Input Path is determined by functionality */
353 IOMUXC_SetPinMux(
354 IOMUXC_GPIO_EMC_20_SEMC_ADDR04, /* GPIO_EMC_20 is configured as SEMC_ADDR04 */
355 0U); /* Software Input On Field: Input Path is determined by functionality */
356 IOMUXC_SetPinMux(
357 IOMUXC_GPIO_EMC_21_SEMC_ADDR05, /* GPIO_EMC_21 is configured as SEMC_ADDR05 */
358 0U); /* Software Input On Field: Input Path is determined by functionality */
359 IOMUXC_SetPinMux(
360 IOMUXC_GPIO_EMC_22_SEMC_ADDR06, /* GPIO_EMC_22 is configured as SEMC_ADDR06 */
361 0U); /* Software Input On Field: Input Path is determined by functionality */
362 IOMUXC_SetPinMux(
363 IOMUXC_GPIO_EMC_23_SEMC_ADDR07, /* GPIO_EMC_23 is configured as SEMC_ADDR07 */
364 0U); /* Software Input On Field: Input Path is determined by functionality */
365 IOMUXC_SetPinMux(
366 IOMUXC_GPIO_EMC_24_SEMC_ADDR08, /* GPIO_EMC_24 is configured as SEMC_ADDR08 */
367 0U); /* Software Input On Field: Input Path is determined by functionality */
368 IOMUXC_SetPinMux(
369 IOMUXC_GPIO_EMC_25_SEMC_ADDR09, /* GPIO_EMC_25 is configured as SEMC_ADDR09 */
370 0U); /* Software Input On Field: Input Path is determined by functionality */
371 IOMUXC_SetPinMux(
372 IOMUXC_GPIO_EMC_26_SEMC_ADDR11, /* GPIO_EMC_26 is configured as SEMC_ADDR11 */
373 0U); /* Software Input On Field: Input Path is determined by functionality */
374 IOMUXC_SetPinMux(
375 IOMUXC_GPIO_EMC_27_SEMC_ADDR12, /* GPIO_EMC_27 is configured as SEMC_ADDR12 */
376 0U); /* Software Input On Field: Input Path is determined by functionality */
377 IOMUXC_SetPinMux(
378 IOMUXC_GPIO_EMC_28_SEMC_DQS, /* GPIO_EMC_28 is configured as SEMC_DQS */
379 0U); /* Software Input On Field: Input Path is determined by functionality */
380 IOMUXC_SetPinMux(
381 IOMUXC_GPIO_EMC_29_SEMC_CKE, /* GPIO_EMC_29 is configured as SEMC_CKE */
382 0U); /* Software Input On Field: Input Path is determined by functionality */
383 IOMUXC_SetPinMux(
384 IOMUXC_GPIO_EMC_30_SEMC_CLK, /* GPIO_EMC_30 is configured as SEMC_CLK */
385 0U); /* Software Input On Field: Input Path is determined by functionality */
386 IOMUXC_SetPinMux(
387 IOMUXC_GPIO_EMC_31_SEMC_DM01, /* GPIO_EMC_31 is configured as SEMC_DM01 */
388 0U); /* Software Input On Field: Input Path is determined by functionality */
389 IOMUXC_SetPinMux(
390 IOMUXC_GPIO_EMC_32_SEMC_DATA08, /* GPIO_EMC_32 is configured as SEMC_DATA08 */
391 0U); /* Software Input On Field: Input Path is determined by functionality */
392 IOMUXC_SetPinMux(
393 IOMUXC_GPIO_EMC_33_SEMC_DATA09, /* GPIO_EMC_33 is configured as SEMC_DATA09 */
394 0U); /* Software Input On Field: Input Path is determined by functionality */
395 IOMUXC_SetPinMux(
396 IOMUXC_GPIO_EMC_34_SEMC_DATA10, /* GPIO_EMC_34 is configured as SEMC_DATA10 */
397 0U); /* Software Input On Field: Input Path is determined by functionality */
398 IOMUXC_SetPinMux(
399 IOMUXC_GPIO_EMC_35_SEMC_DATA11, /* GPIO_EMC_35 is configured as SEMC_DATA11 */
400 0U); /* Software Input On Field: Input Path is determined by functionality */
401 IOMUXC_SetPinMux(
402 IOMUXC_GPIO_EMC_36_SEMC_DATA12, /* GPIO_EMC_36 is configured as SEMC_DATA12 */
403 0U); /* Software Input On Field: Input Path is determined by functionality */
404 IOMUXC_SetPinMux(
405 IOMUXC_GPIO_EMC_37_SEMC_DATA13, /* GPIO_EMC_37 is configured as SEMC_DATA13 */
406 0U); /* Software Input On Field: Input Path is determined by functionality */
407 IOMUXC_SetPinMux(
408 IOMUXC_GPIO_EMC_38_SEMC_DATA14, /* GPIO_EMC_38 is configured as SEMC_DATA14 */
409 0U); /* Software Input On Field: Input Path is determined by functionality */
410 IOMUXC_SetPinMux(
411 IOMUXC_GPIO_EMC_39_SEMC_DATA15, /* GPIO_EMC_39 is configured as SEMC_DATA15 */
412 0U); /* Software Input On Field: Input Path is determined by functionality */
413}
414
415
416/*
417 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
418BOARD_InitCANPins:
419- options: {coreID: core0, enableClock: 'true'}
420- pin_list:
421 - {pin_num: '32', peripheral: CAN1, signal: RX, pin_signal: GPIO_SD_B1_01}
422 - {pin_num: '33', peripheral: CAN1, signal: TX, pin_signal: GPIO_SD_B1_00}
423 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
424 */
425
426/* FUNCTION ************************************************************************************************************
427 *
428 * Function Name : BOARD_InitCANPins
429 * Description : Configures pin routing and optionally pin electrical features.
430 *
431 * END ****************************************************************************************************************/
432void BOARD_InitCANPins(void) {
433 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
434
435 IOMUXC_SetPinMux(
436 IOMUXC_GPIO_SD_B1_00_FLEXCAN1_TX, /* GPIO_SD_B1_00 is configured as FLEXCAN1_TX */
437 0U); /* Software Input On Field: Input Path is determined by functionality */
438 IOMUXC_SetPinMux(
439 IOMUXC_GPIO_SD_B1_01_FLEXCAN1_RX, /* GPIO_SD_B1_01 is configured as FLEXCAN1_RX */
440 0U); /* Software Input On Field: Input Path is determined by functionality */
441}
442
443
444/*
445 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
446BOARD_InitENETPins:
447- options: {coreID: core0, enableClock: 'true'}
448- pin_list:
449 - {pin_num: '97', peripheral: ENET, signal: enet_rx_en, pin_signal: GPIO_AD_B0_11}
450 - {pin_num: '84', peripheral: GPIO1, signal: 'gpio_io, 22', pin_signal: GPIO_AD_B1_06}
451 - {pin_num: '107', peripheral: GPIO1, signal: 'gpio_io, 04', pin_signal: GPIO_AD_B0_04}
452 - {pin_num: '100', peripheral: ENET, signal: enet_tx_clk, pin_signal: GPIO_AD_B0_08}
453 - {pin_num: '95', peripheral: ENET, signal: enet_tx_en, pin_signal: GPIO_AD_B0_13}
454 - {pin_num: '93', peripheral: ENET, signal: 'enet_tx_data, 1', pin_signal: GPIO_AD_B0_15}
455 - {pin_num: '94', peripheral: ENET, signal: 'enet_tx_data, 0', pin_signal: GPIO_AD_B0_14}
456 - {pin_num: '96', peripheral: ENET, signal: enet_rx_er, pin_signal: GPIO_AD_B0_12}
457 - {pin_num: '99', peripheral: ENET, signal: 'enet_rx_data, 1', pin_signal: GPIO_AD_B0_09}
458 - {pin_num: '98', peripheral: ENET, signal: 'enet_rx_data, 0', pin_signal: GPIO_AD_B0_10}
459 - {pin_num: '116', peripheral: ENET, signal: enet_mdio, pin_signal: GPIO_EMC_40}
460 - {pin_num: '115', peripheral: ENET, signal: enet_mdc, pin_signal: GPIO_EMC_41}
461 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
462 */
463
464/* FUNCTION ************************************************************************************************************
465 *
466 * Function Name : BOARD_InitENETPins
467 * Description : Configures pin routing and optionally pin electrical features.
468 *
469 * END ****************************************************************************************************************/
470void BOARD_InitENETPins(void) {
471 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
472
473 IOMUXC_SetPinMux(
474 IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, /* GPIO_AD_B0_04 is configured as GPIO1_IO04 */
475 0U); /* Software Input On Field: Input Path is determined by functionality */
476 IOMUXC_SetPinMux(
477 IOMUXC_GPIO_AD_B0_08_ENET_TX_CLK, /* GPIO_AD_B0_08 is configured as ENET_TX_CLK */
478 0U); /* Software Input On Field: Input Path is determined by functionality */
479 IOMUXC_SetPinMux(
480 IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, /* GPIO_AD_B0_09 is configured as ENET_RDATA01 */
481 0U); /* Software Input On Field: Input Path is determined by functionality */
482 IOMUXC_SetPinMux(
483 IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, /* GPIO_AD_B0_10 is configured as ENET_RDATA00 */
484 0U); /* Software Input On Field: Input Path is determined by functionality */
485 IOMUXC_SetPinMux(
486 IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, /* GPIO_AD_B0_11 is configured as ENET_RX_EN */
487 0U); /* Software Input On Field: Input Path is determined by functionality */
488 IOMUXC_SetPinMux(
489 IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, /* GPIO_AD_B0_12 is configured as ENET_RX_ER */
490 0U); /* Software Input On Field: Input Path is determined by functionality */
491 IOMUXC_SetPinMux(
492 IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, /* GPIO_AD_B0_13 is configured as ENET_TX_EN */
493 0U); /* Software Input On Field: Input Path is determined by functionality */
494 IOMUXC_SetPinMux(
495 IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, /* GPIO_AD_B0_14 is configured as ENET_TDATA00 */
496 0U); /* Software Input On Field: Input Path is determined by functionality */
497 IOMUXC_SetPinMux(
498 IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, /* GPIO_AD_B0_15 is configured as ENET_TDATA01 */
499 0U); /* Software Input On Field: Input Path is determined by functionality */
500 IOMUXC_SetPinMux(
501 IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, /* GPIO_AD_B1_06 is configured as GPIO1_IO22 */
502 0U); /* Software Input On Field: Input Path is determined by functionality */
503 IOMUXC_SetPinMux(
504 IOMUXC_GPIO_EMC_40_ENET_MDIO, /* GPIO_EMC_40 is configured as ENET_MDIO */
505 0U); /* Software Input On Field: Input Path is determined by functionality */
506 IOMUXC_SetPinMux(
507 IOMUXC_GPIO_EMC_41_ENET_MDC, /* GPIO_EMC_41 is configured as ENET_MDC */
508 0U); /* Software Input On Field: Input Path is determined by functionality */
509}
510
511
512/*
513 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
514BOARD_InitUSDHCPins:
515- options: {coreID: core0, enableClock: 'true'}
516- pin_list:
517 - {pin_num: '45', peripheral: USDHC1, signal: usdhc_clk, pin_signal: GPIO_SD_B0_03}
518 - {pin_num: '46', peripheral: USDHC1, signal: usdhc_cmd, pin_signal: GPIO_SD_B0_02}
519 - {pin_num: '43', peripheral: USDHC1, signal: 'usdhc_data, 0', pin_signal: GPIO_SD_B0_04}
520 - {pin_num: '42', peripheral: USDHC1, signal: 'usdhc_data, 1', pin_signal: GPIO_SD_B0_05}
521 - {pin_num: '48', peripheral: USDHC1, signal: 'usdhc_data, 2', pin_signal: GPIO_SD_B0_00}
522 - {pin_num: '47', peripheral: USDHC1, signal: 'usdhc_data, 3', pin_signal: GPIO_SD_B0_01}
523 - {pin_num: '41', peripheral: GPIO3, signal: 'gpio_io, 19', pin_signal: GPIO_SD_B0_06}
524 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
525 */
526
527/* FUNCTION ************************************************************************************************************
528 *
529 * Function Name : BOARD_InitUSDHCPins
530 * Description : Configures pin routing and optionally pin electrical features.
531 *
532 * END ****************************************************************************************************************/
533void BOARD_InitUSDHCPins(void) {
534 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
535
536 IOMUXC_SetPinMux(
537 IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, /* GPIO_SD_B0_00 is configured as USDHC1_DATA2 */
538 0U); /* Software Input On Field: Input Path is determined by functionality */
539 IOMUXC_SetPinMux(
540 IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, /* GPIO_SD_B0_01 is configured as USDHC1_DATA3 */
541 0U); /* Software Input On Field: Input Path is determined by functionality */
542 IOMUXC_SetPinMux(
543 IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, /* GPIO_SD_B0_02 is configured as USDHC1_CMD */
544 0U); /* Software Input On Field: Input Path is determined by functionality */
545 IOMUXC_SetPinMux(
546 IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, /* GPIO_SD_B0_03 is configured as USDHC1_CLK */
547 0U); /* Software Input On Field: Input Path is determined by functionality */
548 IOMUXC_SetPinMux(
549 IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, /* GPIO_SD_B0_04 is configured as USDHC1_DATA0 */
550 0U); /* Software Input On Field: Input Path is determined by functionality */
551 IOMUXC_SetPinMux(
552 IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, /* GPIO_SD_B0_05 is configured as USDHC1_DATA1 */
553 0U); /* Software Input On Field: Input Path is determined by functionality */
554 IOMUXC_SetPinMux(
555 IOMUXC_GPIO_SD_B0_06_GPIO3_IO19, /* GPIO_SD_B0_06 is configured as GPIO3_IO19 */
556 0U); /* Software Input On Field: Input Path is determined by functionality */
557}
558
559
560/*
561 * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
562BOARD_InitQSPIPins:
563- options: {coreID: core0, enableClock: 'true'}
564- pin_list:
565 - {pin_num: '24', peripheral: FLEXSPI, signal: FLEXSPI_A_SCLK, pin_signal: GPIO_SD_B1_07}
566 - {pin_num: '23', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA0, pin_signal: GPIO_SD_B1_08}
567 - {pin_num: '21', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA1, pin_signal: GPIO_SD_B1_10}
568 - {pin_num: '22', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA2, pin_signal: GPIO_SD_B1_09}
569 - {pin_num: '25', peripheral: FLEXSPI, signal: FLEXSPI_A_DATA3, pin_signal: GPIO_SD_B1_06}
570 - {pin_num: '19', peripheral: FLEXSPI, signal: FLEXSPI_A_SS0_B, pin_signal: GPIO_SD_B1_11}
571 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
572 */
573
574/* FUNCTION ************************************************************************************************************
575 *
576 * Function Name : BOARD_InitQSPIPins
577 * Description : Configures pin routing and optionally pin electrical features.
578 *
579 * END ****************************************************************************************************************/
580void BOARD_InitQSPIPins(void) {
581 CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03U */
582
583 IOMUXC_SetPinMux(
584 IOMUXC_GPIO_SD_B1_06_FLEXSPI_A_DATA03, /* GPIO_SD_B1_06 is configured as FLEXSPI_A_DATA03 */
585 0U); /* Software Input On Field: Input Path is determined by functionality */
586 IOMUXC_SetPinMux(
587 IOMUXC_GPIO_SD_B1_07_FLEXSPI_A_SCLK, /* GPIO_SD_B1_07 is configured as FLEXSPI_A_SCLK */
588 0U); /* Software Input On Field: Input Path is determined by functionality */
589 IOMUXC_SetPinMux(
590 IOMUXC_GPIO_SD_B1_08_FLEXSPI_A_DATA00, /* GPIO_SD_B1_08 is configured as FLEXSPI_A_DATA00 */
591 0U); /* Software Input On Field: Input Path is determined by functionality */
592 IOMUXC_SetPinMux(
593 IOMUXC_GPIO_SD_B1_09_FLEXSPI_A_DATA02, /* GPIO_SD_B1_09 is configured as FLEXSPI_A_DATA02 */
594 0U); /* Software Input On Field: Input Path is determined by functionality */
595 IOMUXC_SetPinMux(
596 IOMUXC_GPIO_SD_B1_10_FLEXSPI_A_DATA01, /* GPIO_SD_B1_10 is configured as FLEXSPI_A_DATA01 */
597 0U); /* Software Input On Field: Input Path is determined by functionality */
598 IOMUXC_SetPinMux(
599 IOMUXC_GPIO_SD_B1_11_FLEXSPI_A_SS0_B, /* GPIO_SD_B1_11 is configured as FLEXSPI_A_SS0_B */
600 0U); /* Software Input On Field: Input Path is determined by functionality */
601}
602
603/***********************************************************************************************************************
604 * EOF
605 **********************************************************************************************************************/
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 22:55:37 +0100