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Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.h')
| -rw-r--r-- | lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.h | 436 |
1 files changed, 436 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.h new file mode 100644 index 000000000..505a3f56d --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/boards/evkmimxrt1024/project_template/pin_mux.h | |||
| @@ -0,0 +1,436 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2020 NXP | ||
| 3 | * All rights reserved. | ||
| 4 | * | ||
| 5 | * SPDX-License-Identifier: BSD-3-Clause | ||
| 6 | */ | ||
| 7 | |||
| 8 | /*********************************************************************************************************************** | ||
| 9 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file | ||
| 10 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. | ||
| 11 | **********************************************************************************************************************/ | ||
| 12 | |||
| 13 | #ifndef _PIN_MUX_H_ | ||
| 14 | #define _PIN_MUX_H_ | ||
| 15 | |||
| 16 | /*********************************************************************************************************************** | ||
| 17 | * Definitions | ||
| 18 | **********************************************************************************************************************/ | ||
| 19 | |||
| 20 | /* Define the flexspi macro. Note that it can't be modified here */ | ||
| 21 | #define IOMUXC_GPIO_AD_B1_00_FLEXSPI_A_DATA03 0x401F80FCU, 0x1U, 0x401F8374U, 0x1U, 0x401F8270U | ||
| 22 | #define IOMUXC_GPIO_AD_B1_01_FLEXSPI_A_SCLK 0x401F8100U, 0x1U, 0x401F8378U, 0x1U, 0x401F8274U | ||
| 23 | #define IOMUXC_GPIO_AD_B1_02_FLEXSPI_A_DATA00 0x401F8104U, 0x1U, 0x401F8368U, 0x1U, 0x401F8278U | ||
| 24 | #define IOMUXC_GPIO_AD_B1_03_FLEXSPI_A_DATA02 0x401F8108U, 0x1U, 0x401F8370U, 0x1U, 0x401F827CU | ||
| 25 | #define IOMUXC_GPIO_AD_B1_04_FLEXSPI_A_DATA01 0x401F810CU, 0x1U, 0x401F836CU, 0x1U, 0x401F8280U | ||
| 26 | #define IOMUXC_GPIO_AD_B1_05_FLEXSPI_A_SS0_B 0x401F8110U, 0x1U, 0, 0, 0x401F8284U | ||
| 27 | |||
| 28 | /*! @brief Direction type */ | ||
| 29 | typedef enum _pin_mux_direction | ||
| 30 | { | ||
| 31 | kPIN_MUX_DirectionInput = 0U, /* Input direction */ | ||
| 32 | kPIN_MUX_DirectionOutput = 1U, /* Output direction */ | ||
| 33 | kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */ | ||
| 34 | } pin_mux_direction_t; | ||
| 35 | |||
| 36 | /*! | ||
| 37 | * @addtogroup pin_mux | ||
| 38 | * @{ | ||
| 39 | */ | ||
| 40 | |||
| 41 | /*********************************************************************************************************************** | ||
| 42 | * API | ||
| 43 | **********************************************************************************************************************/ | ||
| 44 | |||
| 45 | #if defined(__cplusplus) | ||
| 46 | extern "C" { | ||
| 47 | #endif | ||
| 48 | |||
| 49 | /*! | ||
| 50 | * @brief Calls initialization functions. | ||
| 51 | * | ||
| 52 | */ | ||
| 53 | void BOARD_InitBootPins(void); | ||
| 54 | |||
| 55 | |||
| 56 | /*! | ||
| 57 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 58 | * | ||
| 59 | */ | ||
| 60 | void BOARD_InitPins(void); | ||
| 61 | |||
| 62 | /* GPIO_AD_B0_07 (number 101), UART1_RXD/J17[4] */ | ||
| 63 | #define BOARD_INITDEBUG_UARTPINS_UART1_RXD_PERIPHERAL LPUART1 /*!< Device name: LPUART1 */ | ||
| 64 | #define BOARD_INITDEBUG_UARTPINS_UART1_RXD_SIGNAL RX /*!< LPUART1 signal: RX */ | ||
| 65 | |||
| 66 | /* GPIO_AD_B0_06 (number 105), UART1_TXD/J17[6] */ | ||
| 67 | #define BOARD_INITDEBUG_UARTPINS_UART1_TXD_PERIPHERAL LPUART1 /*!< Device name: LPUART1 */ | ||
| 68 | #define BOARD_INITDEBUG_UARTPINS_UART1_TXD_SIGNAL TX /*!< LPUART1 signal: TX */ | ||
| 69 | |||
| 70 | |||
| 71 | /*! | ||
| 72 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 73 | * | ||
| 74 | */ | ||
| 75 | void BOARD_InitDEBUG_UARTPins(void); | ||
| 76 | |||
| 77 | /* GPIO_EMC_16 (number 142), SEMC_A0/U14[23]/BOOT_MODE[0] */ | ||
| 78 | #define BOARD_INITSDRAMPINS_SEMC_A0_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 79 | #define BOARD_INITSDRAMPINS_SEMC_A0_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 80 | #define BOARD_INITSDRAMPINS_SEMC_A0_CHANNEL 0U /*!< SEMC ADDR channel: 00 */ | ||
| 81 | |||
| 82 | /* GPIO_EMC_17 (number 141), SEMC_A1/U14[24]/BOOT_MODE[1] */ | ||
| 83 | #define BOARD_INITSDRAMPINS_SEMC_A1_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 84 | #define BOARD_INITSDRAMPINS_SEMC_A1_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 85 | #define BOARD_INITSDRAMPINS_SEMC_A1_CHANNEL 1U /*!< SEMC ADDR channel: 01 */ | ||
| 86 | |||
| 87 | /* GPIO_EMC_18 (number 140), SEMC_A2/U14[25]/BT_CFG[0] */ | ||
| 88 | #define BOARD_INITSDRAMPINS_SEMC_A2_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 89 | #define BOARD_INITSDRAMPINS_SEMC_A2_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 90 | #define BOARD_INITSDRAMPINS_SEMC_A2_CHANNEL 2U /*!< SEMC ADDR channel: 02 */ | ||
| 91 | |||
| 92 | /* GPIO_EMC_19 (number 139), SEMC_A3/U14[26]/BT_CFG[1] */ | ||
| 93 | #define BOARD_INITSDRAMPINS_SEMC_A3_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 94 | #define BOARD_INITSDRAMPINS_SEMC_A3_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 95 | #define BOARD_INITSDRAMPINS_SEMC_A3_CHANNEL 3U /*!< SEMC ADDR channel: 03 */ | ||
| 96 | |||
| 97 | /* GPIO_EMC_20 (number 138), SEMC_A4/U14[29]/BT_CFG[2] */ | ||
| 98 | #define BOARD_INITSDRAMPINS_SEMC_A4_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 99 | #define BOARD_INITSDRAMPINS_SEMC_A4_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 100 | #define BOARD_INITSDRAMPINS_SEMC_A4_CHANNEL 4U /*!< SEMC ADDR channel: 04 */ | ||
| 101 | |||
| 102 | /* GPIO_EMC_22 (number 136), SEMC_A6/U14[31]/BT_CFG[4] */ | ||
| 103 | #define BOARD_INITSDRAMPINS_SEMC_A6_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 104 | #define BOARD_INITSDRAMPINS_SEMC_A6_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 105 | #define BOARD_INITSDRAMPINS_SEMC_A6_CHANNEL 6U /*!< SEMC ADDR channel: 06 */ | ||
| 106 | |||
| 107 | /* GPIO_EMC_21 (number 137), SEMC_A5/U14[30]/BT_CFG[3] */ | ||
| 108 | #define BOARD_INITSDRAMPINS_SEMC_A5_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 109 | #define BOARD_INITSDRAMPINS_SEMC_A5_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 110 | #define BOARD_INITSDRAMPINS_SEMC_A5_CHANNEL 5U /*!< SEMC ADDR channel: 05 */ | ||
| 111 | |||
| 112 | /* GPIO_EMC_23 (number 133), SEMC_A7/U14[32]/BT_CFG[5] */ | ||
| 113 | #define BOARD_INITSDRAMPINS_SEMC_A7_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 114 | #define BOARD_INITSDRAMPINS_SEMC_A7_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 115 | #define BOARD_INITSDRAMPINS_SEMC_A7_CHANNEL 7U /*!< SEMC ADDR channel: 07 */ | ||
| 116 | |||
| 117 | /* GPIO_EMC_24 (number 132), SEMC_A8/U14[33]/BT_CFG[6] */ | ||
| 118 | #define BOARD_INITSDRAMPINS_SEMC_A8_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 119 | #define BOARD_INITSDRAMPINS_SEMC_A8_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 120 | #define BOARD_INITSDRAMPINS_SEMC_A8_CHANNEL 8U /*!< SEMC ADDR channel: 08 */ | ||
| 121 | |||
| 122 | /* GPIO_EMC_25 (number 131), SEMC_A9/U14[34]/BT_CFG[7] */ | ||
| 123 | #define BOARD_INITSDRAMPINS_SEMC_A9_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 124 | #define BOARD_INITSDRAMPINS_SEMC_A9_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 125 | #define BOARD_INITSDRAMPINS_SEMC_A9_CHANNEL 9U /*!< SEMC ADDR channel: 09 */ | ||
| 126 | |||
| 127 | /* GPIO_EMC_15 (number 143), SEMC_A10/U14[22] */ | ||
| 128 | #define BOARD_INITSDRAMPINS_SEMC_A10_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 129 | #define BOARD_INITSDRAMPINS_SEMC_A10_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 130 | #define BOARD_INITSDRAMPINS_SEMC_A10_CHANNEL 10U /*!< SEMC ADDR channel: 10 */ | ||
| 131 | |||
| 132 | /* GPIO_EMC_26 (number 130), SEMC_A11/U14[35]/BT_CFG[8] */ | ||
| 133 | #define BOARD_INITSDRAMPINS_SEMC_A11_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 134 | #define BOARD_INITSDRAMPINS_SEMC_A11_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 135 | #define BOARD_INITSDRAMPINS_SEMC_A11_CHANNEL 11U /*!< SEMC ADDR channel: 11 */ | ||
| 136 | |||
| 137 | /* GPIO_EMC_27 (number 129), SEMC_A12/U14[36]/BT_CFG[9] */ | ||
| 138 | #define BOARD_INITSDRAMPINS_SEMC_A12_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 139 | #define BOARD_INITSDRAMPINS_SEMC_A12_SIGNAL ADDR /*!< SEMC signal: ADDR */ | ||
| 140 | #define BOARD_INITSDRAMPINS_SEMC_A12_CHANNEL 12U /*!< SEMC ADDR channel: 12 */ | ||
| 141 | |||
| 142 | /* GPIO_EMC_13 (number 2), SEMC_BA0/U14[20] */ | ||
| 143 | #define BOARD_INITSDRAMPINS_SEMC_BA0_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 144 | #define BOARD_INITSDRAMPINS_SEMC_BA0_SIGNAL BA /*!< SEMC signal: BA */ | ||
| 145 | #define BOARD_INITSDRAMPINS_SEMC_BA0_CHANNEL 0U /*!< SEMC BA channel: 0 */ | ||
| 146 | |||
| 147 | /* GPIO_EMC_14 (number 1), SEMC_BA1/U14[21] */ | ||
| 148 | #define BOARD_INITSDRAMPINS_SEMC_BA1_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 149 | #define BOARD_INITSDRAMPINS_SEMC_BA1_SIGNAL BA /*!< SEMC signal: BA */ | ||
| 150 | #define BOARD_INITSDRAMPINS_SEMC_BA1_CHANNEL 1U /*!< SEMC BA channel: 1 */ | ||
| 151 | |||
| 152 | /* GPIO_EMC_10 (number 7), SEMC_CAS/U14[17] */ | ||
| 153 | #define BOARD_INITSDRAMPINS_SEMC_CAS_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 154 | #define BOARD_INITSDRAMPINS_SEMC_CAS_SIGNAL semc_cas /*!< SEMC signal: semc_cas */ | ||
| 155 | |||
| 156 | /* GPIO_EMC_29 (number 127), SEMC_CKE/U14[37] */ | ||
| 157 | #define BOARD_INITSDRAMPINS_SEMC_CKE_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 158 | #define BOARD_INITSDRAMPINS_SEMC_CKE_SIGNAL semc_cke /*!< SEMC signal: semc_cke */ | ||
| 159 | |||
| 160 | /* GPIO_EMC_30 (number 126), SEMC_CLK/U14[38] */ | ||
| 161 | #define BOARD_INITSDRAMPINS_SEMC_CLK_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 162 | #define BOARD_INITSDRAMPINS_SEMC_CLK_SIGNAL semc_clk /*!< SEMC signal: semc_clk */ | ||
| 163 | |||
| 164 | /* GPIO_EMC_12 (number 3), SEMC_CS0/U14[19] */ | ||
| 165 | #define BOARD_INITSDRAMPINS_SEMC_CS0_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 166 | #define BOARD_INITSDRAMPINS_SEMC_CS0_SIGNAL CS /*!< SEMC signal: CS */ | ||
| 167 | #define BOARD_INITSDRAMPINS_SEMC_CS0_CHANNEL 0U /*!< SEMC CS channel: 0 */ | ||
| 168 | |||
| 169 | /* GPIO_EMC_09 (number 8), SEMC_WE/U14[16] */ | ||
| 170 | #define BOARD_INITSDRAMPINS_SEMC_WE_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 171 | #define BOARD_INITSDRAMPINS_SEMC_WE_SIGNAL semc_we /*!< SEMC signal: semc_we */ | ||
| 172 | |||
| 173 | /* GPIO_EMC_11 (number 4), SEMC_RAS/U14[18] */ | ||
| 174 | #define BOARD_INITSDRAMPINS_SEMC_RAS_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 175 | #define BOARD_INITSDRAMPINS_SEMC_RAS_SIGNAL semc_ras /*!< SEMC signal: semc_ras */ | ||
| 176 | |||
| 177 | /* GPIO_EMC_28 (number 128), SEMC_DQS */ | ||
| 178 | #define BOARD_INITSDRAMPINS_SEMC_DQS_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 179 | #define BOARD_INITSDRAMPINS_SEMC_DQS_SIGNAL semc_dqs /*!< SEMC signal: semc_dqs */ | ||
| 180 | |||
| 181 | /* GPIO_EMC_31 (number 125), SEMC_DM1/U14[39] */ | ||
| 182 | #define BOARD_INITSDRAMPINS_SEMC_DM1_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 183 | #define BOARD_INITSDRAMPINS_SEMC_DM1_SIGNAL DM /*!< SEMC signal: DM */ | ||
| 184 | #define BOARD_INITSDRAMPINS_SEMC_DM1_CHANNEL 1U /*!< SEMC DM channel: 1 */ | ||
| 185 | |||
| 186 | /* GPIO_EMC_08 (number 9), SEMC_DM0/U14[15] */ | ||
| 187 | #define BOARD_INITSDRAMPINS_SEMC_DM0_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 188 | #define BOARD_INITSDRAMPINS_SEMC_DM0_SIGNAL DM /*!< SEMC signal: DM */ | ||
| 189 | #define BOARD_INITSDRAMPINS_SEMC_DM0_CHANNEL 0U /*!< SEMC DM channel: 0 */ | ||
| 190 | |||
| 191 | /* GPIO_EMC_39 (number 117), SEMC_D15/U14[53] */ | ||
| 192 | #define BOARD_INITSDRAMPINS_SEMC_D15_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 193 | #define BOARD_INITSDRAMPINS_SEMC_D15_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 194 | #define BOARD_INITSDRAMPINS_SEMC_D15_CHANNEL 15U /*!< SEMC DATA channel: 15 */ | ||
| 195 | |||
| 196 | /* GPIO_EMC_38 (number 118), SEMC_D14/U14[51] */ | ||
| 197 | #define BOARD_INITSDRAMPINS_SEMC_D14_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 198 | #define BOARD_INITSDRAMPINS_SEMC_D14_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 199 | #define BOARD_INITSDRAMPINS_SEMC_D14_CHANNEL 14U /*!< SEMC DATA channel: 14 */ | ||
| 200 | |||
| 201 | /* GPIO_EMC_37 (number 119), SEMC_D13/U14[50] */ | ||
| 202 | #define BOARD_INITSDRAMPINS_SEMC_D13_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 203 | #define BOARD_INITSDRAMPINS_SEMC_D13_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 204 | #define BOARD_INITSDRAMPINS_SEMC_D13_CHANNEL 13U /*!< SEMC DATA channel: 13 */ | ||
| 205 | |||
| 206 | /* GPIO_EMC_36 (number 120), SEMC_D12/U14[48] */ | ||
| 207 | #define BOARD_INITSDRAMPINS_SEMC_D12_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 208 | #define BOARD_INITSDRAMPINS_SEMC_D12_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 209 | #define BOARD_INITSDRAMPINS_SEMC_D12_CHANNEL 12U /*!< SEMC DATA channel: 12 */ | ||
| 210 | |||
| 211 | /* GPIO_EMC_34 (number 122), SEMC_D10/U14[45] */ | ||
| 212 | #define BOARD_INITSDRAMPINS_SEMC_D10_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 213 | #define BOARD_INITSDRAMPINS_SEMC_D10_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 214 | #define BOARD_INITSDRAMPINS_SEMC_D10_CHANNEL 10U /*!< SEMC DATA channel: 10 */ | ||
| 215 | |||
| 216 | /* GPIO_EMC_35 (number 121), SEMC_D11/U14[47] */ | ||
| 217 | #define BOARD_INITSDRAMPINS_SEMC_D11_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 218 | #define BOARD_INITSDRAMPINS_SEMC_D11_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 219 | #define BOARD_INITSDRAMPINS_SEMC_D11_CHANNEL 11U /*!< SEMC DATA channel: 11 */ | ||
| 220 | |||
| 221 | /* GPIO_EMC_33 (number 123), SEMC_D9/U14[44] */ | ||
| 222 | #define BOARD_INITSDRAMPINS_SEMC_D9_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 223 | #define BOARD_INITSDRAMPINS_SEMC_D9_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 224 | #define BOARD_INITSDRAMPINS_SEMC_D9_CHANNEL 9U /*!< SEMC DATA channel: 09 */ | ||
| 225 | |||
| 226 | /* GPIO_EMC_32 (number 124), SEMC_D8/U14[42] */ | ||
| 227 | #define BOARD_INITSDRAMPINS_SEMC_D8_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 228 | #define BOARD_INITSDRAMPINS_SEMC_D8_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 229 | #define BOARD_INITSDRAMPINS_SEMC_D8_CHANNEL 8U /*!< SEMC DATA channel: 08 */ | ||
| 230 | |||
| 231 | /* GPIO_EMC_07 (number 10), SEMC_D7/U14[13] */ | ||
| 232 | #define BOARD_INITSDRAMPINS_SEMC_D7_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 233 | #define BOARD_INITSDRAMPINS_SEMC_D7_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 234 | #define BOARD_INITSDRAMPINS_SEMC_D7_CHANNEL 7U /*!< SEMC DATA channel: 07 */ | ||
| 235 | |||
| 236 | /* GPIO_EMC_06 (number 12), SEMC_D6/U14[11] */ | ||
| 237 | #define BOARD_INITSDRAMPINS_SEMC_D6_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 238 | #define BOARD_INITSDRAMPINS_SEMC_D6_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 239 | #define BOARD_INITSDRAMPINS_SEMC_D6_CHANNEL 6U /*!< SEMC DATA channel: 06 */ | ||
| 240 | |||
| 241 | /* GPIO_EMC_05 (number 13), SEMC_D5/U14[10] */ | ||
| 242 | #define BOARD_INITSDRAMPINS_SEMC_D5_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 243 | #define BOARD_INITSDRAMPINS_SEMC_D5_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 244 | #define BOARD_INITSDRAMPINS_SEMC_D5_CHANNEL 5U /*!< SEMC DATA channel: 05 */ | ||
| 245 | |||
| 246 | /* GPIO_EMC_04 (number 14), SEMC_D4/U14[8] */ | ||
| 247 | #define BOARD_INITSDRAMPINS_SEMC_D4_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 248 | #define BOARD_INITSDRAMPINS_SEMC_D4_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 249 | #define BOARD_INITSDRAMPINS_SEMC_D4_CHANNEL 4U /*!< SEMC DATA channel: 04 */ | ||
| 250 | |||
| 251 | /* GPIO_EMC_03 (number 15), SEMC_D3/U14[7] */ | ||
| 252 | #define BOARD_INITSDRAMPINS_SEMC_D3_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 253 | #define BOARD_INITSDRAMPINS_SEMC_D3_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 254 | #define BOARD_INITSDRAMPINS_SEMC_D3_CHANNEL 3U /*!< SEMC DATA channel: 03 */ | ||
| 255 | |||
| 256 | /* GPIO_EMC_02 (number 16), SEMC_D2/U14[5] */ | ||
| 257 | #define BOARD_INITSDRAMPINS_SEMC_D2_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 258 | #define BOARD_INITSDRAMPINS_SEMC_D2_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 259 | #define BOARD_INITSDRAMPINS_SEMC_D2_CHANNEL 2U /*!< SEMC DATA channel: 02 */ | ||
| 260 | |||
| 261 | /* GPIO_EMC_01 (number 17), SEMC_D1/U14[4] */ | ||
| 262 | #define BOARD_INITSDRAMPINS_SEMC_D1_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 263 | #define BOARD_INITSDRAMPINS_SEMC_D1_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 264 | #define BOARD_INITSDRAMPINS_SEMC_D1_CHANNEL 1U /*!< SEMC DATA channel: 01 */ | ||
| 265 | |||
| 266 | /* GPIO_EMC_00 (number 18), SEMC_D0/U14[2] */ | ||
| 267 | #define BOARD_INITSDRAMPINS_SEMC_D0_PERIPHERAL SEMC /*!< Device name: SEMC */ | ||
| 268 | #define BOARD_INITSDRAMPINS_SEMC_D0_SIGNAL DATA /*!< SEMC signal: DATA */ | ||
| 269 | #define BOARD_INITSDRAMPINS_SEMC_D0_CHANNEL 0U /*!< SEMC DATA channel: 00 */ | ||
| 270 | |||
| 271 | |||
| 272 | /*! | ||
| 273 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 274 | * | ||
| 275 | */ | ||
| 276 | void BOARD_InitSDRAMPins(void); | ||
| 277 | |||
| 278 | /* GPIO_SD_B1_01 (number 32), CAN1_RX/U9[4] */ | ||
| 279 | #define BOARD_INITCANPINS_CAN1_RX_PERIPHERAL CAN1 /*!< Device name: CAN1 */ | ||
| 280 | #define BOARD_INITCANPINS_CAN1_RX_SIGNAL RX /*!< CAN1 signal: RX */ | ||
| 281 | |||
| 282 | /* GPIO_SD_B1_00 (number 33), CAN1_TX/U9[1] */ | ||
| 283 | #define BOARD_INITCANPINS_CAN1_TX_PERIPHERAL CAN1 /*!< Device name: CAN1 */ | ||
| 284 | #define BOARD_INITCANPINS_CAN1_TX_SIGNAL TX /*!< CAN1 signal: TX */ | ||
| 285 | |||
| 286 | |||
| 287 | /*! | ||
| 288 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 289 | * | ||
| 290 | */ | ||
| 291 | void BOARD_InitCANPins(void); | ||
| 292 | |||
| 293 | /* GPIO_AD_B0_11 (number 97), ENET_CRS_DV/U11[18]/J19[3] */ | ||
| 294 | #define BOARD_INITENETPINS_ENET_CRS_DV_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 295 | #define BOARD_INITENETPINS_ENET_CRS_DV_SIGNAL enet_rx_en /*!< ENET signal: enet_rx_en */ | ||
| 296 | |||
| 297 | /* GPIO_AD_B1_06 (number 84), ENET_INT/U11[21]/J17[8] */ | ||
| 298 | #define BOARD_INITENETPINS_ENET_INT_GPIO GPIO1 /*!< GPIO device name: GPIO1 */ | ||
| 299 | #define BOARD_INITENETPINS_ENET_INT_PORT GPIO1 /*!< PORT device name: GPIO1 */ | ||
| 300 | #define BOARD_INITENETPINS_ENET_INT_PIN 22U /*!< GPIO1 pin index: 22 */ | ||
| 301 | |||
| 302 | /* GPIO_AD_B0_04 (number 107), JTAG_TDO/J16[13]/ENET_RST/U11[32] */ | ||
| 303 | #define BOARD_INITENETPINS_ENET_RST_GPIO GPIO1 /*!< GPIO device name: GPIO1 */ | ||
| 304 | #define BOARD_INITENETPINS_ENET_RST_PORT GPIO1 /*!< PORT device name: GPIO1 */ | ||
| 305 | #define BOARD_INITENETPINS_ENET_RST_PIN 4U /*!< GPIO1 pin index: 4 */ | ||
| 306 | |||
| 307 | /* GPIO_AD_B0_08 (number 100), ENET_TX_CLK/U11[9] */ | ||
| 308 | #define BOARD_INITENETPINS_ENET_TX_CLK_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 309 | #define BOARD_INITENETPINS_ENET_TX_CLK_SIGNAL enet_tx_clk /*!< ENET signal: enet_tx_clk */ | ||
| 310 | |||
| 311 | /* GPIO_AD_B0_13 (number 95), ENET_TXEN/U11[23]/J19[5] */ | ||
| 312 | #define BOARD_INITENETPINS_ENET_TXEN_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 313 | #define BOARD_INITENETPINS_ENET_TXEN_SIGNAL enet_tx_en /*!< ENET signal: enet_tx_en */ | ||
| 314 | |||
| 315 | /* GPIO_AD_B0_15 (number 93), ENET_TXD1/U11[25]/J19[2] */ | ||
| 316 | #define BOARD_INITENETPINS_ENET_TXD1_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 317 | #define BOARD_INITENETPINS_ENET_TXD1_SIGNAL enet_tx_data /*!< ENET signal: enet_tx_data */ | ||
| 318 | #define BOARD_INITENETPINS_ENET_TXD1_CHANNEL 1U /*!< ENET enet_tx_data channel: 1 */ | ||
| 319 | |||
| 320 | /* GPIO_AD_B0_14 (number 94), ENET_TXD0/U11[24]/J17[7] */ | ||
| 321 | #define BOARD_INITENETPINS_ENET_TXD0_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 322 | #define BOARD_INITENETPINS_ENET_TXD0_SIGNAL enet_tx_data /*!< ENET signal: enet_tx_data */ | ||
| 323 | #define BOARD_INITENETPINS_ENET_TXD0_CHANNEL 0U /*!< ENET enet_tx_data channel: 0 */ | ||
| 324 | |||
| 325 | /* GPIO_AD_B0_12 (number 96), ENET_RXER/U11[20]/J19[4] */ | ||
| 326 | #define BOARD_INITENETPINS_ENET_RXER_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 327 | #define BOARD_INITENETPINS_ENET_RXER_SIGNAL enet_rx_er /*!< ENET signal: enet_rx_er */ | ||
| 328 | |||
| 329 | /* GPIO_AD_B0_09 (number 99), ENET_RXD1/U11[15]/J17[3] */ | ||
| 330 | #define BOARD_INITENETPINS_ENET_RXD1_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 331 | #define BOARD_INITENETPINS_ENET_RXD1_SIGNAL enet_rx_data /*!< ENET signal: enet_rx_data */ | ||
| 332 | #define BOARD_INITENETPINS_ENET_RXD1_CHANNEL 1U /*!< ENET enet_rx_data channel: 1 */ | ||
| 333 | |||
| 334 | /* GPIO_AD_B0_10 (number 98), ENET_RXD0/U11[16]/J19[6] */ | ||
| 335 | #define BOARD_INITENETPINS_ENET_RXD0_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 336 | #define BOARD_INITENETPINS_ENET_RXD0_SIGNAL enet_rx_data /*!< ENET signal: enet_rx_data */ | ||
| 337 | #define BOARD_INITENETPINS_ENET_RXD0_CHANNEL 0U /*!< ENET enet_rx_data channel: 0 */ | ||
| 338 | |||
| 339 | /* GPIO_EMC_40 (number 116), ENET_MDIO/U11[11] */ | ||
| 340 | #define BOARD_INITENETPINS_ENET_MDIO_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 341 | #define BOARD_INITENETPINS_ENET_MDIO_SIGNAL enet_mdio /*!< ENET signal: enet_mdio */ | ||
| 342 | |||
| 343 | /* GPIO_EMC_41 (number 115), ENET_MDC/U11[12] */ | ||
| 344 | #define BOARD_INITENETPINS_ENET_MDC_PERIPHERAL ENET /*!< Device name: ENET */ | ||
| 345 | #define BOARD_INITENETPINS_ENET_MDC_SIGNAL enet_mdc /*!< ENET signal: enet_mdc */ | ||
| 346 | |||
| 347 | |||
| 348 | /*! | ||
| 349 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 350 | * | ||
| 351 | */ | ||
| 352 | void BOARD_InitENETPins(void); | ||
| 353 | |||
| 354 | /* GPIO_SD_B0_03 (number 45), SD1_CLK/J15[5] */ | ||
| 355 | #define BOARD_INITUSDHCPINS_SD1_CLK_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 356 | #define BOARD_INITUSDHCPINS_SD1_CLK_SIGNAL usdhc_clk /*!< USDHC1 signal: usdhc_clk */ | ||
| 357 | |||
| 358 | /* GPIO_SD_B0_02 (number 46), SD1_CMD/J15[3] */ | ||
| 359 | #define BOARD_INITUSDHCPINS_SD1_CMD_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 360 | #define BOARD_INITUSDHCPINS_SD1_CMD_SIGNAL usdhc_cmd /*!< USDHC1 signal: usdhc_cmd */ | ||
| 361 | |||
| 362 | /* GPIO_SD_B0_04 (number 43), SD1_D0/J15[7] */ | ||
| 363 | #define BOARD_INITUSDHCPINS_SD1_D0_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 364 | #define BOARD_INITUSDHCPINS_SD1_D0_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ | ||
| 365 | #define BOARD_INITUSDHCPINS_SD1_D0_CHANNEL 0U /*!< USDHC1 usdhc_data channel: 0 */ | ||
| 366 | |||
| 367 | /* GPIO_SD_B0_05 (number 42), SD1_D1/J15[8] */ | ||
| 368 | #define BOARD_INITUSDHCPINS_SD1_D1_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 369 | #define BOARD_INITUSDHCPINS_SD1_D1_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ | ||
| 370 | #define BOARD_INITUSDHCPINS_SD1_D1_CHANNEL 1U /*!< USDHC1 usdhc_data channel: 1 */ | ||
| 371 | |||
| 372 | /* GPIO_SD_B0_00 (number 48), SD1_D2/J15[1] */ | ||
| 373 | #define BOARD_INITUSDHCPINS_SD1_D2_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 374 | #define BOARD_INITUSDHCPINS_SD1_D2_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ | ||
| 375 | #define BOARD_INITUSDHCPINS_SD1_D2_CHANNEL 2U /*!< USDHC1 usdhc_data channel: 2 */ | ||
| 376 | |||
| 377 | /* GPIO_SD_B0_01 (number 47), SD1_D3/J15[2] */ | ||
| 378 | #define BOARD_INITUSDHCPINS_SD1_D3_PERIPHERAL USDHC1 /*!< Device name: USDHC1 */ | ||
| 379 | #define BOARD_INITUSDHCPINS_SD1_D3_SIGNAL usdhc_data /*!< USDHC1 signal: usdhc_data */ | ||
| 380 | #define BOARD_INITUSDHCPINS_SD1_D3_CHANNEL 3U /*!< USDHC1 usdhc_data channel: 3 */ | ||
| 381 | |||
| 382 | /* GPIO_SD_B0_06 (number 41), SD_CD_SW/J15[9] */ | ||
| 383 | #define BOARD_INITUSDHCPINS_SD_CD_SW_GPIO GPIO3 /*!< GPIO device name: GPIO3 */ | ||
| 384 | #define BOARD_INITUSDHCPINS_SD_CD_SW_PORT GPIO3 /*!< PORT device name: GPIO3 */ | ||
| 385 | #define BOARD_INITUSDHCPINS_SD_CD_SW_PIN 19U /*!< GPIO3 pin index: 19 */ | ||
| 386 | |||
| 387 | |||
| 388 | /*! | ||
| 389 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 390 | * | ||
| 391 | */ | ||
| 392 | void BOARD_InitUSDHCPins(void); | ||
| 393 | |||
| 394 | /* GPIO_SD_B1_07 (number 24), FlexSPI_CLK/U13[6] */ | ||
| 395 | #define BOARD_INITQSPIPINS_FlexSPI_CLK_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 396 | #define BOARD_INITQSPIPINS_FlexSPI_CLK_SIGNAL FLEXSPI_A_SCLK /*!< FLEXSPI signal: FLEXSPI_A_SCLK */ | ||
| 397 | |||
| 398 | /* GPIO_SD_B1_08 (number 23), FlexSPI_D0_A/U13[5] */ | ||
| 399 | #define BOARD_INITQSPIPINS_FlexSPI_D0_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 400 | #define BOARD_INITQSPIPINS_FlexSPI_D0_A_SIGNAL FLEXSPI_A_DATA0 /*!< FLEXSPI signal: FLEXSPI_A_DATA0 */ | ||
| 401 | |||
| 402 | /* GPIO_SD_B1_10 (number 21), FlexSPI_D1_A/U13[2] */ | ||
| 403 | #define BOARD_INITQSPIPINS_FlexSPI_D1_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 404 | #define BOARD_INITQSPIPINS_FlexSPI_D1_A_SIGNAL FLEXSPI_A_DATA1 /*!< FLEXSPI signal: FLEXSPI_A_DATA1 */ | ||
| 405 | |||
| 406 | /* GPIO_SD_B1_09 (number 22), FlexSPI_D2_A/U13[3] */ | ||
| 407 | #define BOARD_INITQSPIPINS_FlexSPI_D2_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 408 | #define BOARD_INITQSPIPINS_FlexSPI_D2_A_SIGNAL FLEXSPI_A_DATA2 /*!< FLEXSPI signal: FLEXSPI_A_DATA2 */ | ||
| 409 | |||
| 410 | /* GPIO_SD_B1_06 (number 25), FlexSPI_D3_A/U13[7] */ | ||
| 411 | #define BOARD_INITQSPIPINS_FlexSPI_D3_A_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 412 | #define BOARD_INITQSPIPINS_FlexSPI_D3_A_SIGNAL FLEXSPI_A_DATA3 /*!< FLEXSPI signal: FLEXSPI_A_DATA3 */ | ||
| 413 | |||
| 414 | /* GPIO_SD_B1_11 (number 19), FlexSPI_SS0/U13[1] */ | ||
| 415 | #define BOARD_INITQSPIPINS_FlexSPI_SS0_PERIPHERAL FLEXSPI /*!< Device name: FLEXSPI */ | ||
| 416 | #define BOARD_INITQSPIPINS_FlexSPI_SS0_SIGNAL FLEXSPI_A_SS0_B /*!< FLEXSPI signal: FLEXSPI_A_SS0_B */ | ||
| 417 | |||
| 418 | |||
| 419 | /*! | ||
| 420 | * @brief Configures pin routing and optionally pin electrical features. | ||
| 421 | * | ||
| 422 | */ | ||
| 423 | void BOARD_InitQSPIPins(void); | ||
| 424 | |||
| 425 | #if defined(__cplusplus) | ||
| 426 | } | ||
| 427 | #endif | ||
| 428 | |||
| 429 | /*! | ||
| 430 | * @} | ||
| 431 | */ | ||
| 432 | #endif /* _PIN_MUX_H_ */ | ||
| 433 | |||
| 434 | /*********************************************************************************************************************** | ||
| 435 | * EOF | ||
| 436 | **********************************************************************************************************************/ | ||