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diff --git a/lib/chibios-contrib/ext/mcux-sdk/boards/frdmk28fa/project_template/pin_mux.h b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmk28fa/project_template/pin_mux.h
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+++ b/lib/chibios-contrib/ext/mcux-sdk/boards/frdmk28fa/project_template/pin_mux.h
@@ -0,0 +1,539 @@
1/*
2 * Copyright 2018-2019 NXP.
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _PIN_MUX_H_
9#define _PIN_MUX_H_
10
11/*!
12 * @addtogroup pin_mux
13 * @{
14 */
15
16/***********************************************************************************************************************
17 * API
18 **********************************************************************************************************************/
19
20#if defined(__cplusplus)
21extern "C" {
22#endif
23
24/*!
25 * @brief Calls initialization functions.
26 *
27 */
28void BOARD_InitBootPins(void);
29
30/*!
31 * @brief Configures pin routing and optionally pin electrical features.
32 *
33 */
34void BOARD_InitPins(void);
35
36#define PORT_DFER_DFE_0_MASK 0x01u /*!<@brief Digital Filter Enable Mask for item 0. */
37
38/*! @name PORTA4 (coord L9), SW2
39 @{ */
40#define BOARD_SW2_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */
41#define BOARD_SW2_PORT PORTA /*!<@brief PORT device name: PORTA */
42#define BOARD_SW2_PIN 4U /*!<@brief PORTA pin index: 4 */
43 /* @} */
44
45/*! @name PORTD0 (coord A6), SW3
46 @{ */
47#define BOARD_SW3_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */
48#define BOARD_SW3_PORT PORTD /*!<@brief PORT device name: PORTD */
49#define BOARD_SW3_PIN 0U /*!<@brief PORTD pin index: 0 */
50 /* @} */
51
52/*!
53 * @brief Configures pin routing and optionally pin electrical features.
54 *
55 */
56void BOARD_InitButtonsPins(void);
57
58/*! @name PORTA18 (coord N13), Y2[1]/EXTAL
59 @{ */
60#define BOARD_EXTAL0_PORT PORTA /*!<@brief PORT device name: PORTA */
61#define BOARD_EXTAL0_PIN 18U /*!<@brief PORTA pin index: 18 */
62 /* @} */
63
64/*! @name PORTA19 (coord M13), Y2[3]/XTAL
65 @{ */
66#define BOARD_XTAL0_PORT PORTA /*!<@brief PORT device name: PORTA */
67#define BOARD_XTAL0_PIN 19U /*!<@brief PORTA pin index: 19 */
68 /* @} */
69
70/*! @name XTAL32 (coord N5), Y1[1]/XTAL32_RTC
71 @{ */
72/* @} */
73
74/*! @name EXTAL32 (coord N6), Y1[2]/EXTAL32_RTC
75 @{ */
76/* @} */
77
78/*!
79 * @brief Configures pin routing and optionally pin electrical features.
80 *
81 */
82void BOARD_InitOSCPins(void);
83
84/*! @name PORTE6 (coord E2), J1[7]/D1[1]/LEDRGB_RED
85 @{ */
86#define BOARD_LED_RED_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
87#define BOARD_LED_RED_PORT PORTE /*!<@brief PORT device name: PORTE */
88#define BOARD_LED_RED_PIN 6U /*!<@brief PORTE pin index: 6 */
89 /* @} */
90
91/*! @name PORTE7 (coord E3), J1[15]/D1[4]/LEDRGB_GREEN
92 @{ */
93#define BOARD_LED_GREEN_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
94#define BOARD_LED_GREEN_PORT PORTE /*!<@brief PORT device name: PORTE */
95#define BOARD_LED_GREEN_PIN 7U /*!<@brief PORTE pin index: 7 */
96 /* @} */
97
98/*! @name PORTE8 (coord E4), J1[13]/D1[3]/LEDRGB_BLUE
99 @{ */
100#define BOARD_LED_BLUE_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */
101#define BOARD_LED_BLUE_PORT PORTE /*!<@brief PORT device name: PORTE */
102#define BOARD_LED_BLUE_PIN 8U /*!<@brief PORTE pin index: 8 */
103 /* @} */
104
105/*!
106 * @brief Configures pin routing and optionally pin electrical features.
107 *
108 */
109void BOARD_InitLEDsPins(void);
110
111#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 receive data source select: LPUART0_RX pin */
112#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 transmit data source select: LPUART0_TX pin */
113
114/*! @name PORTC24 (coord B7), LPUART0_TX_TGTMCU
115 @{ */
116#define BOARD_DEBUG_UART_TX_PORT PORTC /*!<@brief PORT device name: PORTC */
117#define BOARD_DEBUG_UART_TX_PIN 24U /*!<@brief PORTC pin index: 24 */
118 /* @} */
119
120/*! @name PORTC25 (coord A7), LPUART0_RX_TGTMCU
121 @{ */
122#define BOARD_DEBUG_UART_RX_PORT PORTC /*!<@brief PORT device name: PORTC */
123#define BOARD_DEBUG_UART_RX_PIN 25U /*!<@brief PORTC pin index: 25 */
124 /* @} */
125
126/*!
127 * @brief Configures pin routing and optionally pin electrical features.
128 *
129 */
130void BOARD_InitDEBUG_UARTPins(void);
131
132/*! @name PORTC29 (coord B6), U6[4]/I2C_SCL
133 @{ */
134#define BOARD_I2C_SCL_PORT PORTC /*!<@brief PORT device name: PORTC */
135#define BOARD_I2C_SCL_PIN 29U /*!<@brief PORTC pin index: 29 */
136 /* @} */
137
138/*! @name PORTC28 (coord C6), U6[6]/I2C SDA
139 @{ */
140#define BOARD_I2C_SDA_PORT PORTC /*!<@brief PORT device name: PORTC */
141#define BOARD_I2C_SDA_PIN 28U /*!<@brief PORTC pin index: 28 */
142 /* @} */
143
144/*! @name PORTC26 (coord E6), U6[11]/INT1_FXOS8700CQ_R
145 @{ */
146#define BOARD_ACCEL_INT1_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */
147#define BOARD_ACCEL_INT1_PORT PORTC /*!<@brief PORT device name: PORTC */
148#define BOARD_ACCEL_INT1_PIN 26U /*!<@brief PORTC pin index: 26 */
149 /* @} */
150
151/*!
152 * @brief Configures pin routing and optionally pin electrical features.
153 *
154 */
155void BOARD_InitACCELPins(void);
156
157/*! @name PORTE2 (coord C1), U11[5]/QSPIA_DATA0
158 @{ */
159#define BOARD_QSPIA_DATA0_PORT PORTE /*!<@brief PORT device name: PORTE */
160#define BOARD_QSPIA_DATA0_PIN 2U /*!<@brief PORTE pin index: 2 */
161 /* @} */
162
163/*! @name PORTE4 (coord E1), U11[2]/QSPIA_DATA1
164 @{ */
165#define BOARD_QSPIA_DATA1_PORT PORTE /*!<@brief PORT device name: PORTE */
166#define BOARD_QSPIA_DATA1_PIN 4U /*!<@brief PORTE pin index: 4 */
167 /* @} */
168
169/*! @name PORTE3 (coord D1), U11[3]/QSPIA_DATA2
170 @{ */
171#define BOARD_QSPIA_DATA2_PORT PORTE /*!<@brief PORT device name: PORTE */
172#define BOARD_QSPIA_DATA2_PIN 3U /*!<@brief PORTE pin index: 3 */
173 /* @} */
174
175/*! @name PORTE0 (coord A1), U11[7]/QSPIA_DATA3
176 @{ */
177#define BOARD_QSPIA_DATA3_PORT PORTE /*!<@brief PORT device name: PORTE */
178#define BOARD_QSPIA_DATA3_PIN 0U /*!<@brief PORTE pin index: 0 */
179 /* @} */
180
181/*! @name PORTE1 (coord B1), U11[6]/QSPIA_SCLK
182 @{ */
183#define BOARD_QSPIA_SCLK_PORT PORTE /*!<@brief PORT device name: PORTE */
184#define BOARD_QSPIA_SCLK_PIN 1U /*!<@brief PORTE pin index: 1 */
185 /* @} */
186
187/*! @name PORTE5 (coord D2), U11[1]/QSPIA_SS
188 @{ */
189#define BOARD_QSPIA_SS_PORT PORTE /*!<@brief PORT device name: PORTE */
190#define BOARD_QSPIA_SS_PIN 5U /*!<@brief PORTE pin index: 5 */
191 /* @} */
192
193/*!
194 * @brief Configures pin routing and optionally pin electrical features.
195 *
196 */
197void BOARD_InitQSPI_FLASHPins(void);
198
199/*! @name USB1_DM (coord H1), J24[2]USB_CONN_DN
200 @{ */
201/* @} */
202
203/*! @name USB1_DP (coord J1), J24[3]USB_CONN_DP
204 @{ */
205/* @} */
206
207/*! @name USB1_VBUS (coord J2), J24[1]P5V0_USB_CONN_VBUS
208 @{ */
209/* @} */
210
211/*! @name PORTA11 (coord M11), J24[4]TC_USB_ID
212 @{ */
213#define BOARD_USB_ID_PORT PORTA /*!<@brief PORT device name: PORTA */
214#define BOARD_USB_ID_PIN 11U /*!<@brief PORTA pin index: 11 */
215 /* @} */
216
217/*! @name PORTA22 (coord K8), J27[7]/FXIO0_D6/PCLK
218 @{ */
219#define BOARD_USB0_CLKIN_PORT PORTA /*!<@brief PORT device name: PORTA */
220#define BOARD_USB0_CLKIN_PIN 22U /*!<@brief PORTA pin index: 22 */
221 /* @} */
222
223/*!
224 * @brief Configures pin routing and optionally pin electrical features.
225 *
226 */
227void BOARD_InitUSBPins(void);
228
229/*! @name PORTA29 (coord H11), J19[P1]/SDHC0_D2
230 @{ */
231#define BOARD_SDHC0_D2_PORT PORTA /*!<@brief PORT device name: PORTA */
232#define BOARD_SDHC0_D2_PIN 29U /*!<@brief PORTA pin index: 29 */
233 /* @} */
234
235/*! @name PORTA28 (coord H12), J19[P2]/SDHC0_D3
236 @{ */
237#define BOARD_SDHC0_D3_PORT PORTA /*!<@brief PORT device name: PORTA */
238#define BOARD_SDHC0_D3_PIN 28U /*!<@brief PORTA pin index: 28 */
239 /* @} */
240
241/*! @name PORTA25 (coord J11), J19[P7]/SDHC0_D0
242 @{ */
243#define BOARD_SDHC0_D0_PORT PORTA /*!<@brief PORT device name: PORTA */
244#define BOARD_SDHC0_D0_PIN 25U /*!<@brief PORTA pin index: 25 */
245 /* @} */
246
247/*! @name PORTA24 (coord K11), J19[P8]/SDHC0_D1
248 @{ */
249#define BOARD_SDHC0_D1_PORT PORTA /*!<@brief PORT device name: PORTA */
250#define BOARD_SDHC0_D1_PIN 24U /*!<@brief PORTA pin index: 24 */
251 /* @} */
252
253/*! @name PORTA26 (coord J10), J19[P5]/SDHC0_DCLK
254 @{ */
255#define BOARD_SDHC0_DCLK_PORT PORTA /*!<@brief PORT device name: PORTA */
256#define BOARD_SDHC0_DCLK_PIN 26U /*!<@brief PORTA pin index: 26 */
257 /* @} */
258
259/*! @name PORTA27 (coord H13), J19[P3]/SDHC0_CMD
260 @{ */
261#define BOARD_SDHC0_CMD_PORT PORTA /*!<@brief PORT device name: PORTA */
262#define BOARD_SDHC0_CMD_PIN 27U /*!<@brief PORTA pin index: 27 */
263 /* @} */
264
265/*! @name PORTB5 (coord F13), J19[G1]/SD_CARD_DETECT
266 @{ */
267#define BOARD_SDCARD_CARD_DETECTION_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */
268#define BOARD_SDCARD_CARD_DETECTION_PORT PORTB /*!<@brief PORT device name: PORTB */
269#define BOARD_SDCARD_CARD_DETECTION_PIN 5U /*!<@brief PORTB pin index: 5 */
270 /* @} */
271
272/*!
273 * @brief Configures pin routing and optionally pin electrical features.
274 *
275 */
276void BOARD_InitSDHC0Pins(void);
277
278/*! @name ADC0_SE16 (coord N4), Q5[2]/LIGHT_SENSOR
279 @{ */
280/* @} */
281
282/*!
283 * @brief Configures pin routing and optionally pin electrical features.
284 *
285 */
286void BOARD_Init_visible_lightPins(void);
287
288#define PORT_DFER_DFE_2_MASK 0x04u /*!<@brief Digital Filter Enable Mask for item 2. */
289#define PORT_DFER_DFE_3_MASK 0x08u /*!<@brief Digital Filter Enable Mask for item 3. */
290#define PORT_DFER_DFE_4_MASK 0x10u /*!<@brief Digital Filter Enable Mask for item 4. */
291#define PORT_DFER_DFE_5_MASK 0x20u /*!<@brief Digital Filter Enable Mask for item 5. */
292#define PORT_DFER_DFE_7_MASK 0x80u /*!<@brief Digital Filter Enable Mask for item 7. */
293
294/*! @name PORTC7 (coord B10), U13[H7]/SDRAM_A16
295 @{ */
296#define BOARD_SDRAM_A16_PORT PORTC /*!<@brief PORT device name: PORTC */
297#define BOARD_SDRAM_A16_PIN 7U /*!<@brief PORTC pin index: 7 */
298 /* @} */
299
300/*! @name PORTC8 (coord C10), U13[H8]/SDRAM_A15
301 @{ */
302#define BOARD_SDRAM_A15_PORT PORTC /*!<@brief PORT device name: PORTC */
303#define BOARD_SDRAM_A15_PIN 8U /*!<@brief PORTC pin index: 8 */
304 /* @} */
305
306/*! @name PORTC9 (coord C9), U13[J8]/SDRAM_A14
307 @{ */
308#define BOARD_SDRAM_A14_PORT PORTC /*!<@brief PORT device name: PORTC */
309#define BOARD_SDRAM_A14_PIN 9U /*!<@brief PORTC pin index: 9 */
310 /* @} */
311
312/*! @name PORTC10 (coord A8), U13[J7]/SDRAM_A13
313 @{ */
314#define BOARD_SDRAM_A13_PORT PORTC /*!<@brief PORT device name: PORTC */
315#define BOARD_SDRAM_A13_PIN 10U /*!<@brief PORTC pin index: 10 */
316 /* @} */
317
318/*! @name PORTD2 (coord A4), U13[J3]/SDRAM_A12
319 @{ */
320#define BOARD_SDRAM_A12_PORT PORTD /*!<@brief PORT device name: PORTD */
321#define BOARD_SDRAM_A12_PIN 2U /*!<@brief PORTD pin index: 2 */
322 /* @} */
323
324/*! @name PORTD3 (coord B4), U13[J2]/SDRAM_A11
325 @{ */
326#define BOARD_SDRAM_A11_PORT PORTD /*!<@brief PORT device name: PORTD */
327#define BOARD_SDRAM_A11_PIN 3U /*!<@brief PORTD pin index: 3 */
328 /* @} */
329
330/*! @name PORTD4 (coord B5), U13[H3]/SDRAM_A10
331 @{ */
332#define BOARD_SDRAM_A10_PORT PORTD /*!<@brief PORT device name: PORTD */
333#define BOARD_SDRAM_A10_PIN 4U /*!<@brief PORTD pin index: 4 */
334 /* @} */
335
336/*! @name PORTD5 (coord C4), U13[H2]/SDRAM_A9
337 @{ */
338#define BOARD_SDRAM_A9_PORT PORTD /*!<@brief PORT device name: PORTD */
339#define BOARD_SDRAM_A9_PIN 5U /*!<@brief PORTD pin index: 5 */
340 /* @} */
341
342/*! @name PORTC5 (coord A11), U13[H1]/SDRAM_A18
343 @{ */
344#define BOARD_SDRAM_A18_PORT PORTC /*!<@brief PORT device name: PORTC */
345#define BOARD_SDRAM_A18_PIN 5U /*!<@brief PORTC pin index: 5 */
346 /* @} */
347
348/*! @name PORTC4 (coord B11), U13[G3]/SDRAM_A19
349 @{ */
350#define BOARD_SDRAM_A19_PORT PORTC /*!<@brief PORT device name: PORTC */
351#define BOARD_SDRAM_A19_PIN 4U /*!<@brief PORTC pin index: 4 */
352 /* @} */
353
354/*! @name PORTC2 (coord A13), U13[H9]/SDRAM_A20
355 @{ */
356#define BOARD_SDRAM_A20_PORT PORTC /*!<@brief PORT device name: PORTC */
357#define BOARD_SDRAM_A20_PIN 2U /*!<@brief PORTC pin index: 2 */
358 /* @} */
359
360/*! @name PORTC1 (coord B12), U13[G2]/SDRAM_A21
361 @{ */
362#define BOARD_SDRAM_A21_PORT PORTC /*!<@brief PORT device name: PORTC */
363#define BOARD_SDRAM_A21_PIN 1U /*!<@brief PORTC pin index: 1 */
364 /* @} */
365
366/*! @name PORTC0 (coord B13), U13[G7]/SDRAM_A22
367 @{ */
368#define BOARD_SDRAM_A22_PORT PORTC /*!<@brief PORT device name: PORTC */
369#define BOARD_SDRAM_A22_PIN 0U /*!<@brief PORTC pin index: 0 */
370 /* @} */
371
372/*! @name PORTB18 (coord D12), U13[G8]/SDRAM_A23
373 @{ */
374#define BOARD_SDRAM_A23_PORT PORTB /*!<@brief PORT device name: PORTB */
375#define BOARD_SDRAM_A23_PIN 18U /*!<@brief PORTB pin index: 18 */
376 /* @} */
377
378/*! @name PORTB1 (coord G12), U13[F8]/SDRAM_RAS_b
379 @{ */
380#define BOARD_SDRAM_RAS_b_PORT PORTB /*!<@brief PORT device name: PORTB */
381#define BOARD_SDRAM_RAS_b_PIN 1U /*!<@brief PORTB pin index: 1 */
382 /* @} */
383
384/*! @name PORTB0 (coord G13), U13[F7]/SDRAM_CAS_b
385 @{ */
386#define BOARD_SDRAM_CAS_b_PORT PORTB /*!<@brief PORT device name: PORTB */
387#define BOARD_SDRAM_CAS_b_PIN 0U /*!<@brief PORTB pin index: 0 */
388 /* @} */
389
390/*! @name PORTB2 (coord G11), U13[F9]/SDRAM_WE_b
391 @{ */
392#define BOARD_SDRAM_WE_b_PORT PORTB /*!<@brief PORT device name: PORTB */
393#define BOARD_SDRAM_WE_b_PIN 2U /*!<@brief PORTB pin index: 2 */
394 /* @} */
395
396/*! @name PORTB3 (coord G10), U13[G9]/SDRAM_CS0_b
397 @{ */
398#define BOARD_SDRAM_CS0_b_PORT PORTB /*!<@brief PORT device name: PORTB */
399#define BOARD_SDRAM_CS0_b_PIN 3U /*!<@brief PORTB pin index: 3 */
400 /* @} */
401
402/*! @name PORTC17 (coord E7), U13[F1]/SDRAM_DQM3
403 @{ */
404#define BOARD_SDRAM_DQM3_PORT PORTC /*!<@brief PORT device name: PORTC */
405#define BOARD_SDRAM_DQM3_PIN 17U /*!<@brief PORTC pin index: 17 */
406 /* @} */
407
408/*! @name PORTC16 (coord E8), U13[E8]/SDRAM_DQM2
409 @{ */
410#define BOARD_SDRAM_DQM2_PORT PORTC /*!<@brief PORT device name: PORTC */
411#define BOARD_SDRAM_DQM2_PIN 16U /*!<@brief PORTC pin index: 16 */
412 /* @} */
413
414/*! @name PORTC3 (coord A12), U13[F2]/CLKOUT
415 @{ */
416#define BOARD_CLKOUT_PORT PORTC /*!<@brief PORT device name: PORTC */
417#define BOARD_CLKOUT_PIN 3U /*!<@brief PORTC pin index: 3 */
418 /* @} */
419
420/*! @name PORTD7 (coord E5), U13[F3]/SDRAM_CKE
421 @{ */
422#define BOARD_SDRAM_CKE_PORT PORTD /*!<@brief PORT device name: PORTD */
423#define BOARD_SDRAM_CKE_PIN 7U /*!<@brief PORTD pin index: 7 */
424 /* @} */
425
426/*! @name PORTB20 (coord D10), U13[A2]/SDRAM_D31
427 @{ */
428#define BOARD_SDRAM_D31_PORT PORTB /*!<@brief PORT device name: PORTB */
429#define BOARD_SDRAM_D31_PIN 20U /*!<@brief PORTB pin index: 20 */
430 /* @} */
431
432/*! @name PORTB21 (coord D9), U13[B1]/SDRAM_D30
433 @{ */
434#define BOARD_SDRAM_D30_PORT PORTB /*!<@brief PORT device name: PORTB */
435#define BOARD_SDRAM_D30_PIN 21U /*!<@brief PORTB pin index: 21 */
436 /* @} */
437
438/*! @name PORTB17 (coord D13), U13[A8]/SDRAM_D16
439 @{ */
440#define BOARD_SDRAM_D16_PORT PORTB /*!<@brief PORT device name: PORTB */
441#define BOARD_SDRAM_D16_PIN 17U /*!<@brief PORTB pin index: 17 */
442 /* @} */
443
444/*! @name PORTB16 (coord F8), U13[B9]/SDRAM_D17
445 @{ */
446#define BOARD_SDRAM_D17_PORT PORTB /*!<@brief PORT device name: PORTB */
447#define BOARD_SDRAM_D17_PIN 16U /*!<@brief PORTB pin index: 16 */
448 /* @} */
449
450/*! @name PORTB11 (coord E13), U13[B8]/SDRAM_D18
451 @{ */
452#define BOARD_SDRAM_D18_PORT PORTB /*!<@brief PORT device name: PORTB */
453#define BOARD_SDRAM_D18_PIN 11U /*!<@brief PORTB pin index: 11 */
454 /* @} */
455
456/*! @name PORTB10 (coord G9), U13[C9]/SDRAM_D19
457 @{ */
458#define BOARD_SDRAM_D19_PORT PORTB /*!<@brief PORT device name: PORTB */
459#define BOARD_SDRAM_D19_PIN 10U /*!<@brief PORTB pin index: 10 */
460 /* @} */
461
462/*! @name PORTB9 (coord F9), U13[C8]/SDRAM_D20
463 @{ */
464#define BOARD_SDRAM_D20_PORT PORTB /*!<@brief PORT device name: PORTB */
465#define BOARD_SDRAM_D20_PIN 9U /*!<@brief PORTB pin index: 9 */
466 /* @} */
467
468/*! @name PORTB8 (coord F10), U13[D9]/SDRAM_D21
469 @{ */
470#define BOARD_SDRAM_D21_PORT PORTB /*!<@brief PORT device name: PORTB */
471#define BOARD_SDRAM_D21_PIN 8U /*!<@brief PORTB pin index: 8 */
472 /* @} */
473
474/*! @name PORTB7 (coord F11), U13[D8]/SDRAM_D22
475 @{ */
476#define BOARD_SDRAM_D22_PORT PORTB /*!<@brief PORT device name: PORTB */
477#define BOARD_SDRAM_D22_PIN 7U /*!<@brief PORTB pin index: 7 */
478 /* @} */
479
480/*! @name PORTB6 (coord F12), U13[E9]/SDRAM_D23
481 @{ */
482#define BOARD_SDRAM_D23_PORT PORTB /*!<@brief PORT device name: PORTB */
483#define BOARD_SDRAM_D23_PIN 6U /*!<@brief PORTB pin index: 6 */
484 /* @} */
485
486/*! @name PORTC15 (coord D8), U13[E1]/SDRAM_D24
487 @{ */
488#define BOARD_SDRAM_D24_PORT PORTC /*!<@brief PORT device name: PORTC */
489#define BOARD_SDRAM_D24_PIN 15U /*!<@brief PORTC pin index: 15 */
490 /* @} */
491
492/*! @name PORTC14 (coord C8), U13[D2]/SDRAM_D25
493 @{ */
494#define BOARD_SDRAM_D25_PORT PORTC /*!<@brief PORT device name: PORTC */
495#define BOARD_SDRAM_D25_PIN 14U /*!<@brief PORTC pin index: 14 */
496 /* @} */
497
498/*! @name PORTC13 (coord B8), U13[D1]/SDRAM_D26
499 @{ */
500#define BOARD_SDRAM_D26_PORT PORTC /*!<@brief PORT device name: PORTC */
501#define BOARD_SDRAM_D26_PIN 13U /*!<@brief PORTC pin index: 13 */
502 /* @} */
503
504/*! @name PORTC12 (coord B9), U13[C2]/SDRAM_D27
505 @{ */
506#define BOARD_SDRAM_D27_PORT PORTC /*!<@brief PORT device name: PORTC */
507#define BOARD_SDRAM_D27_PIN 12U /*!<@brief PORTC pin index: 12 */
508 /* @} */
509
510/*! @name PORTB23 (coord C12), U13[C1]/SDRAM_D28
511 @{ */
512#define BOARD_SDRAM_D28_PORT PORTB /*!<@brief PORT device name: PORTB */
513#define BOARD_SDRAM_D28_PIN 23U /*!<@brief PORTB pin index: 23 */
514 /* @} */
515
516/*! @name PORTB22 (coord C13), U13[B2]/SDRAM_D29
517 @{ */
518#define BOARD_SDRAM_D29_PORT PORTB /*!<@brief PORT device name: PORTB */
519#define BOARD_SDRAM_D29_PIN 22U /*!<@brief PORTB pin index: 22 */
520 /* @} */
521
522/*!
523 * @brief Configures pin routing and optionally pin electrical features.
524 *
525 */
526void BOARD_InitSDRAMPins(void);
527
528#if defined(__cplusplus)
529}
530#endif
531
532/*!
533 * @}
534 */
535#endif /* _PIN_MUX_H_ */
536
537/***********************************************************************************************************************
538 * EOF
539 **********************************************************************************************************************/
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-30 16:57:56 +0100