diff options
Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/devices/K32L2B21A/project_template/pin_mux.c')
-rw-r--r-- | lib/chibios-contrib/ext/mcux-sdk/devices/K32L2B21A/project_template/pin_mux.c | 791 |
1 files changed, 791 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/K32L2B21A/project_template/pin_mux.c b/lib/chibios-contrib/ext/mcux-sdk/devices/K32L2B21A/project_template/pin_mux.c new file mode 100644 index 000000000..37d692bac --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/devices/K32L2B21A/project_template/pin_mux.c | |||
@@ -0,0 +1,791 @@ | |||
1 | /* | ||
2 | * Copyright 2019 NXP | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * SPDX-License-Identifier: BSD-3-Clause | ||
6 | */ | ||
7 | |||
8 | /*********************************************************************************************************************** | ||
9 | * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file | ||
10 | * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. | ||
11 | **********************************************************************************************************************/ | ||
12 | |||
13 | /* clang-format off */ | ||
14 | /* | ||
15 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
16 | !!GlobalInfo | ||
17 | product: Pins v6.0 | ||
18 | processor: K32L2B21xxxxA | ||
19 | package_id: K32L2B21VLH0A | ||
20 | mcu_data: ksdk2_0 | ||
21 | processor_version: 0.0.0 | ||
22 | pin_labels: | ||
23 | - {pin_num: '23', pin_signal: PTA1/LPUART0_RX/TPM2_CH0, label: 'J1[2]/D0/UART0_RX', identifier: DEBUG_UART0_RX} | ||
24 | - {pin_num: '24', pin_signal: PTA2/LPUART0_TX/TPM2_CH1, label: 'J1[4]/D1/UART0_TX', identifier: DEBUG_UART0_TX} | ||
25 | - {pin_num: '60', pin_signal: LCD_P43/PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI/FXIO0_D3, label: 'J1[6]/D2/LCD_P43', identifier: LCD_P43} | ||
26 | - {pin_num: '28', pin_signal: PTA12/TPM1_CH0, label: 'J1[8]/D3'} | ||
27 | - {pin_num: '26', pin_signal: PTA4/I2C1_SDA/TPM0_CH1/NMI_b, label: 'J1[10]/D4/SW1', identifier: SW1} | ||
28 | - {pin_num: '27', pin_signal: PTA5/USB_CLKIN/TPM0_CH2, label: 'J1[12]/D5/USB_CLKIN', identifier: USB0_CLKIN} | ||
29 | - {pin_num: '17', pin_signal: CMP0_IN5/ADC0_SE4b/PTE29/TPM0_CH2/TPM_CLKIN0, label: 'J1[14]/D6/CMP0_IN5'} | ||
30 | - {pin_num: '18', pin_signal: DAC0_OUT/ADC0_SE23/CMP0_IN4/PTE30/TPM0_CH3/TPM_CLKIN1/LPUART1_TX/LPTMR0_ALT1, label: 'J1[16]/J4[11]/D7/CMP0_IN4/DAC_OUT'} | ||
31 | - {pin_num: '29', pin_signal: PTA13/TPM1_CH1, label: 'J2[2]/D8'} | ||
32 | - {pin_num: '59', pin_signal: LCD_P42/PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO/FXIO0_D2, label: 'J2[4]/D9/LCD_P42', identifier: LCD_P42} | ||
33 | - {pin_num: '61', pin_signal: LCD_P44/PTD4/LLWU_P14/SPI1_SS/UART2_RX/TPM0_CH4/FXIO0_D4, label: 'J2[6]/D10/SPI1_PCS0/LCD_P44', identifier: LCD_P44} | ||
34 | - {pin_num: '63', pin_signal: LCD_P46/ADC0_SE7b/PTD6/LLWU_P15/SPI1_MOSI/LPUART0_RX/SPI1_MISO/FXIO0_D6, label: 'J2[8]/D11/SPI1_MOSI/LCD_P46'} | ||
35 | - {pin_num: '64', pin_signal: LCD_P47/PTD7/SPI1_MISO/LPUART0_TX/SPI1_MOSI/FXIO0_D7, label: 'J2[10]/D12/SPI1_MISO/LCD_P47'} | ||
36 | - {pin_num: '62', pin_signal: LCD_P45/ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5/FXIO0_D5, label: 'J2[12]/D13/SPI1_SCK/LED1/LCD_P45', identifier: LED1} | ||
37 | - {pin_num: '1', pin_signal: LCD_P48/PTE0/CLKOUT32K/SPI1_MISO/LPUART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDA, label: 'J2[18]/J4[9]/D14/I2C1_SDA/CMP0_OUT/LCD_P48', identifier: I2C1_SDA} | ||
38 | - {pin_num: '2', pin_signal: LCD_P49/PTE1/SPI1_MOSI/LPUART1_RX/SPI1_MISO/I2C1_SCL, label: 'J2[20]/D15/I2C1_SCL/LCD_P49', identifier: I2C1_SCL} | ||
39 | - {pin_num: '39', pin_signal: LCD_P12/PTB16/SPI1_MOSI/LPUART0_RX/TPM_CLKIN0/SPI1_MISO, label: 'J2[19]/LCD_P12'} | ||
40 | - {pin_num: '40', pin_signal: LCD_P13/PTB17/SPI1_MISO/LPUART0_TX/TPM_CLKIN1/SPI1_MOSI, label: 'J2[17]/LCD_P13'} | ||
41 | - {pin_num: '54', pin_signal: LCD_P25/PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT, label: 'J1[15]/INT1_ACCEL/LCD_P25', identifier: INT1_ACCEL} | ||
42 | - {pin_num: '56', pin_signal: LCD_P27/CMP0_IN1/PTC7/SPI0_MISO/USB_SOF_OUT/SPI0_MOSI, label: 'J1[11]/USB_SOF_OUT/LCD_P27', identifier: LCD_P27} | ||
43 | - {pin_num: '55', pin_signal: LCD_P26/CMP0_IN0/PTC6/LLWU_P10/SPI0_MOSI/EXTRG_IN/SPI0_MISO, label: 'J1[9]/LCD_P26', identifier: LCD_P26} | ||
44 | - {pin_num: '53', pin_signal: LCD_P24/PTC4/LLWU_P8/SPI0_SS/LPUART1_TX/TPM0_CH3, label: 'J1[7]/LCD_P24', identifier: LCD_P24} | ||
45 | - {pin_num: '43', pin_signal: LCD_P20/ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUT, label: 'J1[5]/LCD_P20/USB_SOF_OUT', identifier: LCD_P20;USB_SOF_OUT} | ||
46 | - {pin_num: '42', pin_signal: LCD_P15/PTB19/TPM2_CH1, label: 'J1[3]/LCD_P15', identifier: LCD_P15} | ||
47 | - {pin_num: '41', pin_signal: LCD_P14/PTB18/TPM2_CH0, label: 'J1[1]/LCD_P14', identifier: LCD_P14} | ||
48 | - {pin_num: '12', pin_signal: ADC0_DM3/ADC0_SE7a/PTE23/TPM2_CH1/UART2_RX/FXIO0_D7, label: 'J4[7]/DIFF_ADC1_DM'} | ||
49 | - {pin_num: '11', pin_signal: ADC0_DP3/ADC0_SE3/PTE22/TPM2_CH0/UART2_TX/FXIO0_D6, label: 'J4[5]/DIFF_ADC1_DP'} | ||
50 | - {pin_num: '10', pin_signal: LCD_P60/ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/LPUART0_RX/FXIO0_D5, label: 'J4[3]/DIFF_ADC0_DM/LCD_P60', identifier: LCD_P60} | ||
51 | - {pin_num: '9', pin_signal: LCD_P59/ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/LPUART0_TX/FXIO0_D4, label: 'J4[1]/DIFF_ADC0_DP/LCD_P59', identifier: LCD_P59} | ||
52 | - {pin_num: '35', pin_signal: LCD_P0/ADC0_SE8/PTB0/LLWU_P5/I2C0_SCL/TPM1_CH0, label: 'J4[2]/A0/LCD_P0'} | ||
53 | - {pin_num: '36', pin_signal: LCD_P1/ADC0_SE9/PTB1/I2C0_SDA/TPM1_CH1, label: 'J4[4]/A1/LCD_P1'} | ||
54 | - {pin_num: '37', pin_signal: LCD_P2/ADC0_SE12/PTB2/I2C0_SCL/TPM2_CH0, label: 'J4[6]/A2/LCD_P2'} | ||
55 | - {pin_num: '38', pin_signal: LCD_P3/ADC0_SE13/PTB3/I2C0_SDA/TPM2_CH1, label: 'J4[8]/A3/LCD_P3'} | ||
56 | - {pin_num: '45', pin_signal: LCD_P22/ADC0_SE11/PTC2/I2C1_SDA/TPM0_CH1, label: 'J4[10]/A4/LCD_P22'} | ||
57 | - {pin_num: '44', pin_signal: LCD_P21/ADC0_SE15/PTC1/LLWU_P6/RTC_CLKIN/I2C1_SCL/TPM0_CH0, label: 'J4[12]/A5/LCD_P21'} | ||
58 | - {pin_num: '5', pin_signal: USB0_DP, label: 'J10[3]/USB_DP', identifier: USB0_DP} | ||
59 | - {pin_num: '6', pin_signal: USB0_DM, label: 'J10[2]/USB_DM', identifier: USB0_DM} | ||
60 | - {pin_num: '22', pin_signal: PTA0/TPM0_CH5/SWD_CLK, label: 'J11[4]/K32L2_SWD_CLK'} | ||
61 | - {pin_num: '25', pin_signal: PTA3/I2C1_SCL/TPM0_CH0/SWD_DIO, label: 'J11[2]/SWD_DIO_TGTMCU'} | ||
62 | - {pin_num: '32', pin_signal: EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0, label: EXTAL_32KHZ, identifier: EXTAL_32KHZ} | ||
63 | - {pin_num: '33', pin_signal: XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1, label: XTAL_32KHZ, identifier: XTAL_32KHZ} | ||
64 | - {pin_num: '34', pin_signal: PTA20/RESET_b, label: 'J11[10]/J3[6]/RESET/SW2'} | ||
65 | - {pin_num: '46', pin_signal: LCD_P23/PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUT, label: SW3/LLWU_P7/LCD_P23, identifier: SW3} | ||
66 | - {pin_num: '58', pin_signal: LCD_P41/ADC0_SE5b/PTD1/SPI0_SCK/TPM0_CH1/FXIO0_D1, label: 'U2[9]/U10[9]/INT2_ACCEL/INT1_MAG/LCD_P41', identifier: INT2_ACCEL;INT1_MAG} | ||
67 | - {pin_num: '21', pin_signal: PTE25/TPM0_CH1/I2C0_SDA, label: 'U2[6]/U10[6]/I2C0_SDA', identifier: I2C0_SDA} | ||
68 | - {pin_num: '20', pin_signal: PTE24/TPM0_CH0/I2C0_SCL, label: 'U2[7]/U10[4]/I2C0_SCL', identifier: I2C0_SCL} | ||
69 | - {pin_num: '3', pin_signal: VDD17, label: P3V3_K32L2B} | ||
70 | - {pin_num: '13', pin_signal: VDDA, label: P3V3_K32L2B} | ||
71 | - {pin_num: '30', pin_signal: VDD94, label: P3V3_K32L2B} | ||
72 | - {pin_num: '4', pin_signal: VSS18, label: GND} | ||
73 | - {pin_num: '16', pin_signal: VSSA, label: GND} | ||
74 | - {pin_num: '31', pin_signal: VSS95, label: GND} | ||
75 | - {pin_num: '47', pin_signal: VSS136, label: GND} | ||
76 | - {pin_num: '7', pin_signal: VOUT33, label: VOUT33} | ||
77 | - {pin_num: '8', pin_signal: VREGIN, label: USB_REGIN, identifier: USB0_VREGIN} | ||
78 | - {pin_num: '15', pin_signal: VREFL, label: GND} | ||
79 | - {pin_num: '14', pin_signal: VREFH, label: 'J19[2]/P3V3_K32L2B'} | ||
80 | - {pin_num: '19', pin_signal: PTE31/TPM0_CH4, label: LED2, identifier: LED2} | ||
81 | - {pin_num: '48', pin_signal: VLL3, label: 'J12[1]/P3V3_K32L2B'} | ||
82 | - {pin_num: '49', pin_signal: VLL2/LCD_P4/PTC20, label: TP12/LCD_P4} | ||
83 | - {pin_num: '50', pin_signal: VLL1/LCD_P5/PTC21, label: TP10/LCD_P5} | ||
84 | - {pin_num: '51', pin_signal: VCAP2/LCD_P6/PTC22, label: LCD_P6} | ||
85 | - {pin_num: '52', pin_signal: VCAP1/LCD_P39/PTC23, label: LCD_P39} | ||
86 | - {pin_num: '57', pin_signal: LCD_P40/PTD0/SPI0_SS/TPM0_CH0/FXIO0_D0, label: LCD-09_P40, identifier: LCD_P40} | ||
87 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
88 | */ | ||
89 | /* clang-format on */ | ||
90 | |||
91 | #include "fsl_common.h" | ||
92 | #include "fsl_port.h" | ||
93 | #include "fsl_gpio.h" | ||
94 | #include "pin_mux.h" | ||
95 | |||
96 | /* FUNCTION ************************************************************************************************************ | ||
97 | * | ||
98 | * Function Name : BOARD_InitBootPins | ||
99 | * Description : Calls initialization functions. | ||
100 | * | ||
101 | * END ****************************************************************************************************************/ | ||
102 | void BOARD_InitBootPins(void) | ||
103 | { | ||
104 | BOARD_InitPins(); | ||
105 | BOARD_InitDEBUG_UARTPins(); | ||
106 | } | ||
107 | |||
108 | /* clang-format off */ | ||
109 | /* | ||
110 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
111 | BOARD_InitPins: | ||
112 | - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
113 | - pin_list: [] | ||
114 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
115 | */ | ||
116 | /* clang-format on */ | ||
117 | |||
118 | /* FUNCTION ************************************************************************************************************ | ||
119 | * | ||
120 | * Function Name : BOARD_InitPins | ||
121 | * Description : Configures pin routing and optionally pin electrical features. | ||
122 | * | ||
123 | * END ****************************************************************************************************************/ | ||
124 | void BOARD_InitPins(void) | ||
125 | { | ||
126 | } | ||
127 | |||
128 | /* clang-format off */ | ||
129 | /* | ||
130 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
131 | BOARD_InitLCDPins: | ||
132 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
133 | - pin_list: | ||
134 | - {pin_num: '41', peripheral: LCD, signal: 'P, 14', pin_signal: LCD_P14/PTB18/TPM2_CH0, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
135 | - {pin_num: '42', peripheral: LCD, signal: 'P, 15', pin_signal: LCD_P15/PTB19/TPM2_CH1, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
136 | - {pin_num: '43', peripheral: LCD, signal: 'P, 20', pin_signal: LCD_P20/ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUT, identifier: LCD_P20, slew_rate: slow, pull_select: up, | ||
137 | pull_enable: disable} | ||
138 | - {pin_num: '53', peripheral: LCD, signal: 'P, 24', pin_signal: LCD_P24/PTC4/LLWU_P8/SPI0_SS/LPUART1_TX/TPM0_CH3, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
139 | - {pin_num: '55', peripheral: LCD, signal: 'P, 26', pin_signal: LCD_P26/CMP0_IN0/PTC6/LLWU_P10/SPI0_MOSI/EXTRG_IN/SPI0_MISO, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
140 | - {pin_num: '56', peripheral: LCD, signal: 'P, 27', pin_signal: LCD_P27/CMP0_IN1/PTC7/SPI0_MISO/USB_SOF_OUT/SPI0_MOSI, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
141 | - {pin_num: '57', peripheral: LCD, signal: 'P, 40', pin_signal: LCD_P40/PTD0/SPI0_SS/TPM0_CH0/FXIO0_D0, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
142 | - {pin_num: '59', peripheral: LCD, signal: 'P, 42', pin_signal: LCD_P42/PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO/FXIO0_D2, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
143 | - {pin_num: '60', peripheral: LCD, signal: 'P, 43', pin_signal: LCD_P43/PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI/FXIO0_D3, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
144 | - {pin_num: '61', peripheral: LCD, signal: 'P, 44', pin_signal: LCD_P44/PTD4/LLWU_P14/SPI1_SS/UART2_RX/TPM0_CH4/FXIO0_D4, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
145 | - {pin_num: '9', peripheral: LCD, signal: 'P, 59', pin_signal: LCD_P59/ADC0_DP0/ADC0_SE0/PTE20/TPM1_CH0/LPUART0_TX/FXIO0_D4, slew_rate: slow, pull_select: up, pull_enable: disable} | ||
146 | - {pin_num: '10', peripheral: LCD, signal: 'P, 60', pin_signal: LCD_P60/ADC0_DM0/ADC0_SE4a/PTE21/TPM1_CH1/LPUART0_RX/FXIO0_D5, slew_rate: slow, pull_select: up, | ||
147 | pull_enable: disable} | ||
148 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
149 | */ | ||
150 | /* clang-format on */ | ||
151 | |||
152 | /* FUNCTION ************************************************************************************************************ | ||
153 | * | ||
154 | * Function Name : BOARD_InitLCDPins | ||
155 | * Description : Configures pin routing and optionally pin electrical features. | ||
156 | * | ||
157 | * END ****************************************************************************************************************/ | ||
158 | void BOARD_InitLCDPins(void) | ||
159 | { | ||
160 | /* Port B Clock Gate Control: Clock enabled */ | ||
161 | CLOCK_EnableClock(kCLOCK_PortB); | ||
162 | /* Port C Clock Gate Control: Clock enabled */ | ||
163 | CLOCK_EnableClock(kCLOCK_PortC); | ||
164 | /* Port D Clock Gate Control: Clock enabled */ | ||
165 | CLOCK_EnableClock(kCLOCK_PortD); | ||
166 | /* Port E Clock Gate Control: Clock enabled */ | ||
167 | CLOCK_EnableClock(kCLOCK_PortE); | ||
168 | |||
169 | /* PORTB18 (pin 41) is configured as LCD_P14 */ | ||
170 | PORT_SetPinMux(BOARD_LCD_P14_PORT, BOARD_LCD_P14_PIN, kPORT_PinDisabledOrAnalog); | ||
171 | |||
172 | PORTB->PCR[18] = ((PORTB->PCR[18] & | ||
173 | /* Mask bits to zero which are setting */ | ||
174 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
175 | |||
176 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
177 | * corresponding PE field is set. */ | ||
178 | | PORT_PCR_PS(kPORT_PullUp) | ||
179 | |||
180 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
181 | * pin. */ | ||
182 | | PORT_PCR_PE(kPORT_PullDisable) | ||
183 | |||
184 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
185 | * configured as a digital output. */ | ||
186 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
187 | |||
188 | /* PORTB19 (pin 42) is configured as LCD_P15 */ | ||
189 | PORT_SetPinMux(BOARD_LCD_P15_PORT, BOARD_LCD_P15_PIN, kPORT_PinDisabledOrAnalog); | ||
190 | |||
191 | PORTB->PCR[19] = ((PORTB->PCR[19] & | ||
192 | /* Mask bits to zero which are setting */ | ||
193 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
194 | |||
195 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
196 | * corresponding PE field is set. */ | ||
197 | | PORT_PCR_PS(kPORT_PullUp) | ||
198 | |||
199 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
200 | * pin. */ | ||
201 | | PORT_PCR_PE(kPORT_PullDisable) | ||
202 | |||
203 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
204 | * configured as a digital output. */ | ||
205 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
206 | |||
207 | /* PORTC0 (pin 43) is configured as LCD_P20 */ | ||
208 | PORT_SetPinMux(BOARD_LCD_P20_PORT, BOARD_LCD_P20_PIN, kPORT_PinDisabledOrAnalog); | ||
209 | |||
210 | PORTC->PCR[0] = ((PORTC->PCR[0] & | ||
211 | /* Mask bits to zero which are setting */ | ||
212 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
213 | |||
214 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
215 | * corresponding PE field is set. */ | ||
216 | | PORT_PCR_PS(kPORT_PullUp) | ||
217 | |||
218 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
219 | | PORT_PCR_PE(kPORT_PullDisable) | ||
220 | |||
221 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
222 | * configured as a digital output. */ | ||
223 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
224 | |||
225 | /* PORTC4 (pin 53) is configured as LCD_P24 */ | ||
226 | PORT_SetPinMux(BOARD_LCD_P24_PORT, BOARD_LCD_P24_PIN, kPORT_PinDisabledOrAnalog); | ||
227 | |||
228 | PORTC->PCR[4] = ((PORTC->PCR[4] & | ||
229 | /* Mask bits to zero which are setting */ | ||
230 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
231 | |||
232 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
233 | * corresponding PE field is set. */ | ||
234 | | PORT_PCR_PS(kPORT_PullUp) | ||
235 | |||
236 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
237 | | PORT_PCR_PE(kPORT_PullDisable) | ||
238 | |||
239 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
240 | * configured as a digital output. */ | ||
241 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
242 | |||
243 | /* PORTC6 (pin 55) is configured as LCD_P26 */ | ||
244 | PORT_SetPinMux(BOARD_LCD_P26_PORT, BOARD_LCD_P26_PIN, kPORT_PinDisabledOrAnalog); | ||
245 | |||
246 | PORTC->PCR[6] = ((PORTC->PCR[6] & | ||
247 | /* Mask bits to zero which are setting */ | ||
248 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
249 | |||
250 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
251 | * corresponding PE field is set. */ | ||
252 | | PORT_PCR_PS(kPORT_PullUp) | ||
253 | |||
254 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
255 | | PORT_PCR_PE(kPORT_PullDisable) | ||
256 | |||
257 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
258 | * configured as a digital output. */ | ||
259 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
260 | |||
261 | /* PORTC7 (pin 56) is configured as LCD_P27 */ | ||
262 | PORT_SetPinMux(BOARD_LCD_P27_PORT, BOARD_LCD_P27_PIN, kPORT_PinDisabledOrAnalog); | ||
263 | |||
264 | PORTC->PCR[7] = ((PORTC->PCR[7] & | ||
265 | /* Mask bits to zero which are setting */ | ||
266 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
267 | |||
268 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
269 | * corresponding PE field is set. */ | ||
270 | | PORT_PCR_PS(kPORT_PullUp) | ||
271 | |||
272 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
273 | | PORT_PCR_PE(kPORT_PullDisable) | ||
274 | |||
275 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
276 | * configured as a digital output. */ | ||
277 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
278 | |||
279 | /* PORTD0 (pin 57) is configured as LCD_P40 */ | ||
280 | PORT_SetPinMux(BOARD_LCD_P40_PORT, BOARD_LCD_P40_PIN, kPORT_PinDisabledOrAnalog); | ||
281 | |||
282 | PORTD->PCR[0] = ((PORTD->PCR[0] & | ||
283 | /* Mask bits to zero which are setting */ | ||
284 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
285 | |||
286 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
287 | * corresponding PE field is set. */ | ||
288 | | PORT_PCR_PS(kPORT_PullUp) | ||
289 | |||
290 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
291 | | PORT_PCR_PE(kPORT_PullDisable) | ||
292 | |||
293 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
294 | * configured as a digital output. */ | ||
295 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
296 | |||
297 | /* PORTD2 (pin 59) is configured as LCD_P42 */ | ||
298 | PORT_SetPinMux(BOARD_LCD_P42_PORT, BOARD_LCD_P42_PIN, kPORT_PinDisabledOrAnalog); | ||
299 | |||
300 | PORTD->PCR[2] = ((PORTD->PCR[2] & | ||
301 | /* Mask bits to zero which are setting */ | ||
302 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
303 | |||
304 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
305 | * corresponding PE field is set. */ | ||
306 | | PORT_PCR_PS(kPORT_PullUp) | ||
307 | |||
308 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
309 | | PORT_PCR_PE(kPORT_PullDisable) | ||
310 | |||
311 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
312 | * configured as a digital output. */ | ||
313 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
314 | |||
315 | /* PORTD3 (pin 60) is configured as LCD_P43 */ | ||
316 | PORT_SetPinMux(BOARD_LCD_P43_PORT, BOARD_LCD_P43_PIN, kPORT_PinDisabledOrAnalog); | ||
317 | |||
318 | PORTD->PCR[3] = ((PORTD->PCR[3] & | ||
319 | /* Mask bits to zero which are setting */ | ||
320 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
321 | |||
322 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
323 | * corresponding PE field is set. */ | ||
324 | | PORT_PCR_PS(kPORT_PullUp) | ||
325 | |||
326 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
327 | | PORT_PCR_PE(kPORT_PullDisable) | ||
328 | |||
329 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
330 | * configured as a digital output. */ | ||
331 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
332 | |||
333 | /* PORTD4 (pin 61) is configured as LCD_P44 */ | ||
334 | PORT_SetPinMux(BOARD_LCD_P44_PORT, BOARD_LCD_P44_PIN, kPORT_PinDisabledOrAnalog); | ||
335 | |||
336 | PORTD->PCR[4] = ((PORTD->PCR[4] & | ||
337 | /* Mask bits to zero which are setting */ | ||
338 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
339 | |||
340 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
341 | * corresponding PE field is set. */ | ||
342 | | PORT_PCR_PS(kPORT_PullUp) | ||
343 | |||
344 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
345 | | PORT_PCR_PE(kPORT_PullDisable) | ||
346 | |||
347 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
348 | * configured as a digital output. */ | ||
349 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
350 | |||
351 | /* PORTE20 (pin 9) is configured as LCD_P59 */ | ||
352 | PORT_SetPinMux(BOARD_LCD_P59_PORT, BOARD_LCD_P59_PIN, kPORT_PinDisabledOrAnalog); | ||
353 | |||
354 | PORTE->PCR[20] = ((PORTE->PCR[20] & | ||
355 | /* Mask bits to zero which are setting */ | ||
356 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
357 | |||
358 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
359 | * corresponding PE field is set. */ | ||
360 | | PORT_PCR_PS(kPORT_PullUp) | ||
361 | |||
362 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
363 | * pin. */ | ||
364 | | PORT_PCR_PE(kPORT_PullDisable) | ||
365 | |||
366 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
367 | * configured as a digital output. */ | ||
368 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
369 | |||
370 | /* PORTE21 (pin 10) is configured as LCD_P60 */ | ||
371 | PORT_SetPinMux(BOARD_LCD_P60_PORT, BOARD_LCD_P60_PIN, kPORT_PinDisabledOrAnalog); | ||
372 | |||
373 | PORTE->PCR[21] = ((PORTE->PCR[21] & | ||
374 | /* Mask bits to zero which are setting */ | ||
375 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
376 | |||
377 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
378 | * corresponding PE field is set. */ | ||
379 | | PORT_PCR_PS(kPORT_PullUp) | ||
380 | |||
381 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding | ||
382 | * pin. */ | ||
383 | | PORT_PCR_PE(kPORT_PullDisable) | ||
384 | |||
385 | /* Slew Rate Enable: Slow slew rate is configured on the corresponding pin, if the pin is | ||
386 | * configured as a digital output. */ | ||
387 | | PORT_PCR_SRE(kPORT_SlowSlewRate)); | ||
388 | } | ||
389 | |||
390 | /* clang-format off */ | ||
391 | /* | ||
392 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
393 | BOARD_InitBUTTONSPins: | ||
394 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
395 | - pin_list: | ||
396 | - {pin_num: '26', peripheral: GPIOA, signal: 'GPIO, 4', pin_signal: PTA4/I2C1_SDA/TPM0_CH1/NMI_b, direction: INPUT, slew_rate: fast, pull_select: up, pull_enable: enable, | ||
397 | passive_filter: disable} | ||
398 | - {pin_num: '46', peripheral: GPIOC, signal: 'GPIO, 3', pin_signal: LCD_P23/PTC3/LLWU_P7/SPI1_SCK/LPUART1_RX/TPM0_CH2/CLKOUT, direction: INPUT, slew_rate: fast, | ||
399 | pull_select: up, pull_enable: enable} | ||
400 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
401 | */ | ||
402 | /* clang-format on */ | ||
403 | |||
404 | /* FUNCTION ************************************************************************************************************ | ||
405 | * | ||
406 | * Function Name : BOARD_InitBUTTONSPins | ||
407 | * Description : Configures pin routing and optionally pin electrical features. | ||
408 | * | ||
409 | * END ****************************************************************************************************************/ | ||
410 | void BOARD_InitBUTTONSPins(void) | ||
411 | { | ||
412 | /* Port A Clock Gate Control: Clock enabled */ | ||
413 | CLOCK_EnableClock(kCLOCK_PortA); | ||
414 | /* Port C Clock Gate Control: Clock enabled */ | ||
415 | CLOCK_EnableClock(kCLOCK_PortC); | ||
416 | |||
417 | gpio_pin_config_t SW1_config = { | ||
418 | .pinDirection = kGPIO_DigitalInput, | ||
419 | .outputLogic = 0U | ||
420 | }; | ||
421 | /* Initialize GPIO functionality on pin PTA4 (pin 26) */ | ||
422 | GPIO_PinInit(BOARD_SW1_GPIO, BOARD_SW1_PIN, &SW1_config); | ||
423 | |||
424 | gpio_pin_config_t SW3_config = { | ||
425 | .pinDirection = kGPIO_DigitalInput, | ||
426 | .outputLogic = 0U | ||
427 | }; | ||
428 | /* Initialize GPIO functionality on pin PTC3 (pin 46) */ | ||
429 | GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config); | ||
430 | |||
431 | const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */ | ||
432 | kPORT_PullUp, | ||
433 | /* Fast slew rate is configured */ | ||
434 | kPORT_FastSlewRate, | ||
435 | /* Passive filter is disabled */ | ||
436 | kPORT_PassiveFilterDisable, | ||
437 | /* Low drive strength is configured */ | ||
438 | kPORT_LowDriveStrength, | ||
439 | /* Pin is configured as PTA4 */ | ||
440 | kPORT_MuxAsGpio}; | ||
441 | /* PORTA4 (pin 26) is configured as PTA4 */ | ||
442 | PORT_SetPinConfig(BOARD_SW1_PORT, BOARD_SW1_PIN, &SW1); | ||
443 | |||
444 | const port_pin_config_t SW3 = {/* Internal pull-up resistor is enabled */ | ||
445 | kPORT_PullUp, | ||
446 | /* Fast slew rate is configured */ | ||
447 | kPORT_FastSlewRate, | ||
448 | /* Passive filter is disabled */ | ||
449 | kPORT_PassiveFilterDisable, | ||
450 | /* Low drive strength is configured */ | ||
451 | kPORT_LowDriveStrength, | ||
452 | /* Pin is configured as PTC3 */ | ||
453 | kPORT_MuxAsGpio}; | ||
454 | /* PORTC3 (pin 46) is configured as PTC3 */ | ||
455 | PORT_SetPinConfig(BOARD_SW3_PORT, BOARD_SW3_PIN, &SW3); | ||
456 | } | ||
457 | |||
458 | /* clang-format off */ | ||
459 | /* | ||
460 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
461 | BOARD_InitLEDsPins: | ||
462 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
463 | - pin_list: | ||
464 | - {pin_num: '19', peripheral: GPIOE, signal: 'GPIO, 31', pin_signal: PTE31/TPM0_CH4, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, pull_select: down, | ||
465 | pull_enable: disable} | ||
466 | - {pin_num: '62', peripheral: GPIOD, signal: 'GPIO, 5', pin_signal: LCD_P45/ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5/FXIO0_D5, direction: OUTPUT, gpio_init_state: 'true', | ||
467 | slew_rate: slow, pull_select: down, pull_enable: disable} | ||
468 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
469 | */ | ||
470 | /* clang-format on */ | ||
471 | |||
472 | /* FUNCTION ************************************************************************************************************ | ||
473 | * | ||
474 | * Function Name : BOARD_InitLEDsPins | ||
475 | * Description : Configures pin routing and optionally pin electrical features. | ||
476 | * | ||
477 | * END ****************************************************************************************************************/ | ||
478 | void BOARD_InitLEDsPins(void) | ||
479 | { | ||
480 | /* Port D Clock Gate Control: Clock enabled */ | ||
481 | CLOCK_EnableClock(kCLOCK_PortD); | ||
482 | /* Port E Clock Gate Control: Clock enabled */ | ||
483 | CLOCK_EnableClock(kCLOCK_PortE); | ||
484 | |||
485 | gpio_pin_config_t LED1_config = { | ||
486 | .pinDirection = kGPIO_DigitalOutput, | ||
487 | .outputLogic = 1U | ||
488 | }; | ||
489 | /* Initialize GPIO functionality on pin PTD5 (pin 62) */ | ||
490 | GPIO_PinInit(BOARD_LED1_GPIO, BOARD_LED1_PIN, &LED1_config); | ||
491 | |||
492 | gpio_pin_config_t LED2_config = { | ||
493 | .pinDirection = kGPIO_DigitalOutput, | ||
494 | .outputLogic = 1U | ||
495 | }; | ||
496 | /* Initialize GPIO functionality on pin PTE31 (pin 19) */ | ||
497 | GPIO_PinInit(BOARD_LED2_GPIO, BOARD_LED2_PIN, &LED2_config); | ||
498 | |||
499 | const port_pin_config_t LED1 = {/* Internal pull-up/down resistor is disabled */ | ||
500 | kPORT_PullDisable, | ||
501 | /* Slow slew rate is configured */ | ||
502 | kPORT_SlowSlewRate, | ||
503 | /* Passive filter is disabled */ | ||
504 | kPORT_PassiveFilterDisable, | ||
505 | /* Low drive strength is configured */ | ||
506 | kPORT_LowDriveStrength, | ||
507 | /* Pin is configured as PTD5 */ | ||
508 | kPORT_MuxAsGpio}; | ||
509 | /* PORTD5 (pin 62) is configured as PTD5 */ | ||
510 | PORT_SetPinConfig(BOARD_LED1_PORT, BOARD_LED1_PIN, &LED1); | ||
511 | |||
512 | const port_pin_config_t LED2 = {/* Internal pull-up/down resistor is disabled */ | ||
513 | kPORT_PullDisable, | ||
514 | /* Slow slew rate is configured */ | ||
515 | kPORT_SlowSlewRate, | ||
516 | /* Passive filter is disabled */ | ||
517 | kPORT_PassiveFilterDisable, | ||
518 | /* Low drive strength is configured */ | ||
519 | kPORT_LowDriveStrength, | ||
520 | /* Pin is configured as PTE31 */ | ||
521 | kPORT_MuxAsGpio}; | ||
522 | /* PORTE31 (pin 19) is configured as PTE31 */ | ||
523 | PORT_SetPinConfig(BOARD_LED2_PORT, BOARD_LED2_PIN, &LED2); | ||
524 | } | ||
525 | |||
526 | /* clang-format off */ | ||
527 | /* | ||
528 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
529 | BOARD_InitDEBUG_UARTPins: | ||
530 | - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
531 | - pin_list: | ||
532 | - {pin_num: '23', peripheral: LPUART0, signal: RX, pin_signal: PTA1/LPUART0_RX/TPM2_CH0, slew_rate: fast, pull_select: down, pull_enable: disable} | ||
533 | - {pin_num: '24', peripheral: LPUART0, signal: TX, pin_signal: PTA2/LPUART0_TX/TPM2_CH1, direction: OUTPUT, slew_rate: fast, pull_select: down, pull_enable: disable} | ||
534 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
535 | */ | ||
536 | /* clang-format on */ | ||
537 | |||
538 | /* FUNCTION ************************************************************************************************************ | ||
539 | * | ||
540 | * Function Name : BOARD_InitDEBUG_UARTPins | ||
541 | * Description : Configures pin routing and optionally pin electrical features. | ||
542 | * | ||
543 | * END ****************************************************************************************************************/ | ||
544 | void BOARD_InitDEBUG_UARTPins(void) | ||
545 | { | ||
546 | /* Port A Clock Gate Control: Clock enabled */ | ||
547 | CLOCK_EnableClock(kCLOCK_PortA); | ||
548 | |||
549 | const port_pin_config_t DEBUG_UART0_RX = {/* Internal pull-up/down resistor is disabled */ | ||
550 | kPORT_PullDisable, | ||
551 | /* Fast slew rate is configured */ | ||
552 | kPORT_FastSlewRate, | ||
553 | /* Passive filter is disabled */ | ||
554 | kPORT_PassiveFilterDisable, | ||
555 | /* Low drive strength is configured */ | ||
556 | kPORT_LowDriveStrength, | ||
557 | /* Pin is configured as LPUART0_RX */ | ||
558 | kPORT_MuxAlt2}; | ||
559 | /* PORTA1 (pin 23) is configured as LPUART0_RX */ | ||
560 | PORT_SetPinConfig(BOARD_DEBUG_UART0_RX_PORT, BOARD_DEBUG_UART0_RX_PIN, &DEBUG_UART0_RX); | ||
561 | |||
562 | const port_pin_config_t DEBUG_UART0_TX = {/* Internal pull-up/down resistor is disabled */ | ||
563 | kPORT_PullDisable, | ||
564 | /* Fast slew rate is configured */ | ||
565 | kPORT_FastSlewRate, | ||
566 | /* Passive filter is disabled */ | ||
567 | kPORT_PassiveFilterDisable, | ||
568 | /* Low drive strength is configured */ | ||
569 | kPORT_LowDriveStrength, | ||
570 | /* Pin is configured as LPUART0_TX */ | ||
571 | kPORT_MuxAlt2}; | ||
572 | /* PORTA2 (pin 24) is configured as LPUART0_TX */ | ||
573 | PORT_SetPinConfig(BOARD_DEBUG_UART0_TX_PORT, BOARD_DEBUG_UART0_TX_PIN, &DEBUG_UART0_TX); | ||
574 | |||
575 | SIM->SOPT5 = ((SIM->SOPT5 & | ||
576 | /* Mask bits to zero which are setting */ | ||
577 | (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK))) | ||
578 | |||
579 | /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */ | ||
580 | | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX) | ||
581 | |||
582 | /* LPUART0 Receive Data Source Select: LPUART_RX pin. */ | ||
583 | | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX)); | ||
584 | } | ||
585 | |||
586 | /* clang-format off */ | ||
587 | /* | ||
588 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
589 | BOARD_InitUSBPins: | ||
590 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
591 | - pin_list: | ||
592 | - {pin_num: '5', peripheral: USB0, signal: DP, pin_signal: USB0_DP} | ||
593 | - {pin_num: '6', peripheral: USB0, signal: DM, pin_signal: USB0_DM} | ||
594 | - {pin_num: '8', peripheral: USB0, signal: VREGIN, pin_signal: VREGIN} | ||
595 | - {pin_num: '43', peripheral: USB0, signal: SOF_OUT, pin_signal: LCD_P20/ADC0_SE14/PTC0/EXTRG_IN/USB_SOF_OUT/CMP0_OUT, identifier: USB_SOF_OUT, slew_rate: fast, | ||
596 | pull_select: up, pull_enable: disable} | ||
597 | - {pin_num: '27', peripheral: USB0, signal: CLKIN, pin_signal: PTA5/USB_CLKIN/TPM0_CH2, slew_rate: fast, pull_select: up, pull_enable: disable} | ||
598 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
599 | */ | ||
600 | /* clang-format on */ | ||
601 | |||
602 | /* FUNCTION ************************************************************************************************************ | ||
603 | * | ||
604 | * Function Name : BOARD_InitUSBPins | ||
605 | * Description : Configures pin routing and optionally pin electrical features. | ||
606 | * | ||
607 | * END ****************************************************************************************************************/ | ||
608 | void BOARD_InitUSBPins(void) | ||
609 | { | ||
610 | /* Port A Clock Gate Control: Clock enabled */ | ||
611 | CLOCK_EnableClock(kCLOCK_PortA); | ||
612 | /* Port C Clock Gate Control: Clock enabled */ | ||
613 | CLOCK_EnableClock(kCLOCK_PortC); | ||
614 | |||
615 | /* PORTA5 (pin 27) is configured as USB_CLKIN */ | ||
616 | PORT_SetPinMux(BOARD_USB0_CLKIN_PORT, BOARD_USB0_CLKIN_PIN, kPORT_MuxAlt2); | ||
617 | |||
618 | PORTA->PCR[5] = ((PORTA->PCR[5] & | ||
619 | /* Mask bits to zero which are setting */ | ||
620 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
621 | |||
622 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
623 | * corresponding PE field is set. */ | ||
624 | | PORT_PCR_PS(kPORT_PullUp) | ||
625 | |||
626 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
627 | | PORT_PCR_PE(kPORT_PullDisable) | ||
628 | |||
629 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
630 | * configured as a digital output. */ | ||
631 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
632 | |||
633 | /* PORTC0 (pin 43) is configured as USB_SOF_OUT */ | ||
634 | PORT_SetPinMux(BOARD_USB_SOF_OUT_PORT, BOARD_USB_SOF_OUT_PIN, kPORT_MuxAlt4); | ||
635 | |||
636 | PORTC->PCR[0] = ((PORTC->PCR[0] & | ||
637 | /* Mask bits to zero which are setting */ | ||
638 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
639 | |||
640 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
641 | * corresponding PE field is set. */ | ||
642 | | PORT_PCR_PS(kPORT_PullUp) | ||
643 | |||
644 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
645 | | PORT_PCR_PE(kPORT_PullDisable) | ||
646 | |||
647 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
648 | * configured as a digital output. */ | ||
649 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
650 | } | ||
651 | |||
652 | /* clang-format off */ | ||
653 | /* | ||
654 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
655 | BOARD_InitACCEL_I2CPins: | ||
656 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
657 | - pin_list: | ||
658 | - {pin_num: '20', peripheral: I2C0, signal: SCL, pin_signal: PTE24/TPM0_CH0/I2C0_SCL, slew_rate: fast, pull_select: up, pull_enable: enable} | ||
659 | - {pin_num: '21', peripheral: I2C0, signal: SDA, pin_signal: PTE25/TPM0_CH1/I2C0_SDA, slew_rate: fast, pull_select: up, pull_enable: enable} | ||
660 | - {pin_num: '58', peripheral: GPIOD, signal: 'GPIO, 1', pin_signal: LCD_P41/ADC0_SE5b/PTD1/SPI0_SCK/TPM0_CH1/FXIO0_D1, identifier: INT2_ACCEL, direction: INPUT, | ||
661 | slew_rate: fast, pull_select: up, pull_enable: disable} | ||
662 | - {pin_num: '54', peripheral: GPIOC, signal: 'GPIO, 5', pin_signal: LCD_P25/PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT, direction: INPUT, slew_rate: fast, pull_select: up, | ||
663 | pull_enable: disable} | ||
664 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
665 | */ | ||
666 | /* clang-format on */ | ||
667 | |||
668 | /* FUNCTION ************************************************************************************************************ | ||
669 | * | ||
670 | * Function Name : BOARD_InitACCEL_I2CPins | ||
671 | * Description : Configures pin routing and optionally pin electrical features. | ||
672 | * | ||
673 | * END ****************************************************************************************************************/ | ||
674 | void BOARD_InitACCEL_I2CPins(void) | ||
675 | { | ||
676 | /* Port C Clock Gate Control: Clock enabled */ | ||
677 | CLOCK_EnableClock(kCLOCK_PortC); | ||
678 | /* Port D Clock Gate Control: Clock enabled */ | ||
679 | CLOCK_EnableClock(kCLOCK_PortD); | ||
680 | /* Port E Clock Gate Control: Clock enabled */ | ||
681 | CLOCK_EnableClock(kCLOCK_PortE); | ||
682 | |||
683 | gpio_pin_config_t INT1_ACCEL_config = { | ||
684 | .pinDirection = kGPIO_DigitalInput, | ||
685 | .outputLogic = 0U | ||
686 | }; | ||
687 | /* Initialize GPIO functionality on pin PTC5 (pin 54) */ | ||
688 | GPIO_PinInit(BOARD_INT1_ACCEL_GPIO, BOARD_INT1_ACCEL_PIN, &INT1_ACCEL_config); | ||
689 | |||
690 | gpio_pin_config_t INT2_ACCEL_config = { | ||
691 | .pinDirection = kGPIO_DigitalInput, | ||
692 | .outputLogic = 0U | ||
693 | }; | ||
694 | /* Initialize GPIO functionality on pin PTD1 (pin 58) */ | ||
695 | GPIO_PinInit(BOARD_INT2_ACCEL_GPIO, BOARD_INT2_ACCEL_PIN, &INT2_ACCEL_config); | ||
696 | |||
697 | /* PORTC5 (pin 54) is configured as PTC5 */ | ||
698 | PORT_SetPinMux(BOARD_INT1_ACCEL_PORT, BOARD_INT1_ACCEL_PIN, kPORT_MuxAsGpio); | ||
699 | |||
700 | PORTC->PCR[5] = ((PORTC->PCR[5] & | ||
701 | /* Mask bits to zero which are setting */ | ||
702 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
703 | |||
704 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
705 | * corresponding PE field is set. */ | ||
706 | | PORT_PCR_PS(kPORT_PullUp) | ||
707 | |||
708 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
709 | | PORT_PCR_PE(kPORT_PullDisable) | ||
710 | |||
711 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
712 | * configured as a digital output. */ | ||
713 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
714 | |||
715 | /* PORTD1 (pin 58) is configured as PTD1 */ | ||
716 | PORT_SetPinMux(BOARD_INT2_ACCEL_PORT, BOARD_INT2_ACCEL_PIN, kPORT_MuxAsGpio); | ||
717 | |||
718 | PORTD->PCR[1] = ((PORTD->PCR[1] & | ||
719 | /* Mask bits to zero which are setting */ | ||
720 | (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ISF_MASK))) | ||
721 | |||
722 | /* Pull Select: Internal pullup resistor is enabled on the corresponding pin, if the | ||
723 | * corresponding PE field is set. */ | ||
724 | | PORT_PCR_PS(kPORT_PullUp) | ||
725 | |||
726 | /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | ||
727 | | PORT_PCR_PE(kPORT_PullDisable) | ||
728 | |||
729 | /* Slew Rate Enable: Fast slew rate is configured on the corresponding pin, if the pin is | ||
730 | * configured as a digital output. */ | ||
731 | | PORT_PCR_SRE(kPORT_FastSlewRate)); | ||
732 | |||
733 | const port_pin_config_t I2C0_SCL = {/* Internal pull-up resistor is enabled */ | ||
734 | kPORT_PullUp, | ||
735 | /* Fast slew rate is configured */ | ||
736 | kPORT_FastSlewRate, | ||
737 | /* Passive filter is disabled */ | ||
738 | kPORT_PassiveFilterDisable, | ||
739 | /* Low drive strength is configured */ | ||
740 | kPORT_LowDriveStrength, | ||
741 | /* Pin is configured as I2C0_SCL */ | ||
742 | kPORT_MuxAlt5}; | ||
743 | /* PORTE24 (pin 20) is configured as I2C0_SCL */ | ||
744 | PORT_SetPinConfig(BOARD_I2C0_SCL_PORT, BOARD_I2C0_SCL_PIN, &I2C0_SCL); | ||
745 | |||
746 | const port_pin_config_t I2C0_SDA = {/* Internal pull-up resistor is enabled */ | ||
747 | kPORT_PullUp, | ||
748 | /* Fast slew rate is configured */ | ||
749 | kPORT_FastSlewRate, | ||
750 | /* Passive filter is disabled */ | ||
751 | kPORT_PassiveFilterDisable, | ||
752 | /* Low drive strength is configured */ | ||
753 | kPORT_LowDriveStrength, | ||
754 | /* Pin is configured as I2C0_SDA */ | ||
755 | kPORT_MuxAlt5}; | ||
756 | /* PORTE25 (pin 21) is configured as I2C0_SDA */ | ||
757 | PORT_SetPinConfig(BOARD_I2C0_SDA_PORT, BOARD_I2C0_SDA_PIN, &I2C0_SDA); | ||
758 | } | ||
759 | |||
760 | /* clang-format off */ | ||
761 | /* | ||
762 | * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | ||
763 | BOARD_InitOSCPins: | ||
764 | - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} | ||
765 | - pin_list: | ||
766 | - {pin_num: '32', peripheral: OSC0, signal: EXTAL0, pin_signal: EXTAL0/PTA18/LPUART1_RX/TPM_CLKIN0, slew_rate: no_init, pull_select: no_init, pull_enable: no_init} | ||
767 | - {pin_num: '33', peripheral: OSC0, signal: XTAL0, pin_signal: XTAL0/PTA19/LPUART1_TX/TPM_CLKIN1/LPTMR0_ALT1, slew_rate: no_init, pull_select: no_init, pull_enable: no_init} | ||
768 | * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | ||
769 | */ | ||
770 | /* clang-format on */ | ||
771 | |||
772 | /* FUNCTION ************************************************************************************************************ | ||
773 | * | ||
774 | * Function Name : BOARD_InitOSCPins | ||
775 | * Description : Configures pin routing and optionally pin electrical features. | ||
776 | * | ||
777 | * END ****************************************************************************************************************/ | ||
778 | void BOARD_InitOSCPins(void) | ||
779 | { | ||
780 | /* Port A Clock Gate Control: Clock enabled */ | ||
781 | CLOCK_EnableClock(kCLOCK_PortA); | ||
782 | |||
783 | /* PORTA18 (pin 32) is configured as EXTAL0 */ | ||
784 | PORT_SetPinMux(BOARD_EXTAL_32KHZ_PORT, BOARD_EXTAL_32KHZ_PIN, kPORT_PinDisabledOrAnalog); | ||
785 | |||
786 | /* PORTA19 (pin 33) is configured as XTAL0 */ | ||
787 | PORT_SetPinMux(BOARD_XTAL_32KHZ_PORT, BOARD_XTAL_32KHZ_PIN, kPORT_PinDisabledOrAnalog); | ||
788 | } | ||
789 | /*********************************************************************************************************************** | ||
790 | * EOF | ||
791 | **********************************************************************************************************************/ | ||