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-rw-r--r--lib/chibios-contrib/ext/mcux-sdk/devices/MIMX8MN6/drivers/fsl_memory.h146
1 files changed, 146 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MIMX8MN6/drivers/fsl_memory.h b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMX8MN6/drivers/fsl_memory.h
new file mode 100644
index 000000000..53db17c39
--- /dev/null
+++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MIMX8MN6/drivers/fsl_memory.h
@@ -0,0 +1,146 @@
1/*
2 * Copyright 2018 NXP
3 * All rights reserved.
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _FSL_MEMORY_H_
9#define _FSL_MEMORY_H_
10
11#include "fsl_common.h"
12
13/*******************************************************************************
14 * Definitions
15 ******************************************************************************/
16/* Component ID definition, used by tools. */
17#ifndef FSL_COMPONENT_ID
18#define FSL_COMPONENT_ID "platform.drivers.memory"
19#endif
20
21/*! @name Driver version */
22/*@{*/
23/*! @brief IMEMORY driver version 2.0.0. */
24#define FSL_MEMORY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
25/*@}*/
26
27/* The CM7 subsystem local ITCM start address, refer to Reference Manual for detailed information */
28#define FSL_MEM_M7_ITCM_BEGIN 0x00000000U
29/* The CM7 subsystem local ITCM end address, refer to Reference Manual for detailed information */
30#define FSL_MEM_M7_ITCM_END 0x0001FFFFU
31
32/* The CM7 subsystem local DTCM start address, refer to Reference Manual for detailed information */
33#define FSL_MEM_M7_DTCM_BEGIN 0x20000000U
34/* The CM7 subsystem local DTCM end address, refer to Reference Manual for detailed information */
35#define FSL_MEM_M7_DTCM_END 0x2001FFFFU
36
37/* The CM7 subsystem local OCRAM start address, refer to Reference Manual for detailed information */
38#define FSL_MEM_M7_OCRAM_BEGIN 0x20200000U
39/* The CM7 subsystem local OCRAM end address, refer to Reference Manual for detailed information */
40#define FSL_MEM_M7_OCRAM_END 0x2021FFFFU
41
42/* The CM7 subsystem local OCRAMS start address, refer to Reference Manual for detailed information */
43#define FSL_MEM_M7_OCRAMS_BEGIN 0x20180000U
44/* The CM7 subsystem local OCRAMS end address, refer to Reference Manual for detailed information */
45#define FSL_MEM_M7_OCRAMS_END 0x20187FFFU
46
47/* System level ITCM memory address = CM7 subsystem local ITCM address + FSL_FEATURE_ITCM_OFFSET */
48#define FSL_MEM_M7_ITCM_OFFSET (0x7E0000U)
49/* System level DTCM memory address = CM7 subsystem local DTCM address - FSL_FEATURE_DTCM_OFFSET */
50#define FSL_MEM_M7_DTCM_OFFSET 0x1F800000U
51/* System level OCRAM memory address = CM7 subsystem local OCRAM address - FSL_MEM_M7_OCRAM_OFFSET */
52#define FSL_MEM_M7_OCRAM_OFFSET 0x1F900000U
53/* System level OCRAMS memory address = CM7 subsystem local OCRAMS address - FSL_MEM_M7_OCRAMS_OFFSET */
54#define FSL_MEM_M7_OCRAMS_OFFSET 0x20000000U
55
56typedef enum _mem_direction
57{
58 kMEMORY_Local2DMA = 0,
59 kMEMORY_DMA2Local,
60} mem_direction_t;
61
62/*******************************************************************************
63 * API
64 ******************************************************************************/
65#if defined(__cplusplus)
66extern "C" {
67#endif
68/*!
69 * @brief Convert the memory map address.
70 *
71 * This function convert the address between system mapped address and native mapped address.
72 * There maybe offset between subsystem native address and system address for some memory,
73 * this funciton convert the address to different memory map.
74 * @param addr address need to be converted.
75 * @param direction convert direction.
76 * @return the converted address
77 */
78static inline uint32_t MEMORY_ConvertMemoryMapAddress(uint32_t addr, mem_direction_t direction)
79{
80 uint32_t dest;
81
82 switch (direction)
83 {
84 case kMEMORY_Local2DMA:
85 {
86 if ((addr <= FSL_MEM_M7_ITCM_END))
87 {
88 dest = addr + FSL_MEM_M7_ITCM_OFFSET;
89 }
90 else if ((addr >= FSL_MEM_M7_DTCM_BEGIN) && (addr <= FSL_MEM_M7_DTCM_END))
91 {
92 dest = addr - FSL_MEM_M7_DTCM_OFFSET;
93 }
94 else if ((addr >= FSL_MEM_M7_OCRAM_BEGIN) && (addr <= FSL_MEM_M7_OCRAM_END))
95 {
96 dest = addr - FSL_MEM_M7_OCRAM_OFFSET;
97 }
98 else if ((addr >= FSL_MEM_M7_OCRAMS_BEGIN) && (addr <= FSL_MEM_M7_OCRAMS_END))
99 {
100 dest = addr - FSL_MEM_M7_OCRAMS_OFFSET;
101 }
102 else
103 {
104 dest = addr;
105 }
106 break;
107 }
108 case kMEMORY_DMA2Local:
109 {
110 if ((addr >= (FSL_MEM_M7_ITCM_BEGIN + FSL_MEM_M7_ITCM_OFFSET)) &&
111 (addr <= (FSL_MEM_M7_ITCM_END + FSL_MEM_M7_ITCM_OFFSET)))
112 {
113 dest = addr - FSL_MEM_M7_ITCM_OFFSET;
114 }
115 else if ((addr >= (FSL_MEM_M7_DTCM_BEGIN - FSL_MEM_M7_DTCM_OFFSET)) &&
116 (addr <= (FSL_MEM_M7_DTCM_END - FSL_MEM_M7_DTCM_OFFSET)))
117 {
118 dest = addr + FSL_MEM_M7_DTCM_OFFSET;
119 }
120 else if ((addr >= (FSL_MEM_M7_OCRAM_BEGIN - FSL_MEM_M7_OCRAM_OFFSET)) &&
121 (addr <= (FSL_MEM_M7_OCRAM_END - FSL_MEM_M7_OCRAM_OFFSET)))
122 {
123 dest = addr + FSL_MEM_M7_OCRAM_OFFSET;
124 }
125 else if ((addr >= (FSL_MEM_M7_OCRAMS_BEGIN - FSL_MEM_M7_OCRAMS_OFFSET)) &&
126 (addr <= (FSL_MEM_M7_OCRAMS_END - FSL_MEM_M7_OCRAMS_OFFSET)))
127 {
128 dest = addr + FSL_MEM_M7_OCRAMS_OFFSET;
129 }
130 else
131 {
132 dest = addr;
133 }
134 break;
135 }
136 default:
137 dest = addr;
138 break;
139 }
140
141 return dest;
142}
143#if defined(__cplusplus)
144}
145#endif /* __cplusplus */
146#endif /* _FSL_MEMORY_H_ */