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Diffstat (limited to 'lib/chibios-contrib/ext/mcux-sdk/devices/MK64F12/project_template/board.h')
-rw-r--r-- | lib/chibios-contrib/ext/mcux-sdk/devices/MK64F12/project_template/board.h | 146 |
1 files changed, 146 insertions, 0 deletions
diff --git a/lib/chibios-contrib/ext/mcux-sdk/devices/MK64F12/project_template/board.h b/lib/chibios-contrib/ext/mcux-sdk/devices/MK64F12/project_template/board.h new file mode 100644 index 000000000..e173ff074 --- /dev/null +++ b/lib/chibios-contrib/ext/mcux-sdk/devices/MK64F12/project_template/board.h | |||
@@ -0,0 +1,146 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2015, Freescale Semiconductor, Inc. | ||
3 | * Copyright 2016-2017 NXP | ||
4 | * All rights reserved. | ||
5 | * | ||
6 | * SPDX-License-Identifier: BSD-3-Clause | ||
7 | */ | ||
8 | |||
9 | #ifndef _BOARD_H_ | ||
10 | #define _BOARD_H_ | ||
11 | |||
12 | #include "clock_config.h" | ||
13 | #include "fsl_gpio.h" | ||
14 | |||
15 | /******************************************************************************* | ||
16 | * Definitions | ||
17 | ******************************************************************************/ | ||
18 | /* The board name */ | ||
19 | #define BOARD_NAME "TWR-K64F120M" | ||
20 | |||
21 | /* The UART to use for debug messages. */ | ||
22 | #define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART | ||
23 | #define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART1 | ||
24 | #define BOARD_DEBUG_UART_INSTANCE 1U | ||
25 | #define BOARD_DEBUG_UART_CLKSRC kCLOCK_CoreSysClk | ||
26 | #define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq() | ||
27 | #define BOARD_UART_IRQ UART1_RX_TX_IRQn | ||
28 | #define BOARD_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler | ||
29 | |||
30 | #ifndef BOARD_DEBUG_UART_BAUDRATE | ||
31 | #define BOARD_DEBUG_UART_BAUDRATE 115200 | ||
32 | #endif /* BOARD_DEBUG_UART_BAUDRATE */ | ||
33 | |||
34 | #define BOARD_DEMO_I2C_CLKSRC kCLOCK_BusClk | ||
35 | #define BOARD_DEMO_SAI_CLKSRC kCLOCK_CoreSysClk | ||
36 | #define BOARD_DEMO_SAI I2S0 | ||
37 | #define BOARD_SAI_DEMO_I2C_BASEADDR I2C0 | ||
38 | /* Board led color mapping */ | ||
39 | #define LOGIC_LED_ON 0U | ||
40 | #define LOGIC_LED_OFF 1U | ||
41 | #ifndef BOARD_LED_GREEN_GPIO | ||
42 | #define BOARD_LED_GREEN_GPIO GPIOE | ||
43 | #endif | ||
44 | #define BOARD_LED_GREEN_GPIO_PORT PORTE | ||
45 | #ifndef BOARD_LED_GREEN_GPIO_PIN | ||
46 | #define BOARD_LED_GREEN_GPIO_PIN 6U | ||
47 | #endif | ||
48 | #ifndef BOARD_LED_YELLOW_GPIO | ||
49 | #define BOARD_LED_YELLOW_GPIO GPIOE | ||
50 | #endif | ||
51 | #define BOARD_LED_YELLOW_GPIO_PORT PORTE | ||
52 | #ifndef BOARD_LED_YELLOW_GPIO_PIN | ||
53 | #define BOARD_LED_YELLOW_GPIO_PIN 7U | ||
54 | #endif | ||
55 | #ifndef BOARD_LED_ORANGE_GPIO | ||
56 | #define BOARD_LED_ORANGE_GPIO GPIOE | ||
57 | #endif | ||
58 | #define BOARD_LED_ORANGE_GPIO_PORT PORTE | ||
59 | #ifndef BOARD_LED_ORANGE_GPIO_PIN | ||
60 | #define BOARD_LED_ORANGE_GPIO_PIN 8U | ||
61 | #endif | ||
62 | #ifndef BOARD_LED_BLUE_GPIO | ||
63 | #define BOARD_LED_BLUE_GPIO GPIOE | ||
64 | #endif | ||
65 | #define BOARD_LED_BLUE_GPIO_PORT PORTE | ||
66 | #ifndef BOARD_LED_BLUE_GPIO_PIN | ||
67 | #define BOARD_LED_BLUE_GPIO_PIN 9U | ||
68 | #endif | ||
69 | |||
70 | #define LED_GREEN_INIT(output) \ | ||
71 | GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \ | ||
72 | BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */ | ||
73 | #define LED_GREEN_ON() \ | ||
74 | GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */ | ||
75 | #define LED_GREEN_OFF() \ | ||
76 | GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */ | ||
77 | #define LED_GREEN_TOGGLE() \ | ||
78 | GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */ | ||
79 | |||
80 | #define LED_YELLOW_INIT(output) \ | ||
81 | GPIO_PinWrite(BOARD_LED_YELLOW_GPIO, BOARD_LED_YELLOW_GPIO_PIN, output); \ | ||
82 | BOARD_LED_YELLOW_GPIO->PDDR |= (1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Enable target LED_YELLOW */ | ||
83 | #define LED_YELLOW_ON() \ | ||
84 | GPIO_PortClear(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Turn on target LED_YELLOW */ | ||
85 | #define LED_YELLOW_OFF() \ | ||
86 | GPIO_PortSet(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Turn off target LED_YELLOW */ | ||
87 | #define LED_YELLOW_TOGGLE() \ | ||
88 | GPIO_PortToggle(BOARD_LED_YELLOW_GPIO, 1U << BOARD_LED_YELLOW_GPIO_PIN) /*!< Toggle on target LED_YELLOW */ | ||
89 | |||
90 | #define LED_ORANGE_INIT(output) \ | ||
91 | GPIO_PinWrite(BOARD_LED_ORANGE_GPIO, BOARD_LED_ORANGE_GPIO_PIN, output); \ | ||
92 | BOARD_LED_ORANGE_GPIO->PDDR |= (1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Enable target LED_ORANGE */ | ||
93 | #define LED_ORANGE_ON() \ | ||
94 | GPIO_PortClear(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Turn on target LED_ORANGE */ | ||
95 | #define LED_ORANGE_OFF() \ | ||
96 | GPIO_PortSet(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Turn off target LED_ORANGE */ | ||
97 | #define LED_ORANGE_TOGGLE() \ | ||
98 | GPIO_PortToggle(BOARD_LED_ORANGE_GPIO, 1U << BOARD_LED_ORANGE_GPIO_PIN) /*!< Toggle on target LED_ORANGE */ | ||
99 | |||
100 | #define LED_BLUE_INIT(output) \ | ||
101 | GPIO_PinWrite(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output); \ | ||
102 | BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */ | ||
103 | #define LED_BLUE_ON() \ | ||
104 | GPIO_PortClear(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */ | ||
105 | #define LED_BLUE_OFF() \ | ||
106 | GPIO_PortSet(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */ | ||
107 | #define LED_BLUE_TOGGLE() \ | ||
108 | GPIO_PortToggle(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */ | ||
109 | |||
110 | /* The SDHC instance/channel used for board */ | ||
111 | #define BOARD_SDHC_BASEADDR SDHC | ||
112 | #define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk | ||
113 | #define BOARD_SDHC_CLK_FREQ CLOCK_GetFreq(kCLOCK_CoreSysClk) | ||
114 | #define BOARD_SDHC_IRQ SDHC_IRQn | ||
115 | #define BOARD_SDHC_CD_GPIO_BASE GPIOB | ||
116 | #ifndef BOARD_SDHC_CD_GPIO_PIN | ||
117 | #define BOARD_SDHC_CD_GPIO_PIN 20U | ||
118 | #endif | ||
119 | #define BOARD_SDHC_CD_PORT_BASE PORTB | ||
120 | #define BOARD_SDHC_CD_PORT_IRQ PORTB_IRQn | ||
121 | #define BOARD_SDHC_CD_PORT_IRQ_HANDLER PORTB_IRQHandler | ||
122 | |||
123 | #define BOARD_ACCEL_I2C_BASEADDR I2C1 | ||
124 | |||
125 | /* @brief The SDSPI disk PHY configuration. */ | ||
126 | #define BOARD_SDSPI_SPI_BASE SPI1_BASE /*!< SPI base address for SDSPI */ | ||
127 | #define BOARD_SDSPI_CD_GPIO_BASE GPIOD /*!< Port related to card detect pin for SDSPI */ | ||
128 | #ifndef BOARD_SDSPI_CD_PIN | ||
129 | #define BOARD_SDSPI_CD_PIN 12U /*!< Card detect pin for SDSPI */ | ||
130 | #endif | ||
131 | |||
132 | #if defined(__cplusplus) | ||
133 | extern "C" { | ||
134 | #endif /* __cplusplus */ | ||
135 | |||
136 | /******************************************************************************* | ||
137 | * API | ||
138 | ******************************************************************************/ | ||
139 | |||
140 | void BOARD_InitDebugConsole(void); | ||
141 | |||
142 | #if defined(__cplusplus) | ||
143 | } | ||
144 | #endif /* __cplusplus */ | ||
145 | |||
146 | #endif /* _BOARD_H_ */ | ||