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Diffstat (limited to 'lib/chibios-contrib/os/hal/src/hal_fsmc.c')
-rw-r--r-- | lib/chibios-contrib/os/hal/src/hal_fsmc.c | 201 |
1 files changed, 201 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/hal/src/hal_fsmc.c b/lib/chibios-contrib/os/hal/src/hal_fsmc.c new file mode 100644 index 000000000..c3f2a99fb --- /dev/null +++ b/lib/chibios-contrib/os/hal/src/hal_fsmc.c | |||
@@ -0,0 +1,201 @@ | |||
1 | /* | ||
2 | ChibiOS/HAL - Copyright (C) 2014 Uladzimir Pylinsky aka barthess | ||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License"); | ||
5 | you may not use this file except in compliance with the License. | ||
6 | You may obtain a copy of the License at | ||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0 | ||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software | ||
11 | distributed under the License is distributed on an "AS IS" BASIS, | ||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
13 | See the License for the specific language governing permissions and | ||
14 | limitations under the License. | ||
15 | */ | ||
16 | |||
17 | /** | ||
18 | * @file hal_fsmc.c | ||
19 | * @brief FSMC Driver subsystem low level driver source template. | ||
20 | * | ||
21 | * @addtogroup FSMC | ||
22 | * @{ | ||
23 | */ | ||
24 | #include "hal.h" | ||
25 | |||
26 | #if (HAL_USE_SDRAM == TRUE) || (HAL_USE_SRAM == TRUE) || (HAL_USE_NAND == TRUE) || defined(__DOXYGEN__) | ||
27 | |||
28 | /*===========================================================================*/ | ||
29 | /* Driver local definitions. */ | ||
30 | /*===========================================================================*/ | ||
31 | |||
32 | |||
33 | |||
34 | /*===========================================================================*/ | ||
35 | /* Driver exported variables. */ | ||
36 | /*===========================================================================*/ | ||
37 | |||
38 | /** | ||
39 | * @brief FSMC1 driver identifier. | ||
40 | */ | ||
41 | #if STM32_FSMC_USE_FSMC1 || defined(__DOXYGEN__) | ||
42 | FSMCDriver FSMCD1; | ||
43 | #endif | ||
44 | |||
45 | /*===========================================================================*/ | ||
46 | /* Driver local types. */ | ||
47 | /*===========================================================================*/ | ||
48 | |||
49 | /*===========================================================================*/ | ||
50 | /* Driver local variables and types. */ | ||
51 | /*===========================================================================*/ | ||
52 | |||
53 | /*===========================================================================*/ | ||
54 | /* Driver local functions. */ | ||
55 | /*===========================================================================*/ | ||
56 | |||
57 | /*===========================================================================*/ | ||
58 | /* Driver interrupt handlers. */ | ||
59 | /*===========================================================================*/ | ||
60 | |||
61 | /*===========================================================================*/ | ||
62 | /* Driver exported functions. */ | ||
63 | /*===========================================================================*/ | ||
64 | |||
65 | /** | ||
66 | * @brief Low level FSMC driver initialization. | ||
67 | * | ||
68 | * @notapi | ||
69 | */ | ||
70 | void fsmcInit(void) { | ||
71 | |||
72 | if (FSMCD1.state == FSMC_UNINIT) { | ||
73 | FSMCD1.state = FSMC_STOP; | ||
74 | #if HAL_USE_SRAM | ||
75 | #if STM32_SRAM_USE_SRAM1 | ||
76 | FSMCD1.sram1 = (FSMC_SRAM_TypeDef *)(FSMC_Bank1_R_BASE); | ||
77 | #endif | ||
78 | |||
79 | #if STM32_SRAM_USE_SRAM2 | ||
80 | FSMCD1.sram2 = (FSMC_SRAM_TypeDef *)(FSMC_Bank1_R_BASE + 8); | ||
81 | #endif | ||
82 | |||
83 | #if STM32_SRAM_USE_SRAM3 | ||
84 | FSMCD1.sram3 = (FSMC_SRAM_TypeDef *)(FSMC_Bank1_R_BASE + 8 * 2); | ||
85 | #endif | ||
86 | |||
87 | #if STM32_SRAM_USE_SRAM4 | ||
88 | FSMCD1.sram4 = (FSMC_SRAM_TypeDef *)(FSMC_Bank1_R_BASE + 8 * 3); | ||
89 | #endif | ||
90 | #endif | ||
91 | |||
92 | #if HAL_USE_NAND | ||
93 | #if STM32_NAND_USE_NAND1 | ||
94 | FSMCD1.nand1 = (FSMC_NAND_TypeDef *)FSMC_Bank2_R_BASE; | ||
95 | #endif | ||
96 | |||
97 | #if STM32_NAND_USE_NAND2 | ||
98 | FSMCD1.nand2 = (FSMC_NAND_TypeDef *)FSMC_Bank3_R_BASE; | ||
99 | #endif | ||
100 | #endif | ||
101 | |||
102 | #if HAL_USE_SDRAM | ||
103 | #if (defined(STM32F427xx) || defined(STM32F437xx) || \ | ||
104 | defined(STM32F429xx) || defined(STM32F439xx) || \ | ||
105 | defined(STM32F745xx) || defined(STM32F746xx) || \ | ||
106 | defined(STM32F756xx) || defined(STM32F767xx) || \ | ||
107 | defined(STM32F769xx) || defined(STM32F777xx) || \ | ||
108 | defined(STM32F779xx)) | ||
109 | #if STM32_SDRAM_USE_SDRAM1 || STM32_SDRAM_USE_SDRAM2 | ||
110 | FSMCD1.sdram = (FSMC_SDRAM_TypeDef *)FSMC_Bank5_6_R_BASE; | ||
111 | #endif | ||
112 | #endif | ||
113 | #endif | ||
114 | } | ||
115 | } | ||
116 | |||
117 | /** | ||
118 | * @brief Configures and activates the FSMC peripheral. | ||
119 | * | ||
120 | * @param[in] fsmcp pointer to the @p FSMCDriver object | ||
121 | * | ||
122 | * @notapi | ||
123 | */ | ||
124 | void fsmcStart(FSMCDriver *fsmcp) { | ||
125 | |||
126 | osalDbgAssert((fsmcp->state == FSMC_STOP) || (fsmcp->state == FSMC_READY), | ||
127 | "invalid state"); | ||
128 | |||
129 | if (fsmcp->state == FSMC_STOP) { | ||
130 | /* Enables the peripheral.*/ | ||
131 | #if STM32_FSMC_USE_FSMC1 | ||
132 | if (&FSMCD1 == fsmcp) { | ||
133 | #ifdef rccResetFSMC | ||
134 | rccResetFSMC(); | ||
135 | #endif | ||
136 | rccEnableFSMC(FALSE); | ||
137 | #if HAL_USE_NAND | ||
138 | nvicEnableVector(STM32_FSMC_NUMBER, STM32_FSMC_FSMC1_IRQ_PRIORITY); | ||
139 | #endif | ||
140 | } | ||
141 | #endif /* STM32_FSMC_USE_FSMC1 */ | ||
142 | |||
143 | fsmcp->state = FSMC_READY; | ||
144 | } | ||
145 | } | ||
146 | |||
147 | /** | ||
148 | * @brief Deactivates the FSMC peripheral. | ||
149 | * | ||
150 | * @param[in] emcp pointer to the @p FSMCDriver object | ||
151 | * | ||
152 | * @notapi | ||
153 | */ | ||
154 | void fsmcStop(FSMCDriver *fsmcp) { | ||
155 | |||
156 | if (fsmcp->state == FSMC_READY) { | ||
157 | /* Resets the peripheral.*/ | ||
158 | #ifdef rccResetFSMC | ||
159 | rccResetFSMC(); | ||
160 | #endif | ||
161 | |||
162 | /* Disables the peripheral.*/ | ||
163 | #if STM32_FSMC_USE_FSMC1 | ||
164 | if (&FSMCD1 == fsmcp) { | ||
165 | #if HAL_USE_NAND | ||
166 | nvicDisableVector(STM32_FSMC_NUMBER); | ||
167 | #endif | ||
168 | rccDisableFSMC(); | ||
169 | } | ||
170 | #endif /* STM32_FSMC_USE_FSMC1 */ | ||
171 | |||
172 | fsmcp->state = FSMC_STOP; | ||
173 | } | ||
174 | } | ||
175 | |||
176 | /** | ||
177 | * @brief FSMC shared interrupt handler. | ||
178 | * | ||
179 | * @notapi | ||
180 | */ | ||
181 | CH_IRQ_HANDLER(STM32_FSMC_HANDLER) { | ||
182 | |||
183 | CH_IRQ_PROLOGUE(); | ||
184 | #if HAL_USE_NAND | ||
185 | #if STM32_NAND_USE_NAND1 | ||
186 | if (FSMCD1.nand1->SR & FSMC_SR_ISR_MASK) { | ||
187 | NANDD1.isr_handler(&NANDD1); | ||
188 | } | ||
189 | #endif | ||
190 | #if STM32_NAND_USE_NAND2 | ||
191 | if (FSMCD1.nand2->SR & FSMC_SR_ISR_MASK) { | ||
192 | NANDD2.isr_handler(&NANDD2); | ||
193 | } | ||
194 | #endif | ||
195 | #endif | ||
196 | CH_IRQ_EPILOGUE(); | ||
197 | } | ||
198 | |||
199 | #endif /* HAL_USE_FSMC */ | ||
200 | |||
201 | /** @} */ | ||