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1/*********************************************************************
2* SEGGER Microcontroller GmbH *
3* The Embedded Experts *
4**********************************************************************
5* *
6* (c) 1995 - 2019 SEGGER Microcontroller GmbH *
7* *
8* www.segger.com Support: [email protected] *
9* *
10**********************************************************************
11* *
12* SEGGER SystemView * Real-time application analysis *
13* *
14**********************************************************************
15* *
16* All rights reserved. *
17* *
18* SEGGER strongly recommends to not make any changes *
19* to or modify the source code of this software in order to stay *
20* compatible with the RTT protocol and J-Link. *
21* *
22* Redistribution and use in source and binary forms, with or *
23* without modification, are permitted provided that the following *
24* conditions are met: *
25* *
26* o Redistributions of source code must retain the above copyright *
27* notice, this list of conditions and the following disclaimer. *
28* *
29* o Redistributions in binary form must reproduce the above *
30* copyright notice, this list of conditions and the following *
31* disclaimer in the documentation and/or other materials provided *
32* with the distribution. *
33* *
34* o Neither the name of SEGGER Microcontroller GmbH *
35* nor the names of its contributors may be used to endorse or *
36* promote products derived from this software without specific *
37* prior written permission. *
38* *
39* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
40* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
41* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
42* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
43* DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
44* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
45* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
46* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
47* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
48* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
49* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
50* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
51* DAMAGE. *
52* *
53**********************************************************************
54* *
55* SystemView version: V2.52h *
56* *
57**********************************************************************
58-------------------------- END-OF-HEADER -----------------------------
59
60File : SEGGER_SYSVIEW_Conf.h
61Purpose : SEGGER SystemView configuration.
62Revision: $Rev: 13453 $
63*/
64
65#ifndef SEGGER_SYSVIEW_CONF_H
66#define SEGGER_SYSVIEW_CONF_H
67
68/*********************************************************************
69*
70* Defines, fixed
71*
72**********************************************************************
73*/
74//
75// Constants for known core configuration
76//
77#define SEGGER_SYSVIEW_CORE_OTHER 0
78#define SEGGER_SYSVIEW_CORE_CM0 1 // Cortex-M0/M0+/M1
79#define SEGGER_SYSVIEW_CORE_CM3 2 // Cortex-M3/M4/M7
80#define SEGGER_SYSVIEW_CORE_RX 3 // Renesas RX
81
82#if (defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__) || (defined __clang__)
83 #if (defined __ARM_ARCH_6M__) || (defined __ARM_ARCH_8M_BASE__)
84 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
85 #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__))
86 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
87 #endif
88#elif defined(__ICCARM__)
89 #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__))
90 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
91 #elif ((defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)))
92 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
93 #endif
94#elif defined(__CC_ARM)
95 #if (defined(__TARGET_ARCH_6S_M))
96 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
97 #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
98 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
99 #endif
100#elif defined(__TI_ARM__)
101 #ifdef __TI_ARM_V6M0__
102 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM0
103 #elif (defined(__TI_ARM_V7M3__) || defined(__TI_ARM_V7M4__))
104 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_CM3
105 #endif
106#elif defined(__ICCRX__)
107 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
108#elif defined(__RX)
109 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_RX
110#endif
111
112#ifndef SEGGER_SYSVIEW_CORE
113 #define SEGGER_SYSVIEW_CORE SEGGER_SYSVIEW_CORE_OTHER
114#endif
115
116/*********************************************************************
117*
118* Defines, configurable
119*
120**********************************************************************
121*/
122/*********************************************************************
123*
124* SystemView buffer configuration
125*/
126#define SEGGER_SYSVIEW_RTT_BUFFER_SIZE 2048 // Number of bytes that SystemView uses for the buffer.
127#define SEGGER_SYSVIEW_RTT_CHANNEL 1 // The RTT channel that SystemView will use. 0: Auto selection
128
129#define SEGGER_SYSVIEW_USE_STATIC_BUFFER 1 // Use a static buffer to generate events instead of a buffer on the stack
130
131#define SEGGER_SYSVIEW_POST_MORTEM_MODE 0 // 1: Enable post mortem analysis mode
132
133/*********************************************************************
134*
135* SystemView timestamp configuration
136*/
137#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
138 #define SEGGER_SYSVIEW_GET_TIMESTAMP() (*(U32 *)(0xE0001004)) // Retrieve a system timestamp. Cortex-M cycle counter.
139 #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by clock source
140#else
141 #define SEGGER_SYSVIEW_GET_TIMESTAMP() SEGGER_SYSVIEW_X_GetTimestamp() // Retrieve a system timestamp via user-defined function
142 #define SEGGER_SYSVIEW_TIMESTAMP_BITS 32 // Define number of valid bits low-order delivered by SEGGER_SYSVIEW_X_GetTimestamp()
143#endif
144
145/*********************************************************************
146*
147* SystemView Id configuration
148*/
149#define SEGGER_SYSVIEW_ID_BASE 0x20000000 // Default value for the lowest Id reported by the application. Can be overridden by the application via SEGGER_SYSVIEW_SetRAMBase(). (i.e. 0x20000000 when all Ids are an address in this RAM)
150#define SEGGER_SYSVIEW_ID_SHIFT 2 // Number of bits to shift the Id to save bandwidth. (i.e. 2 when Ids are 4 byte aligned)
151
152/*********************************************************************
153*
154* SystemView interrupt configuration
155*/
156#if SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM3
157 #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x1FF) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[8:0] = active vector)
158#elif SEGGER_SYSVIEW_CORE == SEGGER_SYSVIEW_CORE_CM0
159 #if defined(__ICCARM__)
160 #if (__VER__ > 6100000)
161 #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() (__get_IPSR()) // Workaround for IAR, which might do a byte-access to 0xE000ED04. Read IPSR instead.
162 #else
163 #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Older versions of IAR do not include __get_IPSR, but might also not optimize to byte-access.
164 #endif
165 #else
166 #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() ((*(U32 *)(0xE000ED04)) & 0x3F) // Get the currently active interrupt Id. (i.e. read Cortex-M ICSR[5:0] = active vector)
167 #endif
168#else
169 #define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
170#endif
171
172#endif // SEGGER_SYSVIEW_CONF_H
173
174/*************************** End of file ****************************/
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