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diff --git a/lib/chibios-contrib/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h b/lib/chibios-contrib/os/common/startup/ARMCMx/devices/TM4C129x/cmparams.h
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1/*
2 Copyright (C) 2014..2017 Marco Veeneman
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/**
18 * @file TM4C129x/cmparams.h
19 * @brief ARM Cortex-M4 parameters for the TM4C129x.
20 *
21 * @defgroup ARMCMx_TM4C129x TM4C129x Specific Parameters
22 * @ingroup ARMCMx_SPECIFIC
23 * @details This file contains the Cortex-M4 specific parameters for the
24 * TM4C129x platform.
25 * @{
26 */
27
28#ifndef CMPARAMS_H
29#define CMPARAMS_H
30
31/* Defines required for correct CMSIS header functioning */
32#define __MPU_PRESENT 1 /**< MPU present */
33#define __NVIC_PRIO_BITS 3 /**< Bits used for Priority Levels */
34#define __Vendor_SysTickConfig 1 /**< Use different SysTick Config */
35#define __FPU_PRESENT 1 /**< FPU present */
36
37/* The following two defines are needed by ChibiOS */
38#define SVCall_IRQn -5
39#define PendSV_IRQn -3
40
41/**
42 * @brief Cortex core model.
43 */
44#define CORTEX_MODEL 4
45
46/**
47 * @brief Floating Point unit presence.
48 */
49#define CORTEX_HAS_FPU 1
50
51/**
52 * @brief Number of bits in priority masks.
53 */
54#define CORTEX_PRIORITY_BITS 3
55
56/**
57 * @brief Number of interrupt vectors.
58 * @note This number does not include the 16 system vectors and must be
59 * rounded to a multiple of 8.
60 */
61#define CORTEX_NUM_VECTORS 120
62
63/* The following code is not processed when the file is included from an
64 asm module.*/
65#if !defined(_FROM_ASM_)
66
67/* If the device type is not externally defined, for example from the Makefile,
68 then a file named board.h is included. This file must contain a device
69 definition compatible with the include file.*/
70#if !defined (PART_TM4C1290NCPDT) && !defined (PART_TM4C1290NCZAD) && \
71 !defined (PART_TM4C1292NCPDT) && !defined (PART_TM4C1292NCZAD) && \
72 !defined (PART_TM4C1294KCPDT) && !defined (PART_TM4C1294NCPDT) && \
73 !defined (PART_TM4C1294NCZAD) && !defined (PART_TM4C1297NCZAD) && \
74 !defined (PART_TM4C1299KCZAD) && !defined (PART_TM4C1299NCZAD) && \
75 !defined (PART_TM4C129CNCPDT) && !defined (PART_TM4C129CNCZAD) && \
76 !defined (PART_TM4C129DNCPDT) && !defined (PART_TM4C129DNCZAD) && \
77 !defined (PART_TM4C129EKCPDT) && !defined (PART_TM4C129ENCPDT) && \
78 !defined (PART_TM4C129ENCZAD) && !defined (PART_TM4C129LNCZAD) && \
79 !defined (PART_TM4C129XKCZAD) && !defined (PART_TM4C129XNCZAD)
80#include "board.h"
81#endif
82
83typedef int IRQn_Type;
84
85#include "core_cm4.h"
86
87/* Including the TivaWare peripheral headers.*/
88#include "inc/hw_ints.h"
89#include "inc/hw_memmap.h"
90#include "inc/hw_types.h"
91#include "inc/hw_timer.h"
92#include "inc/hw_sysctl.h"
93#include "inc/hw_gpio.h"
94#include "inc/hw_uart.h"
95#include "inc/hw_timer.h"
96#include "inc/hw_emac.h"
97#include "inc/hw_i2c.h"
98#include "inc/hw_watchdog.h"
99#include "inc/hw_ssi.h"
100#include "inc/hw_udma.h"
101#include "inc/hw_pwm.h"
102#include "inc/hw_adc.h"
103
104#if CORTEX_NUM_VECTORS != ((((NUM_INTERRUPTS - 16) + 7) / 8) * 8)
105#error "TivaWare NUM_INTERRUPTS mismatch"
106#endif
107
108#endif /* !defined(_FROM_ASM_) */
109
110#endif /* CMPARAMS_H */
111
112/** @} */