3 files changed, 252 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
new file mode 100644
index 000000000..c5237d7f7
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
@@ -0,0 +1,92 @@
+/*
+    Copyright (C) 2015 Fabio Utzig
+                  2016 Stéphane D'Alu / Bruno Remond
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+#include "hal.h"
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/* RAM Banks
+ *  (Values are defined in Nordic gcc_startup_nrf51.s)
+ */
+#define NRF_POWER_RAMON_ADDRESS 0x40000524
+#define NRF_POWER_RAMONB_ADDRESS 0x40000554
+#define NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 0x3
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+  .pads = {
+        PAL_MODE_UNCONNECTED,         /* P0.0                  */
+        PAL_MODE_UNCONNECTED,         /* P0.1                  */
+        PAL_MODE_UNCONNECTED,         /* P0.2                  */
+        PAL_MODE_UNCONNECTED,         /* P0.3                  */
+        PAL_MODE_UNCONNECTED,         /* P0.4                  */
+        PAL_MODE_UNCONNECTED,         /* P0.5                  */
+        PAL_MODE_UNCONNECTED,         /* P0.6                  */
+        PAL_MODE_OUTPUT_OPENDRAIN,    /* P0.7 : SCL            */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.8 : UART_RTS       */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.9 : UART_TX        */
+        PAL_MODE_INPUT_PULLUP,        /* P0.10: UART_CTS       */
+        PAL_MODE_INPUT_PULLUP,        /* P0.11: UART_RX        */
+        PAL_MODE_UNCONNECTED,         /* P0.12                 */
+        PAL_MODE_UNCONNECTED,         /* P0.13                 */
+        PAL_MODE_UNCONNECTED,         /* P0.14                 */
+        PAL_MODE_UNCONNECTED,         /* P0.15                 */
+        PAL_MODE_UNCONNECTED,         /* P0.16                 */
+        PAL_MODE_INPUT_PULLUP,        /* P0.17: BTN1           */
+        PAL_MODE_INPUT_PULLUP,        /* P0.18: BTN2           */
+        PAL_MODE_INPUT_PULLUP,        /* P0.19: BTN3           */
+        PAL_MODE_INPUT_PULLUP,        /* P0.20: BTN4           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.21: LED1           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.22: LED2           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.23: LED3           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.24: LED4 | SPI_SEL */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.25: SPI_MOSI       */
+        PAL_MODE_UNCONNECTED,         /* P0.26: XTAL (32MHz)   */
+        PAL_MODE_UNCONNECTED,         /* P0.27: XTAL (32MHz)   */
+        PAL_MODE_INPUT_PULLUP,        /* P0.28: SPI_MISO       */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.29: SPI_SCK        */
+        PAL_MODE_OUTPUT_OPENDRAIN,    /* P0.30: SDA            */
+        PAL_MODE_UNCONNECTED,         /* P0.31                 */
+  },
+};
+#endif
+/**
+ * @brief   Early initialization code.
+ * @details This initialization is performed just after reset before BSS and
+ *          DATA segments initialization.
+ */
+void __early_init(void)
+{
+  /* Make sure ALL RAM banks are powered on */
+  *(uint32_t *)NRF_POWER_RAMON_ADDRESS  |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
+  *(uint32_t *)NRF_POWER_RAMONB_ADDRESS |= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
+}
+/**
+ * @brief   Late initialization code.
+ * @note    This initialization is performed after BSS and DATA segments
+ *          initialization and before invoking the main() function.
+ */
+void boardInit(void)
+{
+}
diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h
new file mode 100644
index 000000000..67e1724f6
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h
@@ -0,0 +1,145 @@
+/*
+    Copyright (C) 2015 Fabio Utzig
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+#ifndef _BOARD_H_
+#define _BOARD_H_
+/* Board identifier. */
+#define BOARD_NRF51_DK
+#define BOARD_NAME              "nRF51 DK"
+/* Board oscillators-related settings. */
+#define NRF51_XTAL_VALUE        16000000
+#define NRF51_LFCLK_SOURCE      1
+/* GPIO pins. */
+#define BTN1           17
+#define BTN2           18
+#define BTN3           19
+#define BTN4           20
+#define LED1           21
+#define LED2           22
+#define LED3           23
+#define LED4           24
+#define UART_RTS        8
+#define UART_TX         9
+#define UART_CTS       10
+#define UART_RX        11
+#define SPI_SCK        29
+#define SPI_MOSI       25
+#define SPI_MISO       28
+#define SPI_SS         24
+#define I2C_SCL         7
+#define I2C_SDA        30
+#define AIN0           26
+#define AIN1           27
+#define AIN2            1
+#define AIN3            2
+#define AIN4            3
+#define AIN5            4
+#define AIN6            5
+#define AIN7            6
+#define AREF0           0
+#define AREF1           6
+/*
+ * IO pins assignments.
+ */
+#define IOPORT1_BTN1           17U
+#define IOPORT1_BTN2           18U
+#define IOPORT1_BTN3           19U
+#define IOPORT1_BTN4           20U
+#define IOPORT1_LED1           21U
+#define IOPORT1_LED2           22U
+#define IOPORT1_LED3           23U
+#define IOPORT1_LED4           24U
+#define IOPORT1_UART_RTS        8U
+#define IOPORT1_UART_TX         9U
+#define IOPORT1_UART_CTS       10U
+#define IOPORT1_UART_RX        11U
+#define IOPORT1_SPI_SCK        29U
+#define IOPORT1_SPI_MOSI       25U
+#define IOPORT1_SPI_MISO       28U
+#define IOPORT1_SPI_SS         24U
+#define IOPORT1_I2C_SCL         7U
+#define IOPORT1_I2C_SDA        30U
+#define IOPORT1_A0              1U
+#define IOPORT1_A1              2U
+#define IOPORT1_A2              3U
+#define IOPORT1_A3              4U
+#define IOPORT1_A4              5U
+#define IOPORT1_A5              6U
+#define IOPORT1_AIN0           26U
+#define IOPORT1_AIN1           27U
+#define IOPORT1_AIN2            1U
+#define IOPORT1_AIN3            2U
+#define IOPORT1_AIN4            3U
+#define IOPORT1_AIN5            4U
+#define IOPORT1_AIN6            5U
+#define IOPORT1_AIN7            6U
+#define IOPORT1_AREF0           0U
+#define IOPORT1_AREF1           6U
+/*
+ * IO lines assignments.
+ */
+#define LINE_BTN1      PAL_LINE(IOPORT1, IOPORT1_BTN1)
+#define LINE_BTN2      PAL_LINE(IOPORT1, IOPORT1_BTN2)
+#define LINE_BTN3      PAL_LINE(IOPORT1, IOPORT1_BTN3)
+#define LINE_BTN4      PAL_LINE(IOPORT1, IOPORT1_BTN4)
+#define LINE_LED1      PAL_LINE(IOPORT1, IOPORT1_LED1)
+#define LINE_LED2      PAL_LINE(IOPORT1, IOPORT1_LED2)
+#define LINE_LED3      PAL_LINE(IOPORT1, IOPORT1_LED3)
+#define LINE_LED4      PAL_LINE(IOPORT1, IOPORT1_LED4)
+#define LINE_UART_RTS  PAL_LINE(IOPORT1, IOPORT1_UART_RTS)
+#define LINE_UART_TX   PAL_LINE(IOPORT1, IOPORT1_UART_TX)
+#define LINE_UART_CTS  PAL_LINE(IOPORT1, IOPORT1_UART_CTS)
+#define LINE_UART_RX   PAL_LINE(IOPORT1, IOPORT1_UART_RX)
+#define LINE_SPI_SCK   PAL_LINE(IOPORT1, IOPORT1_SPI_SCK)
+#define LINE_SPI_MOSI  PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI)
+#define LINE_SPI_MISO  PAL_LINE(IOPORT1, IOPORT1_SPI_MISO)
+#define LINE_SPI_SS    PAL_LINE(IOPORT1, IOPORT1_SPI_SS)
+#define LINE_I2C_SCL   PAL_LINE(IOPORT1, IOPORT1_I2C_SCL)
+#define LINE_I2C_SDA   PAL_LINE(IOPORT1, IOPORT1_I2C_SDA)
+#define LINE_A0        PAL_LINE(IOPORT1, IOPORT1_A0)
+#define LINE_A1        PAL_LINE(IOPORT1, IOPORT1_A1)
+#define LINE_A2        PAL_LINE(IOPORT1, IOPORT1_A2)
+#define LINE_A3        PAL_LINE(IOPORT1, IOPORT1_A3)
+#define LINE_A4        PAL_LINE(IOPORT1, IOPORT1_A4)
+#define LINE_A5        PAL_LINE(IOPORT1, IOPORT1_A5)
+#define LINE_AIN0      PAL_LINE(IOPORT1, IOPORT1_AIN0)
+#define LINE_AIN1      PAL_LINE(IOPORT1, IOPORT1_AIN1)
+#define LINE_AIN2      PAL_LINE(IOPORT1, IOPORT1_AIN2)
+#define LINE_AIN3      PAL_LINE(IOPORT1, IOPORT1_AIN3)
+#define LINE_AIN4      PAL_LINE(IOPORT1, IOPORT1_AIN4)
+#define LINE_AIN5      PAL_LINE(IOPORT1, IOPORT1_AIN5)
+#define LINE_AIN6      PAL_LINE(IOPORT1, IOPORT1_AIN6)
+#define LINE_AIN7      PAL_LINE(IOPORT1, IOPORT1_AIN7)
+#define LINE_AREF0     PAL_LINE(IOPORT1, IOPORT1_AREF0)
+#define LINE_AREF1     PAL_LINE(IOPORT1, IOPORT1_AREF1)
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+#endif /* _BOARD_H_ */
diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk
new file mode 100644
index 000000000..3e3e465f7
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk
@@ -0,0 +1,15 @@
+# List of all the board related files.
+BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK/board.c
+# Required include directories
+BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK
+# Flash
+JLINK_DEVICE    = nrf51422
+JLINK_PRE_FLASH = w4 4001e504 1
+JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100
+JLINK_PIN_RESET = w4 40000544 1
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC  += $(BOARDINC)

diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c new file mode 100644 index 000000000..c5237d7f7 --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.c
@@ -0,0 +1,92 @@
	1	/*
	2	Copyright (C) 2015 Fabio Utzig
	3	2016 Stéphane D'Alu / Bruno Remond
	4
	5	Licensed under the Apache License, Version 2.0 (the "License");
	6	you may not use this file except in compliance with the License.
	7	You may obtain a copy of the License at
	8
	9	http://www.apache.org/licenses/LICENSE-2.0
	10
	11	Unless required by applicable law or agreed to in writing, software
	12	distributed under the License is distributed on an "AS IS" BASIS,
	13	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	14	See the License for the specific language governing permissions and
	15	limitations under the License.
	16	*/
	17
	18	#include "hal.h"
	19
	20	#if HAL_USE_PAL \|\| defined(__DOXYGEN__)
	21
	22	/* RAM Banks
	23	* (Values are defined in Nordic gcc_startup_nrf51.s)
	24	*/
	25	#define NRF_POWER_RAMON_ADDRESS 0x40000524
	26	#define NRF_POWER_RAMONB_ADDRESS 0x40000554
	27	#define NRF_POWER_RAMONx_RAMxON_ONMODE_Msk 0x3
	28
	29	/**
	30	* @brief PAL setup.
	31	* @details Digital I/O ports static configuration as defined in @p board.h.
	32	* This variable is used by the HAL when initializing the PAL driver.
	33	*/
	34	const PALConfig pal_default_config =
	35	{
	36	.pads = {
	37	PAL_MODE_UNCONNECTED, /* P0.0 */
	38	PAL_MODE_UNCONNECTED, /* P0.1 */
	39	PAL_MODE_UNCONNECTED, /* P0.2 */
	40	PAL_MODE_UNCONNECTED, /* P0.3 */
	41	PAL_MODE_UNCONNECTED, /* P0.4 */
	42	PAL_MODE_UNCONNECTED, /* P0.5 */
	43	PAL_MODE_UNCONNECTED, /* P0.6 */
	44	PAL_MODE_OUTPUT_OPENDRAIN, /* P0.7 : SCL */
	45	PAL_MODE_OUTPUT_PUSHPULL, /* P0.8 : UART_RTS */
	46	PAL_MODE_OUTPUT_PUSHPULL, /* P0.9 : UART_TX */
	47	PAL_MODE_INPUT_PULLUP, /* P0.10: UART_CTS */
	48	PAL_MODE_INPUT_PULLUP, /* P0.11: UART_RX */
	49	PAL_MODE_UNCONNECTED, /* P0.12 */
	50	PAL_MODE_UNCONNECTED, /* P0.13 */
	51	PAL_MODE_UNCONNECTED, /* P0.14 */
	52	PAL_MODE_UNCONNECTED, /* P0.15 */
	53	PAL_MODE_UNCONNECTED, /* P0.16 */
	54	PAL_MODE_INPUT_PULLUP, /* P0.17: BTN1 */
	55	PAL_MODE_INPUT_PULLUP, /* P0.18: BTN2 */
	56	PAL_MODE_INPUT_PULLUP, /* P0.19: BTN3 */
	57	PAL_MODE_INPUT_PULLUP, /* P0.20: BTN4 */
	58	PAL_MODE_OUTPUT_PUSHPULL, /* P0.21: LED1 */
	59	PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: LED2 */
	60	PAL_MODE_OUTPUT_PUSHPULL, /* P0.23: LED3 */
	61	PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: LED4 \| SPI_SEL */
	62	PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_MOSI */
	63	PAL_MODE_UNCONNECTED, /* P0.26: XTAL (32MHz) */
	64	PAL_MODE_UNCONNECTED, /* P0.27: XTAL (32MHz) */
	65	PAL_MODE_INPUT_PULLUP, /* P0.28: SPI_MISO */
	66	PAL_MODE_OUTPUT_PUSHPULL, /* P0.29: SPI_SCK */
	67	PAL_MODE_OUTPUT_OPENDRAIN, /* P0.30: SDA */
	68	PAL_MODE_UNCONNECTED, /* P0.31 */
	69	},
	70	};
	71	#endif
	72
	73	/**
	74	* @brief Early initialization code.
	75	* @details This initialization is performed just after reset before BSS and
	76	* DATA segments initialization.
	77	*/
	78	void __early_init(void)
	79	{
	80	/* Make sure ALL RAM banks are powered on */
	81	(uint32_t )NRF_POWER_RAMON_ADDRESS \|= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
	82	(uint32_t )NRF_POWER_RAMONB_ADDRESS \|= NRF_POWER_RAMONx_RAMxON_ONMODE_Msk;
	83	}
	84
	85	/**
	86	* @brief Late initialization code.
	87	* @note This initialization is performed after BSS and DATA segments
	88	* initialization and before invoking the main() function.
	89	*/
	90	void boardInit(void)
	91	{
	92	}


diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h new file mode 100644 index 000000000..67e1724f6 --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.h
@@ -0,0 +1,145 @@
	1	/*
	2	Copyright (C) 2015 Fabio Utzig
	3
	4	Licensed under the Apache License, Version 2.0 (the "License");
	5	you may not use this file except in compliance with the License.
	6	You may obtain a copy of the License at
	7
	8	http://www.apache.org/licenses/LICENSE-2.0
	9
	10	Unless required by applicable law or agreed to in writing, software
	11	distributed under the License is distributed on an "AS IS" BASIS,
	12	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	13	See the License for the specific language governing permissions and
	14	limitations under the License.
	15	*/
	16
	17	#ifndef _BOARD_H_
	18	#define _BOARD_H_
	19
	20	/* Board identifier. */
	21	#define BOARD_NRF51_DK
	22	#define BOARD_NAME "nRF51 DK"
	23
	24	/* Board oscillators-related settings. */
	25	#define NRF51_XTAL_VALUE 16000000
	26	#define NRF51_LFCLK_SOURCE 1
	27
	28	/* GPIO pins. */
	29	#define BTN1 17
	30	#define BTN2 18
	31	#define BTN3 19
	32	#define BTN4 20
	33	#define LED1 21
	34	#define LED2 22
	35	#define LED3 23
	36	#define LED4 24
	37	#define UART_RTS 8
	38	#define UART_TX 9
	39	#define UART_CTS 10
	40	#define UART_RX 11
	41	#define SPI_SCK 29
	42	#define SPI_MOSI 25
	43	#define SPI_MISO 28
	44	#define SPI_SS 24
	45	#define I2C_SCL 7
	46	#define I2C_SDA 30
	47	#define AIN0 26
	48	#define AIN1 27
	49	#define AIN2 1
	50	#define AIN3 2
	51	#define AIN4 3
	52	#define AIN5 4
	53	#define AIN6 5
	54	#define AIN7 6
	55	#define AREF0 0
	56	#define AREF1 6
	57
	58	/*
	59	* IO pins assignments.
	60	*/
	61	#define IOPORT1_BTN1 17U
	62	#define IOPORT1_BTN2 18U
	63	#define IOPORT1_BTN3 19U
	64	#define IOPORT1_BTN4 20U
	65	#define IOPORT1_LED1 21U
	66	#define IOPORT1_LED2 22U
	67	#define IOPORT1_LED3 23U
	68	#define IOPORT1_LED4 24U
	69	#define IOPORT1_UART_RTS 8U
	70	#define IOPORT1_UART_TX 9U
	71	#define IOPORT1_UART_CTS 10U
	72	#define IOPORT1_UART_RX 11U
	73	#define IOPORT1_SPI_SCK 29U
	74	#define IOPORT1_SPI_MOSI 25U
	75	#define IOPORT1_SPI_MISO 28U
	76	#define IOPORT1_SPI_SS 24U
	77	#define IOPORT1_I2C_SCL 7U
	78	#define IOPORT1_I2C_SDA 30U
	79	#define IOPORT1_A0 1U
	80	#define IOPORT1_A1 2U
	81	#define IOPORT1_A2 3U
	82	#define IOPORT1_A3 4U
	83	#define IOPORT1_A4 5U
	84	#define IOPORT1_A5 6U
	85	#define IOPORT1_AIN0 26U
	86	#define IOPORT1_AIN1 27U
	87	#define IOPORT1_AIN2 1U
	88	#define IOPORT1_AIN3 2U
	89	#define IOPORT1_AIN4 3U
	90	#define IOPORT1_AIN5 4U
	91	#define IOPORT1_AIN6 5U
	92	#define IOPORT1_AIN7 6U
	93	#define IOPORT1_AREF0 0U
	94	#define IOPORT1_AREF1 6U
	95
	96	/*
	97	* IO lines assignments.
	98	*/
	99	#define LINE_BTN1 PAL_LINE(IOPORT1, IOPORT1_BTN1)
	100	#define LINE_BTN2 PAL_LINE(IOPORT1, IOPORT1_BTN2)
	101	#define LINE_BTN3 PAL_LINE(IOPORT1, IOPORT1_BTN3)
	102	#define LINE_BTN4 PAL_LINE(IOPORT1, IOPORT1_BTN4)
	103	#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1)
	104	#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2)
	105	#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3)
	106	#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4)
	107	#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS)
	108	#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX)
	109	#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS)
	110	#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX)
	111	#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK)
	112	#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI)
	113	#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO)
	114	#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS)
	115	#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL)
	116	#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA)
	117	#define LINE_A0 PAL_LINE(IOPORT1, IOPORT1_A0)
	118	#define LINE_A1 PAL_LINE(IOPORT1, IOPORT1_A1)
	119	#define LINE_A2 PAL_LINE(IOPORT1, IOPORT1_A2)
	120	#define LINE_A3 PAL_LINE(IOPORT1, IOPORT1_A3)
	121	#define LINE_A4 PAL_LINE(IOPORT1, IOPORT1_A4)
	122	#define LINE_A5 PAL_LINE(IOPORT1, IOPORT1_A5)
	123	#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0)
	124	#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1)
	125	#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2)
	126	#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3)
	127	#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4)
	128	#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5)
	129	#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6)
	130	#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7)
	131	#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0)
	132	#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1)
	133
	134
	135	#if !defined(_FROM_ASM_)
	136	#ifdef __cplusplus
	137	extern "C" {
	138	#endif
	139	void boardInit(void);
	140	#ifdef __cplusplus
	141	}
	142	#endif
	143	#endif /* _FROM_ASM_ */
	144
	145	#endif /* _BOARD_H_ */


diff --git a/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk new file mode 100644 index 000000000..3e3e465f7 --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF51-DK/board.mk
@@ -0,0 +1,15 @@
	1	# List of all the board related files.
	2	BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK/board.c
	3
	4	# Required include directories
	5	BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF51-DK
	6
	7	# Flash
	8	JLINK_DEVICE = nrf51422
	9	JLINK_PRE_FLASH = w4 4001e504 1
	10	JLINK_ERASE_ALL = w4 4001e504 2\nw4 4001e50c 1\nsleep 100
	11	JLINK_PIN_RESET = w4 40000544 1
	12
	13	# Shared variables
	14	ALLCSRC += $(BOARDSRC)
	15	ALLINC += $(BOARDINC)