3 files changed, 253 insertions, 0 deletions
diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c
new file mode 100644
index 000000000..adf002d8f
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c
@@ -0,0 +1,81 @@
+/*
+    Copyright (C) 2016 Stéphane D'Alu
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+#include "hal.h"
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config =
+{
+  .pads = {
+        PAL_MODE_UNCONNECTED,         /* P0.0 : XTAL (32MHz)   */
+        PAL_MODE_UNCONNECTED,         /* P0.1 : XTAL (32MHz)   */
+        PAL_MODE_UNCONNECTED,         /* P0.2                  */
+        PAL_MODE_UNCONNECTED,         /* P0.3                  */
+        PAL_MODE_UNCONNECTED,         /* P0.4                  */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.5 : UART_RTS       */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.6 : UART_TX        */
+        PAL_MODE_INPUT_PULLUP,        /* P0.7 : UART_CTS       */
+        PAL_MODE_INPUT_PULLUP,        /* P0.8 : UART_RX        */
+        PAL_MODE_UNCONNECTED,         /* P0.9                  */
+        PAL_MODE_UNCONNECTED,         /* P0.10                 */
+        PAL_MODE_UNCONNECTED,         /* P0.11                 */
+        PAL_MODE_UNCONNECTED,         /* P0.12                 */
+        PAL_MODE_INPUT,               /* P0.13: BTN1           */
+        PAL_MODE_INPUT,               /* P0.14: BTN2           */
+        PAL_MODE_INPUT_PULLUP,        /* P0.15: BTN3           */
+        PAL_MODE_INPUT_PULLUP,        /* P0.16: BTN4           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.17: LED1           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.18: LED2           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.19: LED3           */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.20: LED4           */
+        PAL_MODE_UNCONNECTED,         /* P0.21                 */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.22: SPI_SS         */
+        PAL_MODE_INPUT_PULLUP,        /* P0.23: SPI_MISO       */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.24: SPI_MOSI       */
+        PAL_MODE_OUTPUT_PUSHPULL,     /* P0.25: SPI_SCK        */
+        PAL_MODE_OUTPUT_OPENDRAIN,    /* P0.26: SDA            */
+        PAL_MODE_OUTPUT_OPENDRAIN,    /* P0.27: SCL            */
+        PAL_MODE_UNCONNECTED,         /* P0.28                 */
+        PAL_MODE_UNCONNECTED,         /* P0.29                 */
+        PAL_MODE_UNCONNECTED,         /* P0.30                 */
+        PAL_MODE_UNCONNECTED,         /* P0.31                 */
+  },
+};
+#endif
+/**
+ * @brief   Early initialization code.
+ * @details This initialization is performed just after reset before BSS and
+ *          DATA segments initialization.
+ */
+void __early_init(void)
+{
+}
+/**
+ * @brief   Late initialization code.
+ * @note    This initialization is performed after BSS and DATA segments
+ *          initialization and before invoking the main() function.
+ */
+void boardInit(void)
+{
+}
diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h
new file mode 100644
index 000000000..c78909f27
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h
@@ -0,0 +1,164 @@
+/*
+    Copyright (C) 2016 Stephane D'Alu
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+        http://www.apache.org/licenses/LICENSE-2.0
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+#ifndef _BOARD_H_
+#define _BOARD_H_
+/* Board identifier. */
+#define BOARD_NRF52_EBYTE_E73
+#define BOARD_NAME             "nRF52 EBYTE E73-2G4M04S"
+/* Board oscillators-related settings. */
+#define NRF5_XTAL_VALUE        32000000
+#define NRF5_HFCLK_SOURCE      NRF5_HFCLK_HFXO
+#define NRF5_LFCLK_SOURCE      NRF5_LFCLK_XTAL
+#define NRF5_HFCLK_HFINT       0
+#define NRF5_HFCLK_HFXO        1
+#define NRF5_LFCLK_RC          0
+#define NRF5_LFCLK_XTAL        1
+#define NRF5_LFCLK_SYNTH       2
+/*
+ * GPIO pins. 
+ */
+/* Defined by board */
+#define BTN1           13U
+#define BTN2           14U
+#define BTN3           15U
+#define BTN4           16U
+#define LED1           17U
+#define LED2           18U
+#define LED3           19U
+#define LED4           20U
+#define UART_RTS        5U
+#define UART_TX         6U
+#define UART_CTS        7U
+#define UART_RX         8U
+#define NFC1            9U
+#define NFC2           10U
+#define I2C_SCL        27U
+#define I2C_SDA        26U
+/* Our definitions */
+#define SPI_SCK        25U
+#define SPI_MOSI       24U
+#define SPI_MISO       23U
+#define SPI_SS         22U
+/* Analog input */
+#define AIN0            2U
+#define AIN1            3U
+#define AIN2            4U
+#define AIN3            5U
+#define AIN4           28U
+#define AIN5           29U
+#define AIN6           30U
+#define AIN7           31U
+#define AREF0         AIN0
+#define AREF1         AIN1
+/*
+ * IO pins assignments.
+ */
+/* Defined by board */
+#define IOPORT1_BTN1           13U
+#define IOPORT1_BTN2           14U
+#define IOPORT1_BTN3           15U
+#define IOPORT1_BTN4           16U
+#define IOPORT1_LED1           17U
+#define IOPORT1_LED2           18U
+#define IOPORT1_LED3           19U
+#define IOPORT1_LED4           20U
+#define IOPORT1_UART_RTS        5U
+#define IOPORT1_UART_TX         6U
+#define IOPORT1_UART_CTS        7U
+#define IOPORT1_UART_RX         8U
+#define IOPORT1_NFC1            9U
+#define IOPORT1_NFC2           10U
+#define IOPORT1_I2C_SCL        27U
+#define IOPORT1_I2C_SDA        26U
+#define IOPORT1_RESET          21U
+/* Our definitions */
+#define IOPORT1_SPI_SCK        25U
+#define IOPORT1_SPI_MOSI       24U
+#define IOPORT1_SPI_MISO       23U
+#define IOPORT1_SPI_SS         22U
+/* Analog inpupt */
+#define IOPORT1_AIN0            2U
+#define IOPORT1_AIN1            3U
+#define IOPORT1_AIN2            4U
+#define IOPORT1_AIN3            5U
+#define IOPORT1_AIN4           28U
+#define IOPORT1_AIN5           29U
+#define IOPORT1_AIN6           30U
+#define IOPORT1_AIN7           31U
+#define IOPORT1_AREF0           IOPORT1_AIN0
+#define IOPORT1_AREF1           IOPORT1_AIN1
+/*
+ * IO lines assignments.
+ */
+/* Board defined */
+#define LINE_BTN1      PAL_LINE(IOPORT1, IOPORT1_BTN1)
+#define LINE_BTN2      PAL_LINE(IOPORT1, IOPORT1_BTN2)
+#define LINE_BTN3      PAL_LINE(IOPORT1, IOPORT1_BTN3)
+#define LINE_BTN4      PAL_LINE(IOPORT1, IOPORT1_BTN4)
+#define LINE_LED1      PAL_LINE(IOPORT1, IOPORT1_LED1)
+#define LINE_LED2      PAL_LINE(IOPORT1, IOPORT1_LED2)
+#define LINE_LED3      PAL_LINE(IOPORT1, IOPORT1_LED3)
+#define LINE_LED4      PAL_LINE(IOPORT1, IOPORT1_LED4)
+#define LINE_UART_RTS  PAL_LINE(IOPORT1, IOPORT1_UART_RTS)
+#define LINE_UART_TX   PAL_LINE(IOPORT1, IOPORT1_UART_TX)
+#define LINE_UART_CTS  PAL_LINE(IOPORT1, IOPORT1_UART_CTS)
+#define LINE_UART_RX   PAL_LINE(IOPORT1, IOPORT1_UART_RX)
+#define LINE_NFC1      PAL_LINE(IOPORT1, IOPORT1_NFC1)
+#define LINE_NFC2      PAL_LINE(IOPORT1, IOPORT1_NFC2)
+#define LINE_I2C_SCL   PAL_LINE(IOPORT1, IOPORT1_I2C_SCL)
+#define LINE_I2C_SDA   PAL_LINE(IOPORT1, IOPORT1_I2C_SDA)
+/* Our definitions */
+#define LINE_SPI_SCK   PAL_LINE(IOPORT1, IOPORT1_SPI_SCK)
+#define LINE_SPI_MOSI  PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI)
+#define LINE_SPI_MISO  PAL_LINE(IOPORT1, IOPORT1_SPI_MISO)
+#define LINE_SPI_SS    PAL_LINE(IOPORT1, IOPORT1_SPI_SS)
+/* Analog line */
+#define LINE_AIN0      PAL_LINE(IOPORT1, IOPORT1_AIN0)
+#define LINE_AIN1      PAL_LINE(IOPORT1, IOPORT1_AIN1)
+#define LINE_AIN2      PAL_LINE(IOPORT1, IOPORT1_AIN2)
+#define LINE_AIN3      PAL_LINE(IOPORT1, IOPORT1_AIN3)
+#define LINE_AIN4      PAL_LINE(IOPORT1, IOPORT1_AIN4)
+#define LINE_AIN5      PAL_LINE(IOPORT1, IOPORT1_AIN5)
+#define LINE_AIN6      PAL_LINE(IOPORT1, IOPORT1_AIN6)
+#define LINE_AIN7      PAL_LINE(IOPORT1, IOPORT1_AIN7)
+#define LINE_AREF0     PAL_LINE(IOPORT1, IOPORT1_AREF0)
+#define LINE_AREF1     PAL_LINE(IOPORT1, IOPORT1_AREF1)
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+#endif /* _BOARD_H_ */
diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk
new file mode 100644
index 000000000..8876668ec
--- /dev/null
+++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk
@@ -0,0 +1,8 @@
+# List of all the board related files.
+BOARDSRC =  ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S/board.c
+# Required include directories
+BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S
+ALLCSRC += $(BOARDSRC)
+ALLINC += $(BOARDINC)

diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c new file mode 100644 index 000000000..adf002d8f --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.c
@@ -0,0 +1,81 @@
	1	/*
	2	Copyright (C) 2016 Stéphane D'Alu
	3
	4	Licensed under the Apache License, Version 2.0 (the "License");
	5	you may not use this file except in compliance with the License.
	6	You may obtain a copy of the License at
	7
	8	http://www.apache.org/licenses/LICENSE-2.0
	9
	10	Unless required by applicable law or agreed to in writing, software
	11	distributed under the License is distributed on an "AS IS" BASIS,
	12	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	13	See the License for the specific language governing permissions and
	14	limitations under the License.
	15	*/
	16
	17	#include "hal.h"
	18
	19	#if HAL_USE_PAL \|\| defined(__DOXYGEN__)
	20
	21	/**
	22	* @brief PAL setup.
	23	* @details Digital I/O ports static configuration as defined in @p board.h.
	24	* This variable is used by the HAL when initializing the PAL driver.
	25	*/
	26	const PALConfig pal_default_config =
	27	{
	28	.pads = {
	29	PAL_MODE_UNCONNECTED, /* P0.0 : XTAL (32MHz) */
	30	PAL_MODE_UNCONNECTED, /* P0.1 : XTAL (32MHz) */
	31	PAL_MODE_UNCONNECTED, /* P0.2 */
	32	PAL_MODE_UNCONNECTED, /* P0.3 */
	33	PAL_MODE_UNCONNECTED, /* P0.4 */
	34	PAL_MODE_OUTPUT_PUSHPULL, /* P0.5 : UART_RTS */
	35	PAL_MODE_OUTPUT_PUSHPULL, /* P0.6 : UART_TX */
	36	PAL_MODE_INPUT_PULLUP, /* P0.7 : UART_CTS */
	37	PAL_MODE_INPUT_PULLUP, /* P0.8 : UART_RX */
	38	PAL_MODE_UNCONNECTED, /* P0.9 */
	39	PAL_MODE_UNCONNECTED, /* P0.10 */
	40	PAL_MODE_UNCONNECTED, /* P0.11 */
	41	PAL_MODE_UNCONNECTED, /* P0.12 */
	42	PAL_MODE_INPUT, /* P0.13: BTN1 */
	43	PAL_MODE_INPUT, /* P0.14: BTN2 */
	44	PAL_MODE_INPUT_PULLUP, /* P0.15: BTN3 */
	45	PAL_MODE_INPUT_PULLUP, /* P0.16: BTN4 */
	46	PAL_MODE_OUTPUT_PUSHPULL, /* P0.17: LED1 */
	47	PAL_MODE_OUTPUT_PUSHPULL, /* P0.18: LED2 */
	48	PAL_MODE_OUTPUT_PUSHPULL, /* P0.19: LED3 */
	49	PAL_MODE_OUTPUT_PUSHPULL, /* P0.20: LED4 */
	50	PAL_MODE_UNCONNECTED, /* P0.21 */
	51	PAL_MODE_OUTPUT_PUSHPULL, /* P0.22: SPI_SS */
	52	PAL_MODE_INPUT_PULLUP, /* P0.23: SPI_MISO */
	53	PAL_MODE_OUTPUT_PUSHPULL, /* P0.24: SPI_MOSI */
	54	PAL_MODE_OUTPUT_PUSHPULL, /* P0.25: SPI_SCK */
	55	PAL_MODE_OUTPUT_OPENDRAIN, /* P0.26: SDA */
	56	PAL_MODE_OUTPUT_OPENDRAIN, /* P0.27: SCL */
	57	PAL_MODE_UNCONNECTED, /* P0.28 */
	58	PAL_MODE_UNCONNECTED, /* P0.29 */
	59	PAL_MODE_UNCONNECTED, /* P0.30 */
	60	PAL_MODE_UNCONNECTED, /* P0.31 */
	61	},
	62	};
	63	#endif
	64
	65	/**
	66	* @brief Early initialization code.
	67	* @details This initialization is performed just after reset before BSS and
	68	* DATA segments initialization.
	69	*/
	70	void __early_init(void)
	71	{
	72	}
	73
	74	/**
	75	* @brief Late initialization code.
	76	* @note This initialization is performed after BSS and DATA segments
	77	* initialization and before invoking the main() function.
	78	*/
	79	void boardInit(void)
	80	{
	81	}


diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h new file mode 100644 index 000000000..c78909f27 --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.h
@@ -0,0 +1,164 @@
	1	/*
	2	Copyright (C) 2016 Stephane D'Alu
	3
	4	Licensed under the Apache License, Version 2.0 (the "License");
	5	you may not use this file except in compliance with the License.
	6	You may obtain a copy of the License at
	7
	8	http://www.apache.org/licenses/LICENSE-2.0
	9
	10	Unless required by applicable law or agreed to in writing, software
	11	distributed under the License is distributed on an "AS IS" BASIS,
	12	WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
	13	See the License for the specific language governing permissions and
	14	limitations under the License.
	15	*/
	16
	17	#ifndef _BOARD_H_
	18	#define _BOARD_H_
	19
	20	/* Board identifier. */
	21	#define BOARD_NRF52_EBYTE_E73
	22	#define BOARD_NAME "nRF52 EBYTE E73-2G4M04S"
	23
	24	/* Board oscillators-related settings. */
	25	#define NRF5_XTAL_VALUE 32000000
	26	#define NRF5_HFCLK_SOURCE NRF5_HFCLK_HFXO
	27	#define NRF5_LFCLK_SOURCE NRF5_LFCLK_XTAL
	28
	29	#define NRF5_HFCLK_HFINT 0
	30	#define NRF5_HFCLK_HFXO 1
	31
	32	#define NRF5_LFCLK_RC 0
	33	#define NRF5_LFCLK_XTAL 1
	34	#define NRF5_LFCLK_SYNTH 2
	35
	36	/*
	37	* GPIO pins.
	38	*/
	39	/* Defined by board */
	40	#define BTN1 13U
	41	#define BTN2 14U
	42	#define BTN3 15U
	43	#define BTN4 16U
	44	#define LED1 17U
	45	#define LED2 18U
	46	#define LED3 19U
	47	#define LED4 20U
	48	#define UART_RTS 5U
	49	#define UART_TX 6U
	50	#define UART_CTS 7U
	51	#define UART_RX 8U
	52	#define NFC1 9U
	53	#define NFC2 10U
	54	#define I2C_SCL 27U
	55	#define I2C_SDA 26U
	56
	57	/* Our definitions */
	58	#define SPI_SCK 25U
	59	#define SPI_MOSI 24U
	60	#define SPI_MISO 23U
	61	#define SPI_SS 22U
	62
	63	/* Analog input */
	64	#define AIN0 2U
	65	#define AIN1 3U
	66	#define AIN2 4U
	67	#define AIN3 5U
	68	#define AIN4 28U
	69	#define AIN5 29U
	70	#define AIN6 30U
	71	#define AIN7 31U
	72	#define AREF0 AIN0
	73	#define AREF1 AIN1
	74
	75	/*
	76	* IO pins assignments.
	77	*/
	78	/* Defined by board */
	79	#define IOPORT1_BTN1 13U
	80	#define IOPORT1_BTN2 14U
	81	#define IOPORT1_BTN3 15U
	82	#define IOPORT1_BTN4 16U
	83	#define IOPORT1_LED1 17U
	84	#define IOPORT1_LED2 18U
	85	#define IOPORT1_LED3 19U
	86	#define IOPORT1_LED4 20U
	87	#define IOPORT1_UART_RTS 5U
	88	#define IOPORT1_UART_TX 6U
	89	#define IOPORT1_UART_CTS 7U
	90	#define IOPORT1_UART_RX 8U
	91	#define IOPORT1_NFC1 9U
	92	#define IOPORT1_NFC2 10U
	93	#define IOPORT1_I2C_SCL 27U
	94	#define IOPORT1_I2C_SDA 26U
	95	#define IOPORT1_RESET 21U
	96
	97	/* Our definitions */
	98	#define IOPORT1_SPI_SCK 25U
	99	#define IOPORT1_SPI_MOSI 24U
	100	#define IOPORT1_SPI_MISO 23U
	101	#define IOPORT1_SPI_SS 22U
	102
	103	/* Analog inpupt */
	104	#define IOPORT1_AIN0 2U
	105	#define IOPORT1_AIN1 3U
	106	#define IOPORT1_AIN2 4U
	107	#define IOPORT1_AIN3 5U
	108	#define IOPORT1_AIN4 28U
	109	#define IOPORT1_AIN5 29U
	110	#define IOPORT1_AIN6 30U
	111	#define IOPORT1_AIN7 31U
	112	#define IOPORT1_AREF0 IOPORT1_AIN0
	113	#define IOPORT1_AREF1 IOPORT1_AIN1
	114
	115	/*
	116	* IO lines assignments.
	117	*/
	118	/* Board defined */
	119	#define LINE_BTN1 PAL_LINE(IOPORT1, IOPORT1_BTN1)
	120	#define LINE_BTN2 PAL_LINE(IOPORT1, IOPORT1_BTN2)
	121	#define LINE_BTN3 PAL_LINE(IOPORT1, IOPORT1_BTN3)
	122	#define LINE_BTN4 PAL_LINE(IOPORT1, IOPORT1_BTN4)
	123	#define LINE_LED1 PAL_LINE(IOPORT1, IOPORT1_LED1)
	124	#define LINE_LED2 PAL_LINE(IOPORT1, IOPORT1_LED2)
	125	#define LINE_LED3 PAL_LINE(IOPORT1, IOPORT1_LED3)
	126	#define LINE_LED4 PAL_LINE(IOPORT1, IOPORT1_LED4)
	127	#define LINE_UART_RTS PAL_LINE(IOPORT1, IOPORT1_UART_RTS)
	128	#define LINE_UART_TX PAL_LINE(IOPORT1, IOPORT1_UART_TX)
	129	#define LINE_UART_CTS PAL_LINE(IOPORT1, IOPORT1_UART_CTS)
	130	#define LINE_UART_RX PAL_LINE(IOPORT1, IOPORT1_UART_RX)
	131	#define LINE_NFC1 PAL_LINE(IOPORT1, IOPORT1_NFC1)
	132	#define LINE_NFC2 PAL_LINE(IOPORT1, IOPORT1_NFC2)
	133	#define LINE_I2C_SCL PAL_LINE(IOPORT1, IOPORT1_I2C_SCL)
	134	#define LINE_I2C_SDA PAL_LINE(IOPORT1, IOPORT1_I2C_SDA)
	135
	136	/* Our definitions */
	137	#define LINE_SPI_SCK PAL_LINE(IOPORT1, IOPORT1_SPI_SCK)
	138	#define LINE_SPI_MOSI PAL_LINE(IOPORT1, IOPORT1_SPI_MOSI)
	139	#define LINE_SPI_MISO PAL_LINE(IOPORT1, IOPORT1_SPI_MISO)
	140	#define LINE_SPI_SS PAL_LINE(IOPORT1, IOPORT1_SPI_SS)
	141
	142	/* Analog line */
	143	#define LINE_AIN0 PAL_LINE(IOPORT1, IOPORT1_AIN0)
	144	#define LINE_AIN1 PAL_LINE(IOPORT1, IOPORT1_AIN1)
	145	#define LINE_AIN2 PAL_LINE(IOPORT1, IOPORT1_AIN2)
	146	#define LINE_AIN3 PAL_LINE(IOPORT1, IOPORT1_AIN3)
	147	#define LINE_AIN4 PAL_LINE(IOPORT1, IOPORT1_AIN4)
	148	#define LINE_AIN5 PAL_LINE(IOPORT1, IOPORT1_AIN5)
	149	#define LINE_AIN6 PAL_LINE(IOPORT1, IOPORT1_AIN6)
	150	#define LINE_AIN7 PAL_LINE(IOPORT1, IOPORT1_AIN7)
	151	#define LINE_AREF0 PAL_LINE(IOPORT1, IOPORT1_AREF0)
	152	#define LINE_AREF1 PAL_LINE(IOPORT1, IOPORT1_AREF1)
	153
	154	#if !defined(_FROM_ASM_)
	155	#ifdef __cplusplus
	156	extern "C" {
	157	#endif
	158	void boardInit(void);
	159	#ifdef __cplusplus
	160	}
	161	#endif
	162	#endif /* _FROM_ASM_ */
	163
	164	#endif /* _BOARD_H_ */


diff --git a/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk new file mode 100644 index 000000000..8876668ec --- /dev/null +++ b/lib/chibios-contrib/os/hal/boards/NRF52-E73-2G4M04S/board.mk
@@ -0,0 +1,8 @@
	1	# List of all the board related files.
	2	BOARDSRC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S/board.c
	3
	4	# Required include directories
	5	BOARDINC = ${CHIBIOS_CONTRIB}/os/hal/boards/NRF52-E73-2G4M04S
	6
	7	ALLCSRC += $(BOARDSRC)
	8	ALLINC += $(BOARDINC)