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1/*
2 ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17/*
18 * This file has been automatically generated using ChibiStudio board
19 * generator plugin. Do not edit manually.
20 */
21
22#include "hal.h"
23#include "stm32_gpio.h"
24
25/*===========================================================================*/
26/* Driver local definitions. */
27/*===========================================================================*/
28
29/*===========================================================================*/
30/* Driver exported variables. */
31/*===========================================================================*/
32
33/*===========================================================================*/
34/* Driver local variables and types. */
35/*===========================================================================*/
36
37/**
38 * @brief Type of STM32 GPIO port setup.
39 */
40typedef struct {
41 uint32_t moder;
42 uint32_t otyper;
43 uint32_t ospeedr;
44 uint32_t pupdr;
45 uint32_t odr;
46 uint32_t afrl;
47 uint32_t afrh;
48} gpio_setup_t;
49
50/**
51 * @brief Type of STM32 GPIO initialization data.
52 */
53typedef struct {
54#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
55 gpio_setup_t PAData;
56#endif
57#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
58 gpio_setup_t PBData;
59#endif
60#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
61 gpio_setup_t PCData;
62#endif
63#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
64 gpio_setup_t PDData;
65#endif
66#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
67 gpio_setup_t PEData;
68#endif
69#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
70 gpio_setup_t PFData;
71#endif
72#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
73 gpio_setup_t PGData;
74#endif
75#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
76 gpio_setup_t PHData;
77#endif
78#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
79 gpio_setup_t PIData;
80#endif
81#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
82 gpio_setup_t PJData;
83#endif
84#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
85 gpio_setup_t PKData;
86#endif
87} gpio_config_t;
88
89/**
90 * @brief STM32 GPIO static initialization data.
91 */
92static const gpio_config_t gpio_default_config = {
93#if STM32_HAS_GPIOA
94 {
95 VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
96 VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH
97 },
98#endif
99#if STM32_HAS_GPIOB
100 {
101 VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
102 VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH
103 },
104#endif
105#if STM32_HAS_GPIOC
106 {
107 VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
108 VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH
109 },
110#endif
111#if STM32_HAS_GPIOD
112 {
113 VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
114 VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH
115 },
116#endif
117#if STM32_HAS_GPIOE
118 {
119 VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
120 VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH
121 },
122#endif
123#if STM32_HAS_GPIOF
124 {
125 VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
126 VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH
127 },
128#endif
129#if STM32_HAS_GPIOG
130 {
131 VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
132 VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH
133 },
134#endif
135#if STM32_HAS_GPIOH
136 {
137 VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
138 VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH
139 },
140#endif
141#if STM32_HAS_GPIOI
142 {
143 VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
144 VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH
145 },
146#endif
147#if STM32_HAS_GPIOJ
148 {
149 VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
150 VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH
151 },
152#endif
153#if STM32_HAS_GPIOK
154 {
155 VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
156 VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH
157 }
158#endif
159};
160
161/*===========================================================================*/
162/* Driver local functions. */
163/*===========================================================================*/
164
165static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
166
167 gpiop->OTYPER = config->otyper;
168 gpiop->OSPEEDR = config->ospeedr;
169 gpiop->PUPDR = config->pupdr;
170 gpiop->ODR = config->odr;
171 gpiop->AFRL = config->afrl;
172 gpiop->AFRH = config->afrh;
173 gpiop->MODER = config->moder;
174}
175
176static void stm32_gpio_init(void) {
177
178 /* Enabling GPIO-related clocks, the mask comes from the
179 registry header file.*/
180 rccResetAHB1(STM32_GPIO_EN_MASK);
181 rccEnableAHB1(STM32_GPIO_EN_MASK, true);
182
183 /* Initializing all the defined GPIO ports.*/
184#if STM32_HAS_GPIOA
185 gpio_init(GPIOA, &gpio_default_config.PAData);
186#endif
187#if STM32_HAS_GPIOB
188 gpio_init(GPIOB, &gpio_default_config.PBData);
189#endif
190#if STM32_HAS_GPIOC
191 gpio_init(GPIOC, &gpio_default_config.PCData);
192#endif
193#if STM32_HAS_GPIOD
194 gpio_init(GPIOD, &gpio_default_config.PDData);
195#endif
196#if STM32_HAS_GPIOE
197 gpio_init(GPIOE, &gpio_default_config.PEData);
198#endif
199#if STM32_HAS_GPIOF
200 gpio_init(GPIOF, &gpio_default_config.PFData);
201#endif
202#if STM32_HAS_GPIOG
203 gpio_init(GPIOG, &gpio_default_config.PGData);
204#endif
205#if STM32_HAS_GPIOH
206 gpio_init(GPIOH, &gpio_default_config.PHData);
207#endif
208#if STM32_HAS_GPIOI
209 gpio_init(GPIOI, &gpio_default_config.PIData);
210#endif
211#if STM32_HAS_GPIOJ
212 gpio_init(GPIOJ, &gpio_default_config.PJData);
213#endif
214#if STM32_HAS_GPIOK
215 gpio_init(GPIOK, &gpio_default_config.PKData);
216#endif
217}
218
219/*===========================================================================*/
220/* Driver interrupt handlers. */
221/*===========================================================================*/
222
223/*===========================================================================*/
224/* Driver exported functions. */
225/*===========================================================================*/
226
227/**
228 * @brief Early initialization code.
229 * @details GPIO ports and system clocks are initialized before everything
230 * else.
231 */
232void __early_init(void) {
233
234 stm32_gpio_init();
235 stm32_clock_init();
236}
237
238#if HAL_USE_SDC || defined(__DOXYGEN__)
239/**
240 * @brief SDC card detection.
241 */
242bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
243
244 (void)sdcp;
245 /* TODO: Fill the implementation.*/
246 return true;
247}
248
249/**
250 * @brief SDC card write protection detection.
251 */
252bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
253
254 (void)sdcp;
255 /* TODO: Fill the implementation.*/
256 return false;
257}
258#endif /* HAL_USE_SDC */
259
260#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
261/**
262 * @brief MMC_SPI card detection.
263 */
264bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
265
266 (void)mmcp;
267 /* TODO: Fill the implementation.*/
268 return true;
269}
270
271/**
272 * @brief MMC_SPI card write protection detection.
273 */
274bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
275
276 (void)mmcp;
277 /* TODO: Fill the implementation.*/
278 return false;
279}
280#endif
281
282/**
283 * @brief Board-specific initialization code.
284 * @todo Add your board-specific code, if any.
285 */
286void boardInit(void) {
287
288}
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-31 04:21:38 +0100